main.c

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#include <stdint.h>
 
#include "ra8_board_ek_ra8d2.h"
#include "ra8_boot_entry.h"
#include "ra8_cgc.h"
#include "ra8_err.h"
#include "ra8_isr.h"
#include "ra8_lpm.h"
#include "ra8_mstp.h"
#include "ra8_power_profile.h"
#include "ra8_time.h"

typedef enum : uint32_t {
  k_pp_demo_baud       = 115200U, 
  k_pp_demo_period_ms  = 1000U,   
  k_pp_demo_busy_iters = 100000U, 
  k_pp_demo_us_per_ms  = 1000U,   
} pp_demo_const_t;

typedef enum : uint8_t {
  k_pp_demo_ascii_zero   = '0', 
  k_pp_demo_dec_base     = 10U, 
  k_pp_demo_uint_dec_max = 10U, 
  k_pp_demo_print_buf    = 96U, 
} pp_demo_byte_t;

static const uint8_t k_pp_demo_pass_msg[] = "pp: profile OK\r\n";

static void pp_demo_panic_halt(void)
{
  while (1) {
    __asm__ volatile("wfi");
  }
}

static uint64_t pp_demo_now_us(void* ctx)
{
  (void)ctx;
  return (uint64_t)ra8_time_ms() * (uint64_t)k_pp_demo_us_per_ms;
}

static void pp_demo_clocks_or_halt(void)
{
  uint32_t cpuclk0_hz = 0U;
  if (ra8_cgc_init() != k_ra8_ok) {
    pp_demo_panic_halt();
  }
  if (ra8_cgc_get_clock_hz(k_ra8_clock_id_cpuclk0, &cpuclk0_hz) != k_ra8_ok) {
    pp_demo_panic_halt();
  }
  if (ra8_mstp_init() != k_ra8_ok) {
    pp_demo_panic_halt();
  }
  if (ra8_time_init(cpuclk0_hz) != k_ra8_ok) {
    pp_demo_panic_halt();
  }
  if (ra8_board_uart_console_init((uint32_t)k_pp_demo_baud) != k_ra8_ok) {
    pp_demo_panic_halt();
  }
}

static void pp_demo_modules_or_halt(void)
{
  const ra8_lpm_config_t lpm_cfg = {
    .io_port_keep     = false,
    .opa_bus_keep     = true,
    .sscr_fast_return = true,
    .dcdc_softstart   = k_ra8_lpm_dcssmode_128us,
    .sscr_low_power   = k_ra8_lpm_ss2lp_default,
  };
  if (ra8_lpm_init(&lpm_cfg) != k_ra8_ok) {
    pp_demo_panic_halt();
  }
  const ra8_power_profile_config_t pp_cfg = {
    .pulse         = nullptr,
    .now_us        = pp_demo_now_us,
    .user_ctx_gpio = nullptr,
    .user_ctx_time = nullptr,
  };
  if (ra8_power_profile_init(&pp_cfg) != k_ra8_ok) {
    pp_demo_panic_halt();
  }
  if (ra8_board_led_init(k_ra8_board_led1) != k_ra8_ok) {
    pp_demo_panic_halt();
  }
  if (ra8_board_led_init(k_ra8_board_led2) != k_ra8_ok) {
    pp_demo_panic_halt();
  }
}
 
static void pp_demo_setup_or_halt(void)
{
  pp_demo_clocks_or_halt();
  pp_demo_modules_or_halt();
}

static bool pp_demo_cycle_modes(void)
{
  if (ra8_power_profile_mark_enter(k_ra8_power_profile_region_active) != k_ra8_ok) {
    return false;
  }
  for (volatile uint32_t i = 0U; i < (uint32_t)k_pp_demo_busy_iters; i++) {
    /* Busy spin so the analyser sees a clear ACTIVE shape. */
  }
  if (ra8_power_profile_mark_exit(k_ra8_power_profile_region_active) != k_ra8_ok) {
    return false;
  }
 
  if (ra8_power_profile_mark_enter(k_ra8_power_profile_region_sleep) != k_ra8_ok) {
    return false;
  }
  if (ra8_lpm_enter_sleep(k_ra8_sleep_mode_sleep) != k_ra8_ok) {
    return false;
  }
  if (ra8_power_profile_mark_exit(k_ra8_power_profile_region_sleep) != k_ra8_ok) {
    return false;
  }
 
  /* Deep Sleep and Software Standby skipped: in both modes the CPU
   * clock (and therefore SysTick) is gated, so the demo has no wake
   * source and ra8_lpm_enter_sleep hangs WFI indefinitely.  Configuring
   * AGT/RTC as a wake source would require deeper board-specific
   * setup.  The "pp: a=" stats line still prints with deep_standby and
   * software_standby region times = 0. */
  return true;
}

static uint8_t pp_demo_uint_to_dec(uint8_t* buf, uint64_t v)
{
  uint8_t  tmp[k_pp_demo_uint_dec_max];
  uint8_t  n = 0U;
  uint64_t r = v;
  if (r == 0U) {
    buf[0] = (uint8_t)k_pp_demo_ascii_zero;
    return 1U;
  }
  while ((r > 0U) && (n < (uint8_t)k_pp_demo_uint_dec_max)) {
    tmp[n] = (uint8_t)((uint8_t)k_pp_demo_ascii_zero + (uint8_t)(r % (uint64_t)k_pp_demo_dec_base));
    r      = r / (uint64_t)k_pp_demo_dec_base;
    n++;
  }
  for (uint8_t i = 0U; i < n; i++) {
    buf[i] = tmp[(uint8_t)(n - 1U - i)];
  }
  return n;
}

static uint32_t pp_demo_append(uint8_t* buf, uint32_t off, const char* tag, uint64_t val)
{
  uint32_t i = 0U;
  while (tag[i] != '\0') {
    buf[off++] = (uint8_t)tag[i];
    i++;
  }
  off += pp_demo_uint_to_dec(&buf[off], val);
  return off;
}

static uint32_t pp_demo_format_line(uint8_t* out, const ra8_power_profile_stats_t* stats)
{
  uint32_t off = 0U;
  off          = pp_demo_append(out,
                                off,
                                "pp: a=",
                                stats->regions[k_ra8_power_profile_region_active].total_time_us);
  off =
    pp_demo_append(out, off, " s=", stats->regions[k_ra8_power_profile_region_sleep].total_time_us);
  off = pp_demo_append(out,
                       off,
                       " d=",
                       stats->regions[k_ra8_power_profile_region_deep_standby].total_time_us);
  off = pp_demo_append(out,
                       off,
                       " st=",
                       stats->regions[k_ra8_power_profile_region_software_standby].total_time_us);
  const uint8_t suffix[] = " us\r\n";
  for (uint32_t i = 0U; i < sizeof(suffix) - 1U; i++) {
    out[off++] = suffix[i];
  }
  return off;
}

void main(void)
{
  pp_demo_setup_or_halt();
  ra8_isr_globals_enable();
 
  while (1) {
    bool profile_ok = true;
    if (!pp_demo_cycle_modes()) {
      profile_ok = false;
      (void)ra8_board_led_on(k_ra8_board_led2);
      /* Emit a FAIL banner over SCI so the HIL negative regex catches
       * a silently-broken profile_mark_enter/exit path; without this
       * line the test would pass on a chip where the LPM tracker was
       * never actually transitioning regions. */
      const uint8_t fail_banner[] = "pp: FAIL cycle_modes\r\n";
      (void)ra8_board_uart_console_write(fail_banner, (size_t)(sizeof(fail_banner) - 1U));
    }
    ra8_power_profile_stats_t stats = {};
    if (ra8_power_profile_get_stats(&stats) != k_ra8_ok) {
      profile_ok = false;
      (void)ra8_board_led_on(k_ra8_board_led2);
      const uint8_t stats_fail[] = "pp: FAIL get_stats\r\n";
      (void)ra8_board_uart_console_write(stats_fail, (size_t)(sizeof(stats_fail) - 1U));
    }
    uint8_t        out[k_pp_demo_print_buf] = {};
    const uint32_t off                      = pp_demo_format_line(out, &stats);
    if (ra8_board_uart_console_write(out, (size_t)off) != k_ra8_ok) {
      break;
    }
    /* Single-condition guard (no compound decision): the verdict prints
     * only when neither failure branch above flipped profile_ok. */
    if (profile_ok) {
      (void)ra8_board_uart_console_write(k_pp_demo_pass_msg,
                                         (size_t)(sizeof(k_pp_demo_pass_msg) - 1U));
    }
    if (ra8_board_led_toggle(k_ra8_board_led1) != k_ra8_ok) {
      break;
    }
    ra8_delay_ms(k_pp_demo_period_ms);
  }
 
  pp_demo_panic_halt();
}