47typedef enum : uint32_t {
53typedef enum : uint8_t {
84 __asm__
volatile(
"wfi");
117 static const uint8_t k_hex[] =
"0123456789ABCDEF";
119 buf[0] = (uint8_t)
'0';
120 buf[1] = (uint8_t)
'x';
122 const uint32_t shift =
125 buf[2U + i] = k_hex[nibble];
200 uint32_t cpuclk0_hz = 0U;
void main(void)
Secure fallback main entry point.
static const uint8_t k_scb_demo_hfsr_sep[]
static void scb_demo_panic_halt(void)
Park forever after a fatal init error.
scb_demo_const_t
Demo tunables.
@ k_scb_demo_baud
SCI8 console baud.
@ k_scb_demo_period_ms
Delay between probe cycles.
static const uint8_t k_scb_demo_crlf[]
static const uint8_t k_scb_demo_afsr_sep[]
static const uint8_t k_scb_demo_trace_prefix[]
static void scb_demo_setup_or_halt(void)
Core bring-up: CGC -> MSTP -> TIME -> console + LED.
static const uint8_t k_scb_demo_verdict_pass[]
static const uint8_t k_scb_demo_sfsr_prefix[]
static const uint8_t k_scb_demo_verdict_fail[]
static const uint8_t k_scb_demo_dfsr_prefix[]
static bool scb_demo_probe_and_report(void)
Read + log the SCB state and return whether the boot is fault-clean.
static void scb_demo_write_hex32(uint32_t val)
Log one 32-bit value as 0x + eight fixed hex digits.
scb_demo_fmt_t
Hex-formatting constants.
@ k_scb_demo_hex_digits
Hex digits in a uint32_t.
@ k_scb_demo_nibble_bits
Bits per hex nibble.
@ k_scb_demo_nibble_mask
Low-nibble mask.
static const uint8_t k_scb_demo_cfsr_prefix[]
static const uint8_t k_scb_demo_sfar_sep[]
static void scb_demo_write(const uint8_t *data, uint32_t len)
Write a byte span to the SCI8 console, discarding the status.
static const uint8_t k_scb_demo_vtor_prefix[]
static const uint8_t k_scb_demo_mmfar_prefix[]
static const uint8_t k_scb_demo_bfar_sep[]
Board-support layer for the Renesas EK-RA8D2 v1 evaluation kit.
ra8_err_t ra8_board_led_toggle(ra8_board_led_id_t led)
Toggle led's output state.
ra8_err_t ra8_board_led_init(ra8_board_led_id_t led)
Configure led as a digital output, initial level low (off).
@ k_ra8_board_led1
LED1, BLUE, P600 (jumper E27).
ra8_err_t ra8_board_uart_console_write(const uint8_t *data, size_t len)
Polled blocking write to the J-Link OB VCOM console.
ra8_err_t ra8_board_uart_console_init(uint32_t baud)
Configure SCI8 + PD02/PD03 as the debug-console UART.
Boot entry points shared between a vector table and its startup code.
High-level Clock Generation Circuit driver.
ra8_err_t ra8_cgc_get_clock_hz(ra8_clock_id_t id, uint32_t *out_hz)
Query the current frequency of a clock-tree domain.
@ k_ra8_clock_id_cpuclk0
Cortex-M85 CPUCLK0.
ra8_err_t ra8_cgc_init(void)
Configure the clock tree to a safe default.
Error Code Definitions for ra8-firmware.
@ k_ra8_ok
Success – operation completed with all postconditions satisfied.
ra8_err_codes_t ra8_err_t
Canonical error-return type used by every ra8-firmware API.
NVIC + ICU IELSR allocator.
void ra8_isr_globals_enable(void)
Globally enable maskable interrupts (PRIMASK = 0).
Ref-counted Module Stop Control wrapper for the RA8D2.
ra8_err_t ra8_mstp_init(void)
Re-establish the ra8_mstp ref-count table from current hardware state.
Cortex-M85 System Control Block: VTOR relocation + fault-status decode.
uintptr_t ra8_scb_get_vtor(void)
Read the current vector-table base from SCB->VTOR.
bool ra8_scb_trace_enabled(void)
Report whether DEMCR.TRCENA (trace subsystem enable) is set.
ra8_err_t ra8_scb_read_fault_status(ra8_scb_fault_status_t *out)
Read the Cortex-M85 SCB fault-status registers into one struct.
void ra8_scb_trace_enable(void)
Set DEMCR.TRCENA to power up the trace subsystem.
SysTick-based tick counter, delay and timestamp helpers.
ra8_err_t ra8_time_init(uint32_t cpu_hz)
Initialise SysTick for a 1 kHz tick interrupt.
void ra8_delay_ms(uint32_t ms)
Busy-wait for at least ms milliseconds.
One snapshot of the Cortex-M85 SCB fault-status registers.
uint32_t mmfar
MemManage Fault Address Register (if CFSR.MMARVALID).
uint32_t dfsr
Debug Fault Status Register.
uint32_t hfsr
HardFault Status Register.
uint32_t afsr
Auxiliary Fault Status Register.
uint32_t cfsr
Configurable Fault Status Register (MMFSR|BFSR|UFSR).
uint32_t sfsr
SecureFault Status Register (Secure-banked, RAZ NS).
uint32_t bfar
BusFault Address Register (if CFSR.BFARVALID).
uint32_t sfar
SecureFault Address Register (if SFSR.SFARVALID).