Cortex-M85 SCB HAL demo: VTOR query + fault-status dump over UART. More...

#include <stddef.h>
#include <stdint.h>
#include "ra8_board_ek_ra8d2.h"
#include "ra8_boot_entry.h"
#include "ra8_cgc.h"
#include "ra8_err.h"
#include "ra8_isr.h"
#include "ra8_mstp.h"
#include "ra8_scb.h"
#include "ra8_time.h"

Include dependency graph for main.c:

Enumerations
enum	scb_demo_const_t : uint32_t { k_scb_demo_baud = 115200U , k_scb_demo_period_ms = 1000U }
	Demo tunables. More...
enum	scb_demo_fmt_t : uint8_t { k_scb_demo_hex_digits = 8U , k_scb_demo_nibble_bits = 4U , k_scb_demo_nibble_mask = 0xFU }
	Hex-formatting constants. More...

Functions
static void	scb_demo_panic_halt (void)
	Park forever after a fatal init error.
static void	scb_demo_write (const uint8_t *data, uint32_t len)
	Write a byte span to the SCI8 console, discarding the status.
static void	scb_demo_write_hex32 (uint32_t val)
	Log one 32-bit value as 0x + eight fixed hex digits.
static bool	scb_demo_probe_and_report (void)
	Read + log the SCB state and return whether the boot is fault-clean.
static void	scb_demo_setup_or_halt (void)
	Core bring-up: CGC -> MSTP -> TIME -> console + LED.
void	main (void)
	The application entry point Reset_Handler hands control to.

Variables
static const uint8_t	k_scb_demo_vtor_prefix [] = "scb: vtor="
static const uint8_t	k_scb_demo_trace_prefix [] = "scb: trace="
static const uint8_t	k_scb_demo_cfsr_prefix [] = "scb: cfsr="
static const uint8_t	k_scb_demo_hfsr_sep [] = " hfsr="
static const uint8_t	k_scb_demo_dfsr_prefix [] = "scb: dfsr="
static const uint8_t	k_scb_demo_afsr_sep [] = " afsr="
static const uint8_t	k_scb_demo_mmfar_prefix [] = "scb: mmfar="
static const uint8_t	k_scb_demo_bfar_sep [] = " bfar="
static const uint8_t	k_scb_demo_sfsr_prefix [] = "scb: sfsr="
static const uint8_t	k_scb_demo_sfar_sep [] = " sfar="
static const uint8_t	k_scb_demo_crlf [] = "\r\n"
static const uint8_t	k_scb_demo_verdict_pass [] = "scb: probe PASS\r\n"
static const uint8_t	k_scb_demo_verdict_fail [] = "scb: probe FAIL\r\n"

Detailed Description

Cortex-M85 SCB HAL demo: VTOR query + fault-status dump over UART.

Tag: [Ring 6 / APP] {World: S}

Exercises the ra8_scb System Control Block driver (issue #583) end to end on a bare EK-RA8D2, printing what the three raw-poke call sites used to read for themselves so the HAL primitive can be diffed against them on the bench:

ra8_scb_get_vtor – the current vector-table base (the primitive the DFU copy-to-run launcher writes to relocate the table). Logged as hex.
ra8_scb_trace_enable / ra8_scb_trace_enabled – power the ITM / DWT trace block up via DEMCR.TRCENA (the bit the log transport pre-checks) and confirm it reads back set.
ra8_scb_read_fault_status – one snapshot of CFSR / HFSR / DFSR / MMFAR / BFAR / AFSR + the Secure SFSR / SFAR pair (the set the exception decoder reads). Every register is logged as hex.

The demo only QUERIES VTOR – it never relocates the live table, which would unseat the running app – and it injects no fault, so on a clean boot every fault-status register reads zero. The fixed verdict "scb: probe PASS" prints only when the snapshot read returned k_ra8_ok and CFSR + HFSR are both zero (no latched fault); that verdict is the line the HIL scrape keys on. Bare EK-RA8D2, no expansion board.

Copyright: Copyright (c) 2026 Brighton Sikarskie SPDX-License-Identifier: MIT

Since: 0.1.0

Definition in file main.c.

Enumeration Type Documentation

◆ scb_demo_const_t

enum scb_demo_const_t : uint32_t

Demo tunables.

Enumerator
k_scb_demo_baud	SCI8 console baud.
k_scb_demo_period_ms	Delay between probe cycles.

Definition at line 47 of file main.c.

◆ scb_demo_fmt_t

enum scb_demo_fmt_t : uint8_t

Hex-formatting constants.

Enumerator
k_scb_demo_hex_digits	Hex digits in a uint32_t.
k_scb_demo_nibble_bits	Bits per hex nibble.
k_scb_demo_nibble_mask	Low-nibble mask.

Definition at line 53 of file main.c.

Function Documentation

◆ main()

void main ( void )

The application entry point Reset_Handler hands control to.

Returns void, not int. This is a freestanding image: there is no hosted C environment, no process and nothing to report an exit status to. ISO C fixes main at int only for a hosted implementation; for a freestanding one (C23 5.1.2.1) the startup function's name and type are implementation-defined, and this is that definition. Reset_Handler discards no value because there is none to discard, and if main ever does return, startup halts the CPU rather than resuming anything.

The firmware lane is compiled -ffreestanding (see cmake/ra8_add_app.cmake) and the flag and this signature travel together: without it both GCC and clang reject a non-int main (-Wmain / -Wmain-return-type). Do not remove one without the other.

That coupling is why the declaration sits behind __STDC_HOSTED__ == 0, which -ffreestanding sets and a hosted build does not. The guard is not defensive dressing: this header is reachable from host builds (the unit tests compile ra8_core natively), and an unguarded void main(void); makes every hosted translation unit that includes it fail with conflicting types for 'main' against its own ISO int main. The declaration therefore exists exactly where its contract does.

Hosted first-party code – everything under tests/ and tools/ – uses the ISO int main(...) contract instead, because it genuinely does run under an OS that reads the exit status. scripts/checks/check_entry_points.py holds each domain to its own contract (#707).

Declared here, once, for the same reason SystemInit is: every vector_table.c used to restate it as a local extern int32_t main(void);, sixteen copies that no compiler ever compared against the definition – and roughly thirty of them had silently drifted out of agreement with the main they called.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has configured the clock tree and VTOR.

Postcondition: Control does not return; the image runs until reset or halt.; Any value the application wanted to report has been logged, not returned.

Note: Not thread-safe; single-threaded startup context only.

Warning: Only valid while the translation unit is compiled -ffreestanding. A hosted build rejects this signature.

See also: SystemInit()

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + BSP audio then plays blocks.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the playback loop forever.; On any HAL init failure the function halts in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + GPT triple, runs sweep.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the sweep loop forever.; On any HAL init failure the function halts in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up clocks + UART + RMII pins, then ThreadX.

Precondition: Reset_Handler has copied .data and zeroed .bss.

Postcondition: On clean entry the kernel runs the worker thread once.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up clocks + UART, then enters ThreadX.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the kernel runs the worker thread forever.; On any HAL init failure the function halts in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up LED, console, SDHI pins, then ThreadX.

Precondition: Reset_Handler has copied .data + zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: CPUCLK0 is raised to the PLL1 target before the kernel starts.; On clean entry the SD card thread runs forever.; On any HAL init failure the function halts in __WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + USB-FS + UAC1, then enters the iso-IN feed loop forever.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the iso-IN feed loop forever.; On any HAL init failure the function halts in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: SystemInit set VTOR / FPU / priority grouping.

The application entry point Reset_Handler hands control to.

See file header.

Precondition: Boot init has completed.; The secure-boot library's BLXNS into NS image either failed or was skipped (the call site in ra8_trustzone_init is a no-op on host builds).

Postcondition: Diagnostic counter latched, CPU parked in a halt loop.; Function never returns.

Note: Single-threaded entry.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: On success g_eoh_chapters / g_eoh_crc hold the parsed results, the banner is emitted, and g_eoh_heartbeat advances once per frame.; On any failure g_eoh_err is non-zero and the CPU parks (no heartbeat).

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The chapters/ch0-CRC banner is emitted; the CPU then loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: On success the g_etoc_* result globals hold the parsed TOC values, the banner is emitted, and g_etoc_heartbeat advances once per frame.; On any failure g_etoc_err is non-zero and the CPU parks (no heartbeat).

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss; SystemInit set VTOR/FPU.

Postcondition: The shelf scans on the panel; taps open books, browse, and read.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The slab/arena/tile/vmem banner is emitted; the CPU then loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: On success the cache globals are latched and g_pc_heartbeat advances.; On any failure g_pc_err is non-zero and the CPU parks (no heartbeat).

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Profiles power modes once a second.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the profile + blink loop.; On any HAL hard error LED2 latches ON.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler has copied .data and zeroed .bss.; The shared board boot files installed the vector table.

Postcondition: The demo has run once and its verdict banner is streaming steadily.; The CPU idles re-emitting the banner (or halts after a fatal init error).

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up the clocks, console, SPI, and SD card, then runs the shared ra8_io VFS round-trip over the SD-over-SPI block device. On success it prints the exact PASS banner the HIL runner and ra8_emulator smoke gate scrape for; on any failure it prints FAIL and parks the core.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On a clean run the CPU loops forever after the PASS banner.; On any failure the function prints FAIL and halts in WFI.

Note: Not thread-safe; this is the single-threaded app entry.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Initialises logging and the console, brings up the OSPI NOR volume, runs the erase-before-write round-trip, and prints a single PASS/FAIL verdict line over SCI8 before parking in an infinite loop.

Precondition: SystemInit configured VTOR / FPU / priority grouping.; The OSPI NOR array is present (modelled in ra8_emulator, real on silicon).

Postcondition: Exactly one PASS or FAIL verdict line has been queued on SCI8.; Control parks in an infinite loop; the function never returns.

Note: Single-threaded; runs to the park loop on the main stack.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The page-count + render-hash banner is emitted; the CPU loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The cal=OK / cal=SKIP result and the finger-free touchcal: ready sentinel are emitted; the CPU then loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The open=OK touch banner is emitted; the CPU then loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Both USB controllers' clocks and pins come up before the kernel so the workers only deal with stack bring-up.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR, FPU, priority grouping.

Postcondition: On clean entry the CPU stays in tx_kernel_enter forever.; On any HAL init failure the function halts in WFI.

Note: Single entry point; not re-entrant.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging and the clock tree, releases the Cortex-M33 (which then blinks LED1 via ra8_pcntr_set_output()), and idles. See the file header.

Precondition: SystemInit has completed core bring-up.; The M33 is held in reset by hardware until released here.

Postcondition: The M33 has been released and is blinking LED1.; This function never returns to its caller.

Note: Single-threaded; no RTOS on the M85 in this template.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: The application links ra8_c6link and ESP-hosted generated codecs.; No hardware validation is inferred from this function.

Postcondition: No c6link operation is attempted.; No network or storage state is modified.

Note: Single-threaded compile fixture.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, the clock tree, and the VCOM console, runs the cacheable-SRAM round-trip with the D-cache that SystemInit() enabled through ra8_cache_dcache_enable(), emits the matching PASS / FAIL banner over the console and ra8_log, then parks in WFI. Every byte the self-test touches runs with the L1 caches + MPU enabled by the shared boot (RA8_BOOT_ENABLE_CACHE_MPU + RA8_BOOT_CACHE_VIA_HAL).

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit enabled the MPU + I-cache + D-cache via the ra8_cache HAL.

Postcondition: Exactly one banner (PASS or FAIL) has been emitted.; The core is parked in WFI.

Note: Single-threaded; no RTOS and no IRQ sources in this template.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Publishes the mailbox, releases the Cortex-M33 into the emitter, yields until it signals done, validates the blob the M33 built, then logs the PASS/FAIL verdict and the chapter count read back from the blob. See the file header for the offload narrative.

Precondition: SystemInit has completed core bring-up.; The M33 is held inactive by hardware until released here.

Postcondition: The M33 has built a RABOOK1 blob and the M85 has validated it.; This function never returns to its caller.

Note: Single-threaded; no RTOS on the M85 in this example.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: On success the CPU heartbeats after epaper: PASS.; On any HAL error the console prints epaper: FAIL and the red LED latches on.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The chapters/toc/cover banner is emitted; CPU loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The reader loop runs forever, redrawing on each tap.; A page-1 banner is emitted once after the first render.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The cover-size / framebuffer-CRC banner is emitted; CPU loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The panel shows the reader screen and the input loop runs forever.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Publishes the mailbox, arms the IPC0 wake and configures the LPM block, releases the Cortex-M33 into the reader, waits for the first held page, logs the page-0 verdict, then runs the #150 mode-switch cycle – parking in low-power WFI and waking on the M33's page-turn pokes – before logging the handoff verdict and parking for good. See the file header for the narrative.

Precondition: SystemInit has completed core bring-up.; The M33 is held inactive by hardware until released here.

Postcondition: The M33 has rendered + re-rendered the held page and the M85 is parked.; This function never returns to its caller.

Note: Single-threaded; no RTOS on the M85 in this example.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The boot banner is emitted; the reader loop services taps forever.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up the timebase then measures forever.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the measure + blink loop forever.; On any HAL init failure the function halts in WFI.

Note: Never returns.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Arms the RIIC1 target and polls the dispatcher.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: The CPU stays in the dispatch poll loop forever.; On any fatal init error the CPU parks in riic_target_panic_halt.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On a clean run the PASS banner is printed and the CPU loops in WFI.; On any failure the function prints a FAIL line and halts.

Note: Not thread-safe; single-threaded app entry.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the read + print loop forever.; On any HAL hard error LED2 latches ON and the loop exits.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up the LIN commander then drives frames.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the LIN-frame + blink loop forever.; On any HAL init failure the function halts in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, "renders" page 0 into the shared mailbox, releases the Cortex-M33 into its hold loop, and parks the M85 in low-power WFI sleep. See the file header for the power-saving narrative.

Precondition: SystemInit has completed core bring-up.; The M33 is held inactive by hardware until released here.

Postcondition: The M33 owns the held page and the M85 is parked.; This function never returns to its caller.

Note: Single-threaded; no RTOS on the M85 in this example.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

The USB clock, pins, console, and the SD card all come up before the kernel so the worker only deals with USB stack bring-up.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR, FPU, priority grouping.

Postcondition: On clean entry the CPU stays in tx_kernel_enter forever.; On any HAL init failure the function halts in WFI.

Note: Single entry point; not re-entrant.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit configured VTOR / FPU.

Postcondition: On clean bring-up the CPU stays in the poll loop.; On any HAL init failure the function halts in WFI.

Note: Single entry point; not re-entrant.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler initialized static storage.; SystemInit configured VTOR, FPU, and priority grouping.

Postcondition: The startup banner is printed once.; Control enters ThreadX and never returns normally.

Note: The #707 freestanding contract is declared by ra8_boot_entry.h.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On a clean run the PASS banner is printed and the CPU heartbeats forever.; On any failure LED2 latches ON and the CPU parks.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, the clock tree, and the VCOM console, runs the three-step self-test (MPU enabled, canonical boot map, Device MMIO), emits the matching PASS / FAIL banner over the console and ra8_log, then parks in WFI.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit installed the boot map via ra8_mpu_apply_boot_map().

Postcondition: Exactly one banner (PASS or a step-specific FAIL) has been emitted.; The core is parked in WFI.

Note: Single-threaded; no RTOS and no IRQ sources in this template.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler initialised the C runtime; SystemInit ran.; The EK-RA8D2 J-Link OB VCOM console is attached for the banner.

Postcondition: The commit + rollback attempts have executed against extra-MRAM.; The verdict banner is emitted once per report cycle.

Note: Single entry point; not re-entrant.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Initialises logging + console, brings up the MRAM volume, runs the wear-levelling + power-cycle-survival flow, and prints a single PASS/FAIL verdict.

Precondition: SystemInit configured VTOR / FPU / priority grouping.; The extra-MRAM region is present (modelled in ra8_emulator, real on silicon).

Postcondition: Exactly one PASS or FAIL verdict line has been queued on SCI8.; Control parks in an infinite loop; the function never returns.

Note: Single-threaded; runs to the park loop on the main stack.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Initialises logging + console, brings up the MRAM volume, runs the program/erase round-trip, and prints a single PASS/FAIL verdict.

Precondition: SystemInit configured VTOR / FPU / priority grouping.; The extra-MRAM region is present (modelled in ra8_emulator, real on silicon).

Postcondition: Exactly one PASS or FAIL verdict line has been queued on SCI8.; Control parks in an infinite loop; the function never returns.

Note: Single-threaded; runs to the park loop on the main stack.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up the clocks, console, and SDHI bus pins, runs the native SD card identification, fills the payload, then runs the full ra8_io VFS round-trip over the native-SDHI block device. On success it prints the exact PASS banner the HIL runner and ra8_emulator smoke gate scrape for; on any failure it prints FAIL and parks the core.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On a clean run the CPU loops forever after the PASS banner.; On any failure the function prints FAIL and halts in WFI.

Note: Not thread-safe; this is the single-threaded app entry.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up the console and both stdio sinks, retargets the engine's stdio to the in-RAM capture sink, runs the two-backend swap, replays the RAM capture out of the UART, and prints a single PASS/FAIL verdict per abstraction before parking in an infinite loop.

Precondition: SystemInit configured VTOR / FPU / priority grouping.; The OSPI NOR array is present (modelled in ra8_emulator, real on silicon).

Postcondition: A PASS or FAIL verdict line has been queued on SCI8 for each abstraction.; Control parks in an infinite loop; the function never returns.

Note: Single-threaded; runs to the park loop on the main stack.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up the clocks, console, and SDHI bus pins, runs the native SD card identification, fills the payload, then writes + reads + compares one raw 512-byte block straight against ra8_sdcard. On success it prints the exact PASS banner; on any failure it prints FAIL and parks the core.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On a clean run the CPU loops forever after the PASS banner.; On any failure the function prints FAIL and halts in WFI.

Note: Not thread-safe; this is the single-threaded app entry.

Since: 0.1.0

Definition at line 221 of file main.c.

References k_ra8_board_led1, k_ra8_ok, k_scb_demo_period_ms, k_scb_demo_verdict_fail, k_scb_demo_verdict_pass, ra8_board_led_toggle(), ra8_delay_ms(), ra8_isr_globals_enable(), scb_demo_panic_halt(), scb_demo_probe_and_report(), scb_demo_setup_or_halt(), and scb_demo_write().

◆ scb_demo_panic_halt()

void scb_demo_panic_halt ( void )

static

Park forever after a fatal init error.

Precondition: Called only after an unrecoverable bring-up failure.

Postcondition: CPU is parked; only a debugger or reset wakes it.

Since: 0.1.0

Definition at line 81 of file main.c.

Referenced by main(), and scb_demo_setup_or_halt().

◆ scb_demo_probe_and_report()

bool scb_demo_probe_and_report ( void )

static

Read + log the SCB state and return whether the boot is fault-clean.

Enables the trace block, queries VTOR, and dumps the fault-status snapshot – each value as hex – then reports whether the snapshot read succeeded and no fault is latched (CFSR + HFSR both zero).

Returns: Whether the probe is clean.

Return values

true	Snapshot read returned k_ra8_ok and CFSR + HFSR are zero.
false	The read failed or a fault is latched in CFSR / HFSR.

Precondition: The console has been initialised.; The SCB PPB window is accessible (always on Cortex-M85).

Postcondition: One log block (vtor + trace + six fault-status lines) has been queued.; No SCB register other than DEMCR.TRCENA has been modified.

Since: 0.1.0

Definition at line 147 of file main.c.

Referenced by main().

◆ scb_demo_setup_or_halt()

void scb_demo_setup_or_halt ( void )

static

Core bring-up: CGC -> MSTP -> TIME -> console + LED.

Precondition: Reset defaults are in force (single-threaded boot context).; No peripheral has been claimed yet.

Postcondition: On return every core clock + console + LED is live.; Any failure parks the CPU via scb_demo_panic_halt.

Since: 0.1.0

Definition at line 198 of file main.c.

References k_ra8_board_led1, k_ra8_clock_id_cpuclk0, k_ra8_ok, k_scb_demo_baud, ra8_board_led_init(), ra8_board_uart_console_init(), ra8_cgc_get_clock_hz(), ra8_cgc_init(), ra8_mstp_init(), ra8_time_init(), and scb_demo_panic_halt().

Referenced by main().

◆ scb_demo_write()

void scb_demo_write	(	const uint8_t *	data,
		uint32_t	len )

static

Write a byte span to the SCI8 console, discarding the status.

Parameters

[in]	data	Non-NULL byte span to transmit.
[in]	len	Byte count (0 is a no-op).

Precondition: ra8_board_uart_console_init has succeeded.; data points at len readable bytes.

Postcondition: len bytes have been queued to the console UART.

Since: 0.1.0

Definition at line 99 of file main.c.

References ra8_board_uart_console_write().

Referenced by main(), scb_demo_probe_and_report(), and scb_demo_write_hex32().

◆ scb_demo_write_hex32()

void scb_demo_write_hex32 ( uint32_t val )

static

Log one 32-bit value as 0x + eight fixed hex digits.

Parameters

[in] val Value to print (a register value or an address).

Precondition: The console has been initialised.; val fits in a uint32_t (always true).

Postcondition: "0x" followed by eight MSB-first hex digits has been queued.; No other console state changed.

Since: 0.1.0

Definition at line 115 of file main.c.

References k_scb_demo_hex_digits, k_scb_demo_nibble_bits, k_scb_demo_nibble_mask, and scb_demo_write().

Referenced by scb_demo_probe_and_report().

Variable Documentation

◆ k_scb_demo_afsr_sep

const uint8_t k_scb_demo_afsr_sep[] = " afsr="

static

Definition at line 65 of file main.c.

Referenced by scb_demo_probe_and_report().

◆ k_scb_demo_bfar_sep

const uint8_t k_scb_demo_bfar_sep[] = " bfar="

static

Definition at line 67 of file main.c.

Referenced by scb_demo_probe_and_report().

◆ k_scb_demo_cfsr_prefix

const uint8_t k_scb_demo_cfsr_prefix[] = "scb: cfsr="

static

Definition at line 62 of file main.c.

Referenced by scb_demo_probe_and_report().

◆ k_scb_demo_crlf

const uint8_t k_scb_demo_crlf[] = "\r\n"

static

Definition at line 70 of file main.c.

Referenced by scb_demo_probe_and_report().

◆ k_scb_demo_dfsr_prefix

const uint8_t k_scb_demo_dfsr_prefix[] = "scb: dfsr="

static

Definition at line 64 of file main.c.

Referenced by scb_demo_probe_and_report().

◆ k_scb_demo_hfsr_sep

const uint8_t k_scb_demo_hfsr_sep[] = " hfsr="

static

Definition at line 63 of file main.c.

Referenced by scb_demo_probe_and_report().

◆ k_scb_demo_mmfar_prefix

const uint8_t k_scb_demo_mmfar_prefix[] = "scb: mmfar="

static

Definition at line 66 of file main.c.

Referenced by scb_demo_probe_and_report().

◆ k_scb_demo_sfar_sep

const uint8_t k_scb_demo_sfar_sep[] = " sfar="

static

Definition at line 69 of file main.c.

Referenced by scb_demo_probe_and_report().

◆ k_scb_demo_sfsr_prefix

const uint8_t k_scb_demo_sfsr_prefix[] = "scb: sfsr="

static

Definition at line 68 of file main.c.

Referenced by scb_demo_probe_and_report().

◆ k_scb_demo_trace_prefix

const uint8_t k_scb_demo_trace_prefix[] = "scb: trace="

static

Definition at line 61 of file main.c.

Referenced by scb_demo_probe_and_report().

◆ k_scb_demo_verdict_fail

const uint8_t k_scb_demo_verdict_fail[] = "scb: probe FAIL\r\n"

static

Definition at line 72 of file main.c.

Referenced by main().

◆ k_scb_demo_verdict_pass

const uint8_t k_scb_demo_verdict_pass[] = "scb: probe PASS\r\n"

static

Definition at line 71 of file main.c.

Referenced by main().

◆ k_scb_demo_vtor_prefix

const uint8_t k_scb_demo_vtor_prefix[] = "scb: vtor="

static

Definition at line 60 of file main.c.

Referenced by scb_demo_probe_and_report().

Enumerations

Functions

Variables

Detailed Description

Enumeration Type Documentation

◆ scb_demo_const_t

◆ scb_demo_fmt_t

Function Documentation

◆ main()

◆ scb_demo_panic_halt()

◆ scb_demo_probe_and_report()

◆ scb_demo_setup_or_halt()

◆ scb_demo_write()

◆ scb_demo_write_hex32()

Variable Documentation

◆ k_scb_demo_afsr_sep

◆ k_scb_demo_bfar_sep

◆ k_scb_demo_cfsr_prefix

◆ k_scb_demo_crlf

◆ k_scb_demo_dfsr_prefix

◆ k_scb_demo_hfsr_sep

◆ k_scb_demo_mmfar_prefix

◆ k_scb_demo_sfar_sep

◆ k_scb_demo_sfsr_prefix

◆ k_scb_demo_trace_prefix

◆ k_scb_demo_verdict_fail

◆ k_scb_demo_verdict_pass

◆ k_scb_demo_vtor_prefix