RIIC (ra8_i2c) target/peripheral responder driven by an external controller. More...

#include <stdint.h>
#include "ra8_board_ek_ra8d2.h"
#include "ra8_boot_entry.h"
#include "ra8_cgc.h"
#include "ra8_err.h"
#include "ra8_i2c.h"
#include "ra8_isr.h"
#include "ra8_mstp.h"
#include "ra8_time.h"

Include dependency graph for main.c:

Data Structures
struct	riic_target_ctx_t
	Callback context: the channel and the last controller-write payload. More...

Enumerations
enum	riic_target_u32_t : uint32_t { k_riic_target_baud = 115200U , k_riic_target_bus_hz = 100000U }
	32-bit app tunables (baud, bus rate). More...
enum	riic_target_u8_t : uint8_t { k_riic_target_channel = 1U , k_riic_target_own_addr = 0x42U , k_riic_target_buf_len = 8U , k_riic_target_seed_byte = 0xA5U , k_riic_target_seed_len = 1U }
	8-bit app tunables (channel, own address, buffer, reply). More...

Functions
static void	riic_target_panic_halt (void)
	Park forever after a fatal init failure.
static void	riic_target_on_event (void *vctx, ra8_i2c_peripheral_event_t event)
	Address-match callback: service the controller-driven transfer.
static void	riic_target_clocks_or_halt (void)
	Bring CGC + SysTick + MSTP up.
static void	riic_target_setup_or_halt (void)
	Bring CGC + console + RIIC1 up.
static ra8_err_t	riic_target_arm (riic_target_ctx_t *ctx)
	Arm the RIIC1 target at 0x42 with a clock-stretched callback.
void	main (void)
	Application entry.

Variables
static const uint8_t	k_riic_target_msg_armed [] = "riic-target: armed 0x42 poll-dispatch\r\n"
	SCI8 status strings emitted per target event.
static const uint8_t	k_riic_target_msg_rx [] = "riic-target: write serviced\r\n"
static const uint8_t	k_riic_target_msg_tx [] = "riic-target: read serviced\r\n"

Detailed Description

RIIC (ra8_i2c) target/peripheral responder driven by an external controller.

Tag: [Ring 6 / APP] {World: S}

Standalone EVM-tier app that exercises the ra8_i2c (RIIC) target (peripheral) role added for issue #189 – the own-address match, the attached-callback dispatch (ra8_i2c_peripheral_attach_handler / ra8_i2c_peripheral_dispatch) and the clock-stretched target TX/RX path.

The RA8D2 answers as an I2C target at 7-bit own address 0x42 on RIIC channel 1 (P512 SCL1 / P511 SDA1 – the board's Grove / Pmod / mikroBUS / Arduino I2C bus, per issue #46). An external I2C controller (a second board running i2c_loopback, a Raspberry Pi i2cset / i2cget, a bench host, ...) drives the bus; a single RA8D2 core cannot both clock a blocking controller transfer and service its own target at once, so the controller lives off-board. The flow:

ra8_cgc_init + ra8_mstp_init + ra8_time_init – clocks up.
ra8_board_uart_console_init – BSP SCI8 console (PD02 / PD03).
ra8_board_io_expander_apply_project_sw4_defaults() – the board's bench-validated RIIC1 bring-up (bus-recover, pull-ups, SCL1/SDA1 route, ra8_i2c_init(ch1)); reused verbatim from i2c_loopback.
ra8_i2c_peripheral_attach_handler + ra8_i2c_peripheral_init (own_addr 0x42, clock-stretch on) – arm the target and the callback.
Tight loop over ra8_i2c_peripheral_dispatch: when the external controller writes to 0x42, the callback drains it (_receive); when it reads 0x42, the callback echoes the last write (_transmit). Each serviced transfer prints on SCI8 and toggles LED1.

Hardware: EK-RA8D2 v1 + an external I2C controller wired to RIIC1 (SDA1/SCL1) with bus pull-ups. hw_pending: the on-wire target role is UNVERIFIED on silicon – ra8_emulator models RIIC only as a controller.

Copyright: Copyright (c) 2026 Brighton Sikarskie SPDX-License-Identifier: MIT

Since: 0.1.0

Definition in file main.c.

Enumeration Type Documentation

◆ riic_target_u32_t

enum riic_target_u32_t : uint32_t

32-bit app tunables (baud, bus rate).

Enumerator
k_riic_target_baud	SCI8 console baud.
k_riic_target_bus_hz	RIIC1 bus clock (unused here; the board bring-up owns the rate, kept for clarity).

Definition at line 55 of file main.c.

◆ riic_target_u8_t

enum riic_target_u8_t : uint8_t

8-bit app tunables (channel, own address, buffer, reply).

Enumerator
k_riic_target_channel	RIIC ch1 (P512 SCL1 / P511 SDA1).
k_riic_target_own_addr	Our 7-bit own address.
k_riic_target_buf_len	Controller-write capture size.
k_riic_target_seed_byte	Seed reply until a write arrives.
k_riic_target_seed_len	Seed reply length.

Definition at line 62 of file main.c.

Function Documentation

◆ main()

void main ( void )

Application entry.

The application entry point Reset_Handler hands control to.

Arms the RIIC1 target and polls the dispatcher.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: The CPU stays in the dispatch poll loop forever.; On any fatal init error the CPU parks in riic_target_panic_halt.

Since: 0.1.0

Definition at line 239 of file main.c.

References k_ra8_ok, k_riic_target_channel, k_riic_target_msg_armed, k_riic_target_seed_byte, k_riic_target_seed_len, ra8_board_uart_console_write(), ra8_i2c_peripheral_dispatch(), ra8_isr_globals_enable(), riic_target_arm(), riic_target_panic_halt(), riic_target_setup_or_halt(), and s_ctx.

◆ riic_target_arm()

ra8_err_t riic_target_arm ( riic_target_ctx_t * ctx )

staticnodiscard

Arm the RIIC1 target at 0x42 with a clock-stretched callback.

Parameters

[in,out] ctx Callback context to register (channel pre-filled).

Returns: ra8_err_t from the attach + arm sequence.

Return values

k_ra8_ok Target armed and the callback attached.

Precondition: RIIC1 is initialized (riic_target_setup_or_halt ran).; ctx outlives every ra8_i2c_peripheral_dispatch call.

Postcondition: On success the channel answers 0x42 and fires riic_target_on_event.; Clock stretching (ICMR3.WAIT) is armed so the poll loop can service.

Since: 0.1.0

Definition at line 210 of file main.c.

References k_ra8_err_null_ptr, k_ra8_i2c_peripheral_slot_0, k_ra8_ok, k_riic_target_channel, k_riic_target_own_addr, ra8_i2c_peripheral_attach_handler(), ra8_i2c_peripheral_init(), and riic_target_on_event().

Referenced by main().

◆ riic_target_clocks_or_halt()

void riic_target_clocks_or_halt ( void )

static

Bring CGC + SysTick + MSTP up.

Panic-halts on any failure.

Precondition: IRQs masked or single-threaded init context.

Postcondition: On success CGC is live and SysTick is ticking.

Since: 0.1.0

Definition at line 152 of file main.c.

References k_ra8_clock_id_cpuclk0, k_ra8_ok, ra8_cgc_get_clock_hz(), ra8_cgc_init(), ra8_mstp_init(), ra8_time_init(), and riic_target_panic_halt().

Referenced by riic_target_setup_or_halt().

◆ riic_target_on_event()

void riic_target_on_event	(	void *	vctx,
		ra8_i2c_peripheral_event_t	event )

static

Address-match callback: service the controller-driven transfer.

Runs in polled ra8_i2c_peripheral_dispatch context (not an ISR), so the blocking target transfers and console writes here are safe. A controller write is drained into ctx->rx; a controller read is answered by echoing the last captured write (or the seed byte before any write arrives).

Parameters

[in]	vctx	Opaque riic_target_ctx_t* context.
[in]	event	Decoded target event from the dispatcher.

Precondition: vctx is a live riic_target_ctx_t for an armed channel.

Postcondition: On a write ctx->rx holds the payload; on a read it was transmitted.

Since: 0.1.0

Definition at line 121 of file main.c.

References riic_target_ctx_t::channel, k_ra8_board_led1, k_ra8_i2c_peripheral_event_read, k_ra8_i2c_peripheral_event_write, k_riic_target_buf_len, k_riic_target_msg_rx, k_riic_target_msg_tx, ra8_board_led_toggle(), ra8_board_uart_console_write(), ra8_i2c_peripheral_receive(), ra8_i2c_peripheral_transmit(), riic_target_ctx_t::rx, and riic_target_ctx_t::rx_len.

Referenced by riic_target_arm().

◆ riic_target_panic_halt()

void riic_target_panic_halt ( void )

static

Park forever after a fatal init failure.

Precondition: Called only after a fatal error in boot.

Postcondition: CPU is parked; only a debugger or external reset wakes it.

Since: 0.1.0

Definition at line 98 of file main.c.

Referenced by main(), riic_target_clocks_or_halt(), and riic_target_setup_or_halt().

◆ riic_target_setup_or_halt()

void riic_target_setup_or_halt ( void )

static

Bring CGC + console + RIIC1 up.

Panic-halts on any failure.

Reuses the board's bench-validated RIIC1 bring-up (ra8_board_io_expander_apply_project_sw4_defaults) exactly as i2c_loopback does, then brings up LED1.

Precondition: Reset boot finished; single-threaded init context.

Postcondition: On success RIIC1 (ch1) is initialized and LED1 is ready.

Since: 0.1.0

Definition at line 181 of file main.c.

References k_ra8_board_led1, k_ra8_ok, k_riic_target_baud, ra8_board_io_expander_apply_project_sw4_defaults(), ra8_board_led_init(), ra8_board_uart_console_init(), riic_target_clocks_or_halt(), and riic_target_panic_halt().

Referenced by main().

Variable Documentation

◆ k_riic_target_msg_armed

const uint8_t k_riic_target_msg_armed[] = "riic-target: armed 0x42 poll-dispatch\r\n"

static

SCI8 status strings emitted per target event.

Definition at line 87 of file main.c.

Referenced by main().

◆ k_riic_target_msg_rx

const uint8_t k_riic_target_msg_rx[] = "riic-target: write serviced\r\n"

static

Definition at line 88 of file main.c.

Referenced by riic_target_on_event().

◆ k_riic_target_msg_tx

const uint8_t k_riic_target_msg_tx[] = "riic-target: read serviced\r\n"

static

Definition at line 89 of file main.c.

Referenced by riic_target_on_event().

Data Structures

Enumerations

Functions

Variables

Detailed Description

Enumeration Type Documentation

◆ riic_target_u32_t

◆ riic_target_u8_t

Function Documentation

◆ main()

◆ riic_target_arm()

◆ riic_target_clocks_or_halt()

◆ riic_target_on_event()

◆ riic_target_panic_halt()

◆ riic_target_setup_or_halt()

Variable Documentation

◆ k_riic_target_msg_armed

◆ k_riic_target_msg_rx

◆ k_riic_target_msg_tx