40typedef enum : uint32_t {
46typedef enum : uint8_t {
74 __asm__
volatile(
"wfi");
97 uint32_t cpuclk0_hz = 0U;
void main(void)
Secure fallback main entry point.
static const uint8_t s_icu_extint_demo_msg_boot[]
static const uint8_t s_icu_extint_demo_msg_press[]
Fixed UART diagnostics for boot and an observed SW1 IRQ edge.
static ra8_err_t internal_icu_extint_demo_arm(void)
Configure SW1's IRQ for falling-edge detection w/ digital filter.
static void internal_icu_extint_demo_setup_or_halt(void)
Initialize clocks, ICU, console, LED1, and the SW1 input.
icu_extint_demo_irq_t
SW1 -> IRQ13-DS (EK-RA8D2 UM Table 25 p 32).
@ k_icu_extint_demo_irq_num
Icu extint demo IRQ number.
@ k_icu_extint_demo_irqf_mask
IRQCRi.IRQ_DETECT (HUM 14.2.12).
icu_extint_demo_const_t
Demo tunables.
@ k_icu_extint_demo_poll_ms
Icu extint demo poll ms.
@ k_icu_extint_demo_baud
Icu extint demo baud.
static void internal_icu_extint_demo_panic_halt(void)
Park the processor after an unrecoverable ICU demo failure.
Annotation-attribute framework macros for ra8-firmware.
#define RA8_INTERNAL
Marker that a function is intended to be static (file-local).
Board-support layer for the Renesas EK-RA8D2 v1 evaluation kit.
ra8_err_t ra8_board_led_toggle(ra8_board_led_id_t led)
Toggle led's output state.
ra8_err_t ra8_board_sw_init(ra8_board_sw_id_t sw)
Configure a switch pin as an input with internal pull-up.
@ k_ra8_board_sw1
SW1, P009, IRQ13-DS (jumper E31).
ra8_err_t ra8_board_led_init(ra8_board_led_id_t led)
Configure led as a digital output, initial level low (off).
@ k_ra8_board_led1
LED1, BLUE, P600 (jumper E27).
ra8_err_t ra8_board_uart_console_write(const uint8_t *data, size_t len)
Polled blocking write to the J-Link OB VCOM console.
ra8_err_t ra8_board_uart_console_init(uint32_t baud)
Configure SCI8 + PD02/PD03 as the debug-console UART.
Boot entry points shared between a vector table and its startup code.
High-level Clock Generation Circuit driver.
ra8_err_t ra8_cgc_get_clock_hz(ra8_clock_id_t id, uint32_t *out_hz)
Query the current frequency of a clock-tree domain.
@ k_ra8_clock_id_cpuclk0
Cortex-M85 CPUCLK0.
ra8_err_t ra8_cgc_init(void)
Configure the clock tree to a safe default.
Error Code Definitions for ra8-firmware.
@ k_ra8_ok
Success – operation completed with all postconditions satisfied.
ra8_err_codes_t ra8_err_t
Canonical error-return type used by every ra8-firmware API.
Interrupt Control Unit driver (IRQ pins, NMI).
ra8_err_t ra8_icu_init(void)
Reset every ICU-owned register to its post-reset state.
ra8_err_t ra8_icu_read_irqcr(uint8_t irq_num, uint8_t *out_val)
Read the raw 8-bit IRQCRi value.
ra8_err_t ra8_icu_configure_irq_pin(uint8_t irq_num, const ra8_icu_irq_cfg_t *cfg)
Programme one IRQCRi register.
@ k_ra8_icu_fclksel_pclkb_64
11: sample once per 64 cycles.
@ k_ra8_icu_irqmd_falling
00: falling edge.
NVIC + ICU IELSR allocator.
void ra8_isr_globals_enable(void)
Globally enable maskable interrupts (PRIMASK = 0).
SysTick-based tick counter, delay and timestamp helpers.
ra8_err_t ra8_time_init(uint32_t cpu_hz)
Initialise SysTick for a 1 kHz tick interrupt.
void ra8_delay_ms(uint32_t ms)
Busy-wait for at least ms milliseconds.
One external-IRQ-pin configuration descriptor.