60typedef enum : uint32_t {
68typedef enum : uint8_t {
82typedef enum : uint16_t {
87typedef enum : uint8_t {
95typedef enum : uint8_t {
129 __asm__
volatile(
"wfi");
148 uint32_t cpuclk0_hz = 0U;
void main(void)
Secure fallback main entry point.
static void lin_hil_setup_or_halt(void)
Bring up CGC + SysTick + console + LED, route Pmod1, init LIN.
lin_hil_id_t
The four rotating demo frame ids (arbitrary 6-bit LIN identifiers).
@ k_lin_hil_id_0
Demo frame id 0.
@ k_lin_hil_id_2
Demo frame id 2.
@ k_lin_hil_id_1
Demo frame id 1.
@ k_lin_hil_id_3
Demo frame id 3.
static const uint8_t k_lin_hil_frame_msg[]
static const uint8_t k_lin_hil_fault_msg[]
lin_hil_payload_byte_t
The two-byte demo response payload bytes.
@ k_lin_hil_pay_1
Response payload byte 1.
@ k_lin_hil_pay_0
Response payload byte 0.
static void lin_hil_panic_halt(void)
Halt forever in WFI – used as a panic stop on init failure.
lin_hil_config_t
Compile-time settings for the LIN commander demo.
@ k_lin_hil_console_baud
SCI8 status-console baud.
@ k_lin_hil_period_ms
Delay between LIN frames.
@ k_lin_hil_pclk_hz
PCLKB used for the LIN BRR calc.
@ k_lin_hil_lin_baud
SCI2 LIN bus baud (<= 20 kbps).
lin_hil_frame_t
LIN channel + frame constants.
@ k_lin_hil_data_len
Response payload length.
@ k_lin_hil_channel
SCI2 (Pmod1 TXD2/RXD2) is the LIN bus.
@ k_lin_hil_id_count
Number of rotating demo frame ids.
static const uint8_t k_lin_hil_ids[k_lin_hil_id_count]
Rotating demo frame ids (arbitrary 6-bit LIN identifiers).
static const uint8_t k_lin_hil_payload[k_lin_hil_data_len]
Two-byte response payload published for every frame.
static ra8_err_t lin_hil_send_frame(uint8_t id)
Send one LIN frame: header + published data response.
static const uint8_t k_lin_hil_banner[]
Banner + per-frame markers (must remain 7-bit ASCII).
lin_hil_break_t
Break-field length programmed into XCR2.BFLW.
@ k_lin_hil_break_len
XCR2.BFLW break-field length.
Board-support layer for the Renesas EK-RA8D2 v1 evaluation kit.
ra8_err_t ra8_board_led_toggle(ra8_board_led_id_t led)
Toggle led's output state.
ra8_err_t ra8_board_led_init(ra8_board_led_id_t led)
Configure led as a digital output, initial level low (off).
@ k_ra8_board_pmod1_uart_txd
Pmod1 UART TXD (TXD2), P801.
@ k_ra8_board_pmod1_uart_rxd
Pmod1 UART RXD (RXD2), P802.
@ k_ra8_board_led1
LED1, BLUE, P600 (jumper E27).
ra8_err_t ra8_board_uart_console_write(const uint8_t *data, size_t len)
Polled blocking write to the J-Link OB VCOM console.
ra8_err_t ra8_board_uart_console_init(uint32_t baud)
Configure SCI8 + PD02/PD03 as the debug-console UART.
Boot entry points shared between a vector table and its startup code.
High-level Clock Generation Circuit driver.
ra8_err_t ra8_cgc_get_clock_hz(ra8_clock_id_t id, uint32_t *out_hz)
Query the current frequency of a clock-tree domain.
@ k_ra8_clock_id_cpuclk0
Cortex-M85 CPUCLK0.
ra8_err_t ra8_cgc_init(void)
Configure the clock tree to a safe default.
Error Code Definitions for ra8-firmware.
@ k_ra8_ok
Success – operation completed with all postconditions satisfied.
ra8_err_codes_t ra8_err_t
Canonical error-return type used by every ra8-firmware API.
PSEL codes for peripheral pin routing on the RA8D2.
@ k_ra8_psel_sci_async
00100b: SCI async serial (UART).
NVIC + ICU IELSR allocator.
void ra8_isr_globals_enable(void)
Globally enable maskable interrupts (PRIMASK = 0).
Typed Port / Pin Constants for the RA8D2 IOPORT Module.
ra8_port_pin_t
Packed (port << 8) | pin pin identifier.
High-level GPIO helpers on top of the PORT + PFS register layer.
ra8_err_t ra8_pfs_route_peripheral(ra8_port_pin_t pin, ra8_psel_t psel, const char *owner)
Route a pin to a non-IRQ peripheral function via PFS.PSEL.
@ k_ra8_sci_stop_1
RA8 SCI stop 1.
@ k_ra8_sci_parity_none
RA8 SCI parity none.
@ k_ra8_sci_data_8
RA8 SCI data 8.
LIN (Local Interconnect Network) commander + responder driver on SCI_B.
uint8_t ra8_sci_lin_pid(uint8_t id)
Compute the LIN protected identifier (PID) from a frame id.
@ k_ra8_sci_lin_role_commander
Generate the header (bus controller).
ra8_err_t ra8_sci_lin_init(uint8_t channel, const ra8_sci_lin_cfg_t *cfg)
Configure an SCI_B channel for a LIN role (commander or responder).
@ k_ra8_sci_lin_checksum_enhanced
LIN 2.x: sum of PID + data bytes.
@ k_ra8_sci_lin_clk_div16
Break timer clock = TCLK / 16.
ra8_err_t ra8_sci_lin_send_header(uint8_t channel, uint8_t id)
Transmit a full LIN header: break + SYNC (0x55) + PID.
ra8_err_t ra8_sci_lin_send_response(uint8_t channel, ra8_sci_lin_checksum_mode_t mode, uint8_t pid, const uint8_t *data, uint8_t len)
Publish a LIN response: data bytes followed by the checksum.
SysTick-based tick counter, delay and timestamp helpers.
ra8_err_t ra8_time_init(uint32_t cpu_hz)
Initialise SysTick for a 1 kHz tick interrupt.
void ra8_delay_ms(uint32_t ms)
Busy-wait for at least ms milliseconds.
Configuration descriptor for ra8_sci_lin_init.