44typedef enum : uint32_t {
50typedef enum : uint16_t {
58typedef enum : uint8_t {
84 __asm__
volatile(
"wfi");
107 uint32_t cpuclk0_hz = 0U;
void main(void)
Secure fallback main entry point.
agt_periodic_timer_t
AGT channel + reload (16-bit, ~1 Hz at PCLKB / 8192 div).
@ k_agt_periodic_channel
AGT periodic channel.
@ k_agt_periodic_reload
AGT periodic reload.
static void internal_agt_periodic_panic_halt(void)
Park the processor after an unrecoverable AGT demo failure.
static void internal_agt_periodic_setup_or_halt(void)
Initialize clocks, timing, console, and the AGT status LED.
static const uint8_t s_agt_periodic_log_msg[]
UART diagnostic emitted for every observed AGT underflow.
agt_periodic_status_t
AGTCR underflow status bit (HUM Ch 24, AGTCR.TUNDF).
@ k_agt_periodic_undf_bit
AGT periodic undf bit.
agt_periodic_const_t
Demo tunables.
@ k_agt_periodic_baud
AGT periodic baud.
@ k_agt_periodic_poll_ms
AGT periodic poll ms.
static ra8_err_t internal_agt_periodic_arm(void)
Arm AGT0 in free-running mode.
Asynchronous General-Purpose Timer (AGT) driver header.
ra8_err_t ra8_agt_start_free_run(uint8_t channel, uint16_t reload)
Start an AGT channel in free-running mode.
ra8_err_t ra8_agt_get_status(uint8_t channel, uint8_t *out_mask)
Read the AGTCR status register.
ra8_err_t ra8_agt_stop(uint8_t channel)
Stop an AGT channel.
Annotation-attribute framework macros for ra8-firmware.
#define RA8_INTERNAL
Marker that a function is intended to be static (file-local).
Board-support layer for the Renesas EK-RA8D2 v1 evaluation kit.
ra8_err_t ra8_board_led_toggle(ra8_board_led_id_t led)
Toggle led's output state.
ra8_err_t ra8_board_led_init(ra8_board_led_id_t led)
Configure led as a digital output, initial level low (off).
@ k_ra8_board_led1
LED1, BLUE, P600 (jumper E27).
ra8_err_t ra8_board_uart_console_write(const uint8_t *data, size_t len)
Polled blocking write to the J-Link OB VCOM console.
ra8_err_t ra8_board_uart_console_init(uint32_t baud)
Configure SCI8 + PD02/PD03 as the debug-console UART.
Boot entry points shared between a vector table and its startup code.
High-level Clock Generation Circuit driver.
ra8_err_t ra8_cgc_get_clock_hz(ra8_clock_id_t id, uint32_t *out_hz)
Query the current frequency of a clock-tree domain.
@ k_ra8_clock_id_cpuclk0
Cortex-M85 CPUCLK0.
ra8_err_t ra8_cgc_init(void)
Configure the clock tree to a safe default.
Error Code Definitions for ra8-firmware.
@ k_ra8_ok
Success – operation completed with all postconditions satisfied.
ra8_err_codes_t ra8_err_t
Canonical error-return type used by every ra8-firmware API.
NVIC + ICU IELSR allocator.
void ra8_isr_globals_enable(void)
Globally enable maskable interrupts (PRIMASK = 0).
SysTick-based tick counter, delay and timestamp helpers.
ra8_err_t ra8_time_init(uint32_t cpu_hz)
Initialise SysTick for a 1 kHz tick interrupt.
void ra8_delay_ms(uint32_t ms)
Busy-wait for at least ms milliseconds.