main.c File Reference

AGT 1 Hz tick + LED1 blink demo for EK-RA8D2. More...

#include <stdint.h>
#include "ra8_agt.h"
#include "ra8_attributes.h"
#include "ra8_board_ek_ra8d2.h"
#include "ra8_boot_entry.h"
#include "ra8_cgc.h"
#include "ra8_err.h"
#include "ra8_isr.h"
#include "ra8_time.h"

Include dependency graph for main.c:

Go to the source code of this file.

Enumerations
enum	agt_periodic_const_t : uint32_t {   k_agt_periodic_baud = 115200U ,   k_agt_periodic_poll_ms = 10U }
	Demo tunables. More...
enum	agt_periodic_timer_t : uint16_t {   k_agt_periodic_channel = 0U ,   k_agt_periodic_reload = 0x7FFFU }
	AGT channel + reload (16-bit, ~1 Hz at PCLKB / 8192 div). More...
enum	agt_periodic_status_t : uint8_t { k_agt_periodic_undf_bit = 0x20U }
	AGTCR underflow status bit (HUM Ch 24, AGTCR.TUNDF). More...

Functions
static void	internal_agt_periodic_panic_halt (void)
	Park the processor after an unrecoverable AGT demo failure.
static void	internal_agt_periodic_setup_or_halt (void)
	Initialize clocks, timing, console, and the AGT status LED.
static ra8_err_t	internal_agt_periodic_arm (void)
	Arm AGT0 in free-running mode.
void	main (void)
	The application entry point Reset_Handler hands control to.

Variables
static const uint8_t	s_agt_periodic_log_msg [] = "agt: tick OK\r\n"
	UART diagnostic emitted for every observed AGT underflow.

Detailed Description

AGT 1 Hz tick + LED1 blink demo for EK-RA8D2.

Tag

[Ring 6 / APP] {World: S}

Brings up CGC + SysTick + the BSP UART console (SCI8 on PD_02 / PD_03 via ra8_board_uart_console_init), starts AGT0 in free-running mode with a reload value chosen to underflow at roughly 1 Hz, then sits in the main loop polling AGTCR for the underflow flag. Each underflow toggles board LED1 (BLUE) and emits a one-line tick log over the J-Link OB CDC console.

The demo deliberately does not wire AGT0 into NVIC / ra8_isr – it polls the AGTCR status bits via ra8_agt_get_status to keep the code path identical between the EK-RA8D2 target build and the host unit-test build (RA8_OFF_TARGET).

Sequence:

1. CGC + SysTick + UART bring-up (panic-halt on any error).
2. ra8_board_led_init(LED1).
3. ra8_agt_start_free_run(0, k_agt_periodic_reload).
4. Loop: poll AGTCR, on underflow: clear, toggle LED1, log tick.

Copyright

Copyright (c) 2026 Brighton Sikarskie SPDX-License-Identifier: MIT

Since

0.1.0

Definition in file main.c.

Enumeration Type Documentation

agt_periodic_const_t

enum agt_periodic_const_t : uint32_t

Demo tunables.

Enumerator
k_agt_periodic_baud	AGT periodic baud.
k_agt_periodic_poll_ms	AGT periodic poll ms.

Definition at line 44 of file main.c.

agt_periodic_status_t

enum agt_periodic_status_t : uint8_t

AGTCR underflow status bit (HUM Ch 24, AGTCR.TUNDF).

Enumerator
k_agt_periodic_undf_bit	AGT periodic undf bit.

Definition at line 58 of file main.c.

agt_periodic_timer_t

enum agt_periodic_timer_t : uint16_t

AGT channel + reload (16-bit, ~1 Hz at PCLKB / 8192 div).

Enumerator
k_agt_periodic_channel	AGT periodic channel.
k_agt_periodic_reload	AGT periodic reload.

Definition at line 50 of file main.c.

Function Documentation

internal_agt_periodic_arm()

ra8_err_t internal_agt_periodic_arm ( void )

staticnodiscard

Arm AGT0 in free-running mode.

Starts the selected AGT channel with the demonstration reload value so the poll loop can observe and clear repeated underflow status.

MC/DC:

Compound decision: ra8_agt_start_free_run != ok. One atomic condition x 2 vectors – ok (golden) and bad-channel reject (covered in test_app_agt_periodic.c).

Returns

ra8_err_t Status from starting the AGT free-running counter.

Return values

k_ra8_ok	AGT0 accepted the reload and started counting.
(other)	The AGT driver rejected or could not start the channel.

Precondition

internal_agt_periodic_setup_or_halt completed successfully.

AGT channel 0 is not owned by another driver.

Postcondition

On success AGT0 counts continuously from the requested reload.

On failure no running counter is promised by this helper.

Note

Underflow status handling remains the caller's responsibility.

Since

0.1.0

Definition at line 148 of file main.c.

References k_agt_periodic_channel, k_agt_periodic_reload, ra8_agt_start_free_run(), and RA8_INTERNAL.

Referenced by main().

internal_agt_periodic_panic_halt()

void internal_agt_periodic_panic_halt ( void )

static

Park the processor after an unrecoverable AGT demo failure.

Enters a permanent wait-for-interrupt loop so the timer status, LED state, and last UART event remain observable to a debugger.

Returns

None.

Precondition

The caller has determined timer polling cannot safely continue.

Any required failure diagnostic has already been completed.

Postcondition

The function never returns to its caller.

No further timer status reads or underflow messages occur.

Note

Fatal-path helper for this single-core image only.

Since

0.1.0

Definition at line 81 of file main.c.

References RA8_INTERNAL.

Referenced by internal_agt_periodic_setup_or_halt(), and main().

internal_agt_periodic_setup_or_halt()

void internal_agt_periodic_setup_or_halt ( void )

static

Initialize clocks, timing, console, and the AGT status LED.

Starts CGC and the millisecond time base, opens the UART console, and claims LED1 before the timer is armed. Any failed dependency enters the permanent panic halt.

Returns

None.

Precondition

Reset-time initialization configured the core and C runtime.

The board console and LED1 are available to this image.

Postcondition

On success the time base, console, and LED1 are ready for AGT polling.

On failure the function never returns to its caller.

Note

Single-shot boot helper; it is not reentrant.

Since

0.1.0

Definition at line 105 of file main.c.

References internal_agt_periodic_panic_halt(), k_agt_periodic_baud, k_ra8_board_led1, k_ra8_clock_id_cpuclk0, k_ra8_ok, ra8_board_led_init(), ra8_board_uart_console_init(), ra8_cgc_get_clock_hz(), ra8_cgc_init(), RA8_INTERNAL, and ra8_time_init().

Referenced by main().

main()

void main

(

void

)

The application entry point Reset_Handler hands control to.

Returns void, not int. This is a freestanding image: there is no hosted C environment, no process and nothing to report an exit status to. ISO C fixes main at int only for a hosted implementation; for a freestanding one (C23 5.1.2.1) the startup function's name and type are implementation-defined, and this is that definition. Reset_Handler discards no value because there is none to discard, and if main ever does return, startup halts the CPU rather than resuming anything.

The firmware lane is compiled -ffreestanding (see cmake/ra8_add_app.cmake) and the flag and this signature travel together: without it both GCC and clang reject a non-int main (-Wmain / -Wmain-return-type). Do not remove one without the other.

That coupling is why the declaration sits behind __STDC_HOSTED__ == 0, which -ffreestanding sets and a hosted build does not. The guard is not defensive dressing: this header is reachable from host builds (the unit tests compile ra8_core natively), and an unguarded void main(void); makes every hosted translation unit that includes it fail with conflicting types for 'main' against its own ISO int main. The declaration therefore exists exactly where its contract does.

Hosted first-party code – everything under tests/ and tools/ – uses the ISO int main(...) contract instead, because it genuinely does run under an OS that reads the exit status. scripts/checks/check_entry_points.py holds each domain to its own contract (#707).

Declared here, once, for the same reason SystemInit is: every vector_table.c used to restate it as a local extern int32_t main(void);, sixteen copies that no compiler ever compared against the definition – and roughly thirty of them had silently drifted out of agreement with the main they called.

Precondition

Reset_Handler has copied .data and zeroed .bss.

SystemInit has configured the clock tree and VTOR.

Postcondition

Control does not return; the image runs until reset or halt.

Any value the application wanted to report has been logged, not returned.

Note

Not thread-safe; single-threaded startup context only.

Warning

Only valid while the translation unit is compiled -ffreestanding. A hosted build rejects this signature.

See also

SystemInit()

Since

0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + BSP audio then plays blocks.

Precondition

Reset_Handler has copied .data and zeroed .bss.

SystemInit has set VTOR, FPU, and priority grouping.

Postcondition

On clean entry the CPU stays in the playback loop forever.

On any HAL init failure the function halts in WFI.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + GPT triple, runs sweep.

Precondition

Reset_Handler has copied .data and zeroed .bss.

SystemInit has set VTOR, FPU, and priority grouping.

Postcondition

On clean entry the CPU stays in the sweep loop forever.

On any HAL init failure the function halts in WFI.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Brings up clocks + UART + RMII pins, then ThreadX.

Precondition

Reset_Handler has copied .data and zeroed .bss.

Postcondition

On clean entry the kernel runs the worker thread once.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Brings up clocks + UART, then enters ThreadX.

Precondition

Reset_Handler has copied .data and zeroed .bss.

SystemInit has set VTOR, FPU, and priority grouping.

Postcondition

On clean entry the kernel runs the worker thread forever.

On any HAL init failure the function halts in WFI.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Brings up LED, console, SDHI pins, then ThreadX.

Precondition

Reset_Handler has copied .data + zeroed .bss.

SystemInit has set VTOR, FPU, and priority grouping.

Postcondition

CPUCLK0 is raised to the PLL1 target before the kernel starts.

On clean entry the SD card thread runs forever.

On any HAL init failure the function halts in __WFI.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + USB-FS + UAC1, then enters the iso-IN feed loop forever.

Precondition

Reset_Handler has copied .data and zeroed .bss.

SystemInit has set VTOR, FPU, and priority grouping.

Postcondition

On clean entry the CPU stays in the iso-IN feed loop forever.

On any HAL init failure the function halts in WFI.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

SystemInit set VTOR / FPU / priority grouping.

The application entry point Reset_Handler hands control to.

See file header.

Precondition

Boot init has completed.

The secure-boot library's BLXNS into NS image either failed or was skipped (the call site in ra8_trustzone_init is a no-op on host builds).

Postcondition

Diagnostic counter latched, CPU parked in a halt loop.

Function never returns.

Note

Single-threaded entry.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler copied .data and zeroed .bss.

SystemInit set VTOR / FPU / priority grouping.

Postcondition

On success g_eoh_chapters / g_eoh_crc hold the parsed results, the banner is emitted, and g_eoh_heartbeat advances once per frame.

On any failure g_eoh_err is non-zero and the CPU parks (no heartbeat).

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler copied .data and zeroed .bss.

SystemInit set VTOR / FPU / priority grouping.

Postcondition

The chapters/ch0-CRC banner is emitted; the CPU then loops in WFI.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler copied .data and zeroed .bss.

SystemInit set VTOR / FPU / priority grouping.

Postcondition

On success the g_etoc_* result globals hold the parsed TOC values, the banner is emitted, and g_etoc_heartbeat advances once per frame.

On any failure g_etoc_err is non-zero and the CPU parks (no heartbeat).

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler copied .data and zeroed .bss; SystemInit set VTOR/FPU.

Postcondition

The shelf scans on the panel; taps open books, browse, and read.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler copied .data and zeroed .bss.

SystemInit set VTOR / FPU / priority grouping.

Postcondition

The slab/arena/tile/vmem banner is emitted; the CPU then loops in WFI.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler copied .data and zeroed .bss.

SystemInit set VTOR / FPU / priority grouping.

Postcondition

On success the cache globals are latched and g_pc_heartbeat advances.

On any failure g_pc_err is non-zero and the CPU parks (no heartbeat).

Since

0.1.0

The application entry point Reset_Handler hands control to.

Profiles power modes once a second.

Precondition

Reset_Handler has copied .data and zeroed .bss.

SystemInit has set VTOR, FPU, and priority grouping.

Postcondition

On clean entry the CPU stays in the profile + blink loop.

On any HAL hard error LED2 latches ON.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler has copied .data and zeroed .bss.

The shared board boot files installed the vector table.

Postcondition

The demo has run once and its verdict banner is streaming steadily.

The CPU idles re-emitting the banner (or halts after a fatal init error).

Since

0.1.0

The application entry point Reset_Handler hands control to.

Brings up the clocks, console, SPI, and SD card, then runs the shared ra8_io VFS round-trip over the SD-over-SPI block device. On success it prints the exact PASS banner the HIL runner and ra8_emulator smoke gate scrape for; on any failure it prints FAIL and parks the core.

Precondition

Reset_Handler has copied .data and zeroed .bss.

SystemInit has set VTOR, FPU, and priority grouping.

Postcondition

On a clean run the CPU loops forever after the PASS banner.

On any failure the function prints FAIL and halts in WFI.

Note

Not thread-safe; this is the single-threaded app entry.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Initialises logging and the console, brings up the OSPI NOR volume, runs the erase-before-write round-trip, and prints a single PASS/FAIL verdict line over SCI8 before parking in an infinite loop.

Precondition

SystemInit configured VTOR / FPU / priority grouping.

The OSPI NOR array is present (modelled in ra8_emulator, real on silicon).

Postcondition

Exactly one PASS or FAIL verdict line has been queued on SCI8.

Control parks in an infinite loop; the function never returns.

Note

Single-threaded; runs to the park loop on the main stack.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler copied .data and zeroed .bss.

SystemInit set VTOR / FPU / priority grouping.

Postcondition

The page-count + render-hash banner is emitted; the CPU loops in WFI.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler copied .data and zeroed .bss.

SystemInit set VTOR / FPU / priority grouping.

Postcondition

The cal=OK / cal=SKIP result and the finger-free touchcal: ready sentinel are emitted; the CPU then loops in WFI.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler copied .data and zeroed .bss.

SystemInit set VTOR / FPU / priority grouping.

Postcondition

The open=OK touch banner is emitted; the CPU then loops in WFI.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Both USB controllers' clocks and pins come up before the kernel so the workers only deal with stack bring-up.

Precondition

Reset_Handler copied .data and zeroed .bss.

SystemInit set VTOR, FPU, priority grouping.

Postcondition

On clean entry the CPU stays in tx_kernel_enter forever.

On any HAL init failure the function halts in WFI.

Note

Single entry point; not re-entrant.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging and the clock tree, releases the Cortex-M33 (which then blinks LED1 via ra8_pcntr_set_output()), and idles. See the file header.

Precondition

SystemInit has completed core bring-up.

The M33 is held in reset by hardware until released here.

Postcondition

The M33 has been released and is blinking LED1.

This function never returns to its caller.

Note

Single-threaded; no RTOS on the M85 in this template.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

The application links ra8_c6link and ESP-hosted generated codecs.

No hardware validation is inferred from this function.

Postcondition

No c6link operation is attempted.

No network or storage state is modified.

Note

Single-threaded compile fixture.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, the clock tree, and the VCOM console, runs the cacheable-SRAM round-trip with the D-cache that SystemInit() enabled through ra8_cache_dcache_enable(), emits the matching PASS / FAIL banner over the console and ra8_log, then parks in WFI. Every byte the self-test touches runs with the L1 caches + MPU enabled by the shared boot (RA8_BOOT_ENABLE_CACHE_MPU + RA8_BOOT_CACHE_VIA_HAL).

Precondition

Reset_Handler has copied .data and zeroed .bss.

SystemInit enabled the MPU + I-cache + D-cache via the ra8_cache HAL.

Postcondition

Exactly one banner (PASS or FAIL) has been emitted.

The core is parked in WFI.

Note

Single-threaded; no RTOS and no IRQ sources in this template.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Publishes the mailbox, releases the Cortex-M33 into the emitter, yields until it signals done, validates the blob the M33 built, then logs the PASS/FAIL verdict and the chapter count read back from the blob. See the file header for the offload narrative.

Precondition

SystemInit has completed core bring-up.

The M33 is held inactive by hardware until released here.

Postcondition

The M33 has built a RABOOK1 blob and the M85 has validated it.

This function never returns to its caller.

Note

Single-threaded; no RTOS on the M85 in this example.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler copied .data and zeroed .bss.

SystemInit set VTOR / FPU / priority grouping.

Postcondition

On success the CPU heartbeats after epaper: PASS.

On any HAL error the console prints epaper: FAIL and the red LED latches on.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler copied .data and zeroed .bss.

SystemInit set VTOR / FPU / priority grouping.

Postcondition

The chapters/toc/cover banner is emitted; CPU loops in WFI.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler copied .data and zeroed .bss.

SystemInit set VTOR / FPU / priority grouping.

Postcondition

The reader loop runs forever, redrawing on each tap.

A page-1 banner is emitted once after the first render.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler copied .data and zeroed .bss.

SystemInit set VTOR / FPU / priority grouping.

Postcondition

The cover-size / framebuffer-CRC banner is emitted; CPU loops in WFI.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler copied .data and zeroed .bss.

SystemInit set VTOR / FPU / priority grouping.

Postcondition

The panel shows the reader screen and the input loop runs forever.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Publishes the mailbox, arms the IPC0 wake and configures the LPM block, releases the Cortex-M33 into the reader, waits for the first held page, logs the page-0 verdict, then runs the #150 mode-switch cycle – parking in low-power WFI and waking on the M33's page-turn pokes – before logging the handoff verdict and parking for good. See the file header for the narrative.

Precondition

SystemInit has completed core bring-up.

The M33 is held inactive by hardware until released here.

Postcondition

The M33 has rendered + re-rendered the held page and the M85 is parked.

This function never returns to its caller.

Note

Single-threaded; no RTOS on the M85 in this example.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler copied .data and zeroed .bss.

SystemInit set VTOR / FPU / priority grouping.

Postcondition

The boot banner is emitted; the reader loop services taps forever.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Brings up the timebase then measures forever.

Precondition

Reset_Handler has copied .data and zeroed .bss.

SystemInit has set VTOR, FPU, and priority grouping.

Postcondition

On clean entry the CPU stays in the measure + blink loop forever.

On any HAL init failure the function halts in WFI.

Note

Never returns.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Arms the RIIC1 target and polls the dispatcher.

Precondition

Reset_Handler has copied .data and zeroed .bss.

SystemInit has set VTOR, FPU, and priority grouping.

Postcondition

The CPU stays in the dispatch poll loop forever.

On any fatal init error the CPU parks in riic_target_panic_halt.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler has copied .data and zeroed .bss.

SystemInit has set VTOR, FPU, and priority grouping.

Postcondition

On a clean run the PASS banner is printed and the CPU loops in WFI.

On any failure the function prints a FAIL line and halts.

Note

Not thread-safe; single-threaded app entry.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler has copied .data and zeroed .bss.

SystemInit has set VTOR, FPU, and priority grouping.

Postcondition

On clean entry the CPU stays in the read + print loop forever.

On any HAL hard error LED2 latches ON and the loop exits.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Brings up the LIN commander then drives frames.

Precondition

Reset_Handler has copied .data and zeroed .bss.

SystemInit has set VTOR, FPU, and priority grouping.

Postcondition

On clean entry the CPU stays in the LIN-frame + blink loop forever.

On any HAL init failure the function halts in WFI.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, "renders" page 0 into the shared mailbox, releases the Cortex-M33 into its hold loop, and parks the M85 in low-power WFI sleep. See the file header for the power-saving narrative.

Precondition

SystemInit has completed core bring-up.

The M33 is held inactive by hardware until released here.

Postcondition

The M33 owns the held page and the M85 is parked.

This function never returns to its caller.

Note

Single-threaded; no RTOS on the M85 in this example.

Since

0.1.0

The application entry point Reset_Handler hands control to.

The USB clock, pins, console, and the SD card all come up before the kernel so the worker only deals with USB stack bring-up.

Precondition

Reset_Handler copied .data and zeroed .bss.

SystemInit set VTOR, FPU, priority grouping.

Postcondition

On clean entry the CPU stays in tx_kernel_enter forever.

On any HAL init failure the function halts in WFI.

Note

Single entry point; not re-entrant.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler copied .data and zeroed .bss.

SystemInit configured VTOR / FPU.

Postcondition

On clean bring-up the CPU stays in the poll loop.

On any HAL init failure the function halts in WFI.

Note

Single entry point; not re-entrant.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler initialized static storage.

SystemInit configured VTOR, FPU, and priority grouping.

Postcondition

The startup banner is printed once.

Control enters ThreadX and never returns normally.

Note

The #707 freestanding contract is declared by ra8_boot_entry.h.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler has copied .data and zeroed .bss.

SystemInit has set VTOR, FPU, and priority grouping.

Postcondition

On a clean run the PASS banner is printed and the CPU heartbeats forever.

On any failure LED2 latches ON and the CPU parks.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, the clock tree, and the VCOM console, runs the three-step self-test (MPU enabled, canonical boot map, Device MMIO), emits the matching PASS / FAIL banner over the console and ra8_log, then parks in WFI.

Precondition

Reset_Handler has copied .data and zeroed .bss.

SystemInit installed the boot map via ra8_mpu_apply_boot_map().

Postcondition

Exactly one banner (PASS or a step-specific FAIL) has been emitted.

The core is parked in WFI.

Note

Single-threaded; no RTOS and no IRQ sources in this template.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler initialised the C runtime; SystemInit ran.

The EK-RA8D2 J-Link OB VCOM console is attached for the banner.

Postcondition

The commit + rollback attempts have executed against extra-MRAM.

The verdict banner is emitted once per report cycle.

Note

Single entry point; not re-entrant.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Initialises logging + console, brings up the MRAM volume, runs the wear-levelling + power-cycle-survival flow, and prints a single PASS/FAIL verdict.

Precondition

SystemInit configured VTOR / FPU / priority grouping.

The extra-MRAM region is present (modelled in ra8_emulator, real on silicon).

Postcondition

Exactly one PASS or FAIL verdict line has been queued on SCI8.

Control parks in an infinite loop; the function never returns.

Note

Single-threaded; runs to the park loop on the main stack.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Initialises logging + console, brings up the MRAM volume, runs the program/erase round-trip, and prints a single PASS/FAIL verdict.

Precondition

SystemInit configured VTOR / FPU / priority grouping.

The extra-MRAM region is present (modelled in ra8_emulator, real on silicon).

Postcondition

Exactly one PASS or FAIL verdict line has been queued on SCI8.

Control parks in an infinite loop; the function never returns.

Note

Single-threaded; runs to the park loop on the main stack.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Brings up the clocks, console, and SDHI bus pins, runs the native SD card identification, fills the payload, then runs the full ra8_io VFS round-trip over the native-SDHI block device. On success it prints the exact PASS banner the HIL runner and ra8_emulator smoke gate scrape for; on any failure it prints FAIL and parks the core.

Precondition

Reset_Handler has copied .data and zeroed .bss.

SystemInit has set VTOR, FPU, and priority grouping.

Postcondition

On a clean run the CPU loops forever after the PASS banner.

On any failure the function prints FAIL and halts in WFI.

Note

Not thread-safe; this is the single-threaded app entry.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Brings up the console and both stdio sinks, retargets the engine's stdio to the in-RAM capture sink, runs the two-backend swap, replays the RAM capture out of the UART, and prints a single PASS/FAIL verdict per abstraction before parking in an infinite loop.

Precondition

SystemInit configured VTOR / FPU / priority grouping.

The OSPI NOR array is present (modelled in ra8_emulator, real on silicon).

Postcondition

A PASS or FAIL verdict line has been queued on SCI8 for each abstraction.

Control parks in an infinite loop; the function never returns.

Note

Single-threaded; runs to the park loop on the main stack.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Brings up the clocks, console, and SDHI bus pins, runs the native SD card identification, fills the payload, then writes + reads + compares one raw 512-byte block straight against ra8_sdcard. On success it prints the exact PASS banner; on any failure it prints FAIL and parks the core.

Precondition

Reset_Handler has copied .data and zeroed .bss.

SystemInit has set VTOR, FPU, and priority grouping.

Postcondition

On a clean run the CPU loops forever after the PASS banner.

On any failure the function prints FAIL and halts in WFI.

Note

Not thread-safe; this is the single-threaded app entry.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler copied .data and zeroed .bss.

SystemInit set VTOR / FPU / priority grouping.

Postcondition

The whoami PASS banner is emitted; the CPU then loops in WFI.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Brings up clocks + UART + RMII + RSIP, then ThreadX.

Precondition

Reset_Handler has copied .data and zeroed .bss.

Postcondition

On clean entry the kernel runs the worker thread once.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler has copied .data and zeroed .bss.

SystemInit has set VTOR, the FPU and the priority grouping.

Postcondition

The banner was printed exactly once.

Control passed to ThreadX and never came back.

Note

Everything after tx_kernel_enter happens on ThreadX; the panic-halt below is reached only if the kernel refuses to start.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler has copied .data and zeroed .bss.

SystemInit has set VTOR, the FPU and the priority grouping.

Postcondition

The banner and the resolved pin map were printed exactly once.

Control passed to ThreadX and never came back.

Note

Everything after tx_kernel_enter happens on ThreadX; the panic-halt below is reached only if the kernel refuses to start.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler has copied .data and zeroed .bss.

SystemInit has set VTOR, the FPU and priority grouping.

Postcondition

The probe ran exactly once and printed its verdict.

The CPU stays in a slow heartbeat loop afterwards.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Precondition

Reset_Handler has copied .data and zeroed .bss.

SystemInit has set VTOR, the FPU and the priority grouping.

Postcondition

The banner was printed exactly once.

Control passed to ThreadX and never came back.

Note

Everything after tx_kernel_enter runs on ThreadX; the panic-halt below is reached only if the kernel refuses to start.

Since

0.1.0

The application entry point Reset_Handler hands control to.

Initializes and arms ADC_B, formats each successful channel sample without variadic I/O, emits the verdict, toggles LED1, and delays.

Precondition

Reset startup and SystemInit completed successfully.

The selected ADC channel matches the board analog connection.

Postcondition

Every PASS verdict follows a successful channel read.

Any read or LED failure leads to the terminal panic helper.

Note

Does not return during normal operation.

Since

0.1.0

Definition at line 153 of file main.c.

References internal_agt_periodic_arm(), internal_agt_periodic_panic_halt(), internal_agt_periodic_setup_or_halt(), k_agt_periodic_channel, k_agt_periodic_poll_ms, k_agt_periodic_undf_bit, k_ra8_board_led1, k_ra8_ok, ra8_agt_get_status(), ra8_agt_stop(), ra8_board_led_toggle(), ra8_board_uart_console_write(), ra8_delay_ms(), ra8_isr_globals_enable(), and s_agt_periodic_log_msg.

Variable Documentation

s_agt_periodic_log_msg

const uint8_t s_agt_periodic_log_msg[] = "agt: tick OK\r\n"

static

UART diagnostic emitted for every observed AGT underflow.

Definition at line 63 of file main.c.

Referenced by main().