main.c

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#include <stdint.h>
 
#include "ra8_attributes.h"
#include "ra8_board_ek_ra8d2.h"
#include "ra8_boot_entry.h"
#include "ra8_cgc.h"
#include "ra8_err.h"
#include "ra8_isr.h"
#include "ra8_lpm.h"
#include "ra8_lpm_regs.h"
#include "ra8_time.h"

typedef enum : uint32_t {
  k_lpm_demo_baud      = 115200U, 
  k_lpm_demo_period_ms = 100U,    
} lpm_demo_config_t;

typedef enum : uint8_t {
  k_lpm_demo_nibble_mask  = 0x0FU, 
  k_lpm_demo_nibble_shift = 4U,    
  k_lpm_demo_alpha_thresh = 10U,   
  k_lpm_demo_hex_per_word = 8U,    
} lpm_demo_byte_t;

static const uint8_t s_lpm_demo_prefix[] = "lpm: wake_count=";
static const uint8_t s_lpm_demo_eol[]    = "\r\n";

static uint32_t s_wake_count;

RA8_INTERNAL static void internal_lpm_demo_panic_halt(void)
{
  while (1) {
    __asm__ volatile("wfi");
  }
}

RA8_INTERNAL static uint8_t internal_lpm_demo_nibble_to_hex(uint8_t nibble)
{
  uint8_t n = (uint8_t)(nibble & (uint8_t)k_lpm_demo_nibble_mask);
  if (n < (uint8_t)k_lpm_demo_alpha_thresh) {
    return (uint8_t)('0' + n);
  }
  return (uint8_t)('a' + (n - (uint8_t)k_lpm_demo_alpha_thresh));
}

RA8_INTERNAL static void internal_lpm_demo_word_to_hex(uint32_t v, uint8_t* dst)
{
  for (uint8_t i = 0U; i < (uint8_t)k_lpm_demo_hex_per_word; ++i) {
    const uint8_t shift =
      (uint8_t)(((uint8_t)k_lpm_demo_hex_per_word - 1U - i) * (uint8_t)k_lpm_demo_nibble_shift);
    const uint8_t nibble = (uint8_t)((v >> shift) & (uint32_t)k_lpm_demo_nibble_mask);
    dst[i]               = internal_lpm_demo_nibble_to_hex(nibble);
  }
}

RA8_INTERNAL static void internal_lpm_demo_setup_or_halt(void)
{
  uint32_t cpuclk0_hz = 0U;
 
  if (ra8_cgc_init() != k_ra8_ok) {
    internal_lpm_demo_panic_halt();
  }
  if (ra8_cgc_get_clock_hz(k_ra8_clock_id_cpuclk0, &cpuclk0_hz) != k_ra8_ok) {
    internal_lpm_demo_panic_halt();
  }
  if (ra8_time_init(cpuclk0_hz) != k_ra8_ok) {
    internal_lpm_demo_panic_halt();
  }
  if (ra8_board_uart_console_init((uint32_t)k_lpm_demo_baud) != k_ra8_ok) {
    internal_lpm_demo_panic_halt();
  }
  if (ra8_board_led_init(k_ra8_board_led1) != k_ra8_ok) {
    internal_lpm_demo_panic_halt();
  }
 
  /* LPM block uses the cold-reset defaults: OPE=1, IOKEEP=0, no
   * fast-return / SS2LP options. ra8_lpm_init takes care of the
   * PRC1 unlock + SBYCR / DPSBYCR / SSCR1 programming for us. */
  const ra8_lpm_config_t lpm_cfg = {
    .io_port_keep     = false,
    .opa_bus_keep     = true,
    .sscr_fast_return = false,
    .dcdc_softstart   = k_ra8_lpm_dcssmode_128us,
    .sscr_low_power   = k_ra8_lpm_ss2lp_default,
  };
  if (ra8_lpm_init(&lpm_cfg) != k_ra8_ok) {
    internal_lpm_demo_panic_halt();
  }
}

[[nodiscard]] RA8_INTERNAL static ra8_err_t internal_lpm_demo_one_wake(void)
{
  /* Sleep mode -- WFI returns on the next SysTick IRQ ~1 ms later. */
  if (ra8_lpm_enter_sleep(k_ra8_sleep_mode_sleep) != k_ra8_ok) {
    return k_ra8_err_hw_error;
  }
  /* Continue idling until ~100 ms have accumulated. */
  ra8_delay_ms((uint32_t)k_lpm_demo_period_ms);
  s_wake_count++;
 
  uint8_t hex[k_lpm_demo_hex_per_word] = {};
  internal_lpm_demo_word_to_hex(s_wake_count, hex);
 
  (void)ra8_board_uart_console_write(s_lpm_demo_prefix, (size_t)(sizeof(s_lpm_demo_prefix) - 1U));
  (void)ra8_board_uart_console_write(hex, (size_t)k_lpm_demo_hex_per_word);
  (void)ra8_board_uart_console_write(s_lpm_demo_eol, (size_t)(sizeof(s_lpm_demo_eol) - 1U));
  return k_ra8_ok;
}
 
void main(void)
{
  internal_lpm_demo_setup_or_halt();
  ra8_isr_globals_enable();
 
  while (1) {
    if (internal_lpm_demo_one_wake() != k_ra8_ok) {
      break;
    }
    (void)ra8_board_led_toggle(k_ra8_board_led1);
  }
  internal_lpm_demo_panic_halt();
}