ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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main.c
Go to the documentation of this file.
1
27
28#include <stdint.h>
29
30#include "ra8_board_ek_ra8d2.h"
31#include "ra8_boot_entry.h"
32#include "ra8_cgc.h"
33#include "ra8_err.h"
34#include "ra8_gpio_constants.h"
35#include "ra8_i2c.h"
36#include "ra8_i3c.h"
37#include "ra8_isr.h"
38#include "ra8_mpc.h"
39#include "ra8_mstp.h"
40#include "ra8_port_utils.h"
41#include "ra8_time.h"
42
44typedef enum : uint32_t {
45 k_combo_baud = 115200U,
47 k_combo_bus_hz = 100000U,
51
53typedef enum : uint8_t {
56
61
62/* The pass banner requires BOTH: RIIC ACKed U15 (real round-trip) and the
63 * I3C controller is up (reaching the loop proves ra8_i3c_init succeeded). */
64static const uint8_t k_combo_msg_ok[] = "combo: i2c ack=1 i3c initok\r\n";
65static const uint8_t k_combo_msg_i2c[] = "combo: i2c ack=0 i3c initok\r\n";
66static const uint8_t k_combo_msg_err[] = "combo: i2c ERROR i3c initok\r\n";
67
74static void combo_panic_halt(void)
75{
76 while (1) {
77 __asm__ volatile("wfi");
78 }
79}
80
88static void combo_clocks_or_halt(uint32_t* out_pclka_hz)
89{
90 uint32_t cpuclk0_hz = 0U;
91 if (ra8_cgc_init() != k_ra8_ok) {
93 }
96 }
99 }
100 if (ra8_mstp_init() != k_ra8_ok) {
102 }
103 if (ra8_time_init(cpuclk0_hz) != k_ra8_ok) {
105 }
106}
107
129
137static void combo_setup_or_halt(void)
138{
139 uint32_t pclka_hz = 0U;
140 combo_clocks_or_halt(&pclka_hz);
142
145 }
146 /* RIIC ch1 + U15 via the board's validated bring-up. */
149 }
150 /* I3C ch0 controller in I2C-compatibility mode. */
151 const ra8_i3c_cfg_t i3c_cfg = {
152 .mode = k_ra8_i3c_mode_i2c,
153 .bus_hz = k_combo_bus_hz,
154 .pclka_hz = pclka_hz,
155 };
156 if (ra8_i3c_init((uint8_t)k_combo_i3c_channel, &i3c_cfg) != k_ra8_ok) {
158 }
161 }
162}
163
172void main(void)
173{
176
177 while (1) {
178 /* RIIC ch1 -> U15: a real ACK proves the ra8_i2c controller + device. */
179 bool i2c_acked = false;
180 const ra8_err_t i2c_err =
181 ra8_i2c_scan((uint8_t)k_combo_i2c_channel, (uint8_t)k_combo_probe_addr, &i2c_acked);
182
183 /* I3C ch0 -> J27 (no device on a bare EVM); the scan result is
184 * informational -- reaching here already proves ra8_i3c_init worked. */
185 bool i3c_acked = false;
186 (void)ra8_i3c_scan((uint8_t)k_combo_i3c_channel, (uint8_t)k_combo_probe_addr, &i3c_acked);
187
188 const uint8_t* msg = k_combo_msg_err;
189 uint32_t msg_len = (uint32_t)(sizeof(k_combo_msg_err) - 1U);
190 if (i2c_err == k_ra8_ok) {
191 if (i2c_acked) {
192 msg = k_combo_msg_ok;
193 msg_len = (uint32_t)(sizeof(k_combo_msg_ok) - 1U);
194 } else {
195 msg = k_combo_msg_i2c;
196 msg_len = (uint32_t)(sizeof(k_combo_msg_i2c) - 1U);
197 }
198 }
199 if (ra8_board_uart_console_write(msg, (size_t)msg_len) != k_ra8_ok) {
200 break;
201 }
203 break;
204 }
206 }
207
209}
void main(void)
Secure fallback main entry point.
Definition main.c:37
static void combo_panic_halt(void)
Park forever after a fatal init failure.
Definition main.c:74
combo_byte_t
Probe address: U15 on RIIC ch1; reused as the I3C scan target.
Definition main.c:53
@ k_combo_probe_addr
Combo probe address.
Definition main.c:54
static void combo_clocks_or_halt(uint32_t *out_pclka_hz)
Bring CGC + SysTick + MSTP up; return PCLKA via out_pclka_hz.
Definition main.c:88
static const uint8_t k_combo_msg_i2c[]
Definition main.c:65
static const uint8_t k_combo_msg_ok[]
Definition main.c:64
static const uint8_t k_combo_msg_err[]
Definition main.c:66
static void combo_pfs_or_halt(void)
Route I3C ch0 SCL0/SDA0 (open-drain) via PFS.
Definition main.c:114
static const ra8_port_pin_t k_combo_pin_i3c_scl
I3C ch0 pins (P400 SCL0 / P401 SDA0).
Definition main.c:59
static void combo_setup_or_halt(void)
Bring up CGC + console + RIIC(ch1,U15) + I3C(ch0,i2c-mode).
Definition main.c:137
static const ra8_port_pin_t k_combo_pin_i3c_sda
Definition main.c:60
combo_const_t
App-wide tunables.
Definition main.c:44
@ k_combo_period_ms
Combo period ms.
Definition main.c:46
@ k_combo_bus_hz
Combo bus Hz.
Definition main.c:47
@ k_combo_baud
Combo baud.
Definition main.c:45
@ k_combo_i2c_channel
RIIC ch1 – U15 (P512/P511).
Definition main.c:48
@ k_combo_i3c_channel
I3C ch0 – J27 (P400/P401).
Definition main.c:49
Board-support layer for the Renesas EK-RA8D2 v1 evaluation kit.
ra8_err_t ra8_board_led_toggle(ra8_board_led_id_t led)
Toggle led's output state.
ra8_err_t ra8_board_led_init(ra8_board_led_id_t led)
Configure led as a digital output, initial level low (off).
@ k_ra8_board_led1
LED1, BLUE, P600 (jumper E27).
ra8_err_t ra8_board_io_expander_apply_project_sw4_defaults(void)
Program the U15 I/O expander to apply the project's SW4 layout.
@ k_ra8_board_i3c0_pin_scl
P400 SCL0.
@ k_ra8_board_i3c0_pin_sda
P401 SDA0.
ra8_err_t ra8_board_uart_console_write(const uint8_t *data, size_t len)
Polled blocking write to the J-Link OB VCOM console.
ra8_err_t ra8_board_uart_console_init(uint32_t baud)
Configure SCI8 + PD02/PD03 as the debug-console UART.
Boot entry points shared between a vector table and its startup code.
High-level Clock Generation Circuit driver.
ra8_err_t ra8_cgc_get_clock_hz(ra8_clock_id_t id, uint32_t *out_hz)
Query the current frequency of a clock-tree domain.
Definition ra8_cgc.c:132
@ k_ra8_clock_id_cpuclk0
Cortex-M85 CPUCLK0.
Definition ra8_cgc.h:70
@ k_ra8_clock_id_pclka
PCLKA.
Definition ra8_cgc.h:73
ra8_err_t ra8_cgc_init(void)
Configure the clock tree to a safe default.
Definition ra8_cgc.c:727
Error Code Definitions for ra8-firmware.
@ k_ra8_ok
Success – operation completed with all postconditions satisfied.
Definition ra8_err.h:119
ra8_err_codes_t ra8_err_t
Canonical error-return type used by every ra8-firmware API.
Definition ra8_err.h:546
PSEL codes for peripheral pin routing on the RA8D2.
@ k_ra8_psel_iic
00111b: IIC / I3C controller-peripheral.
I2C Bus Interface (IIC) controller driver – polling mode.
ra8_err_t ra8_i2c_scan(uint8_t channel, uint8_t peripheral_7b, bool *out_acked)
Probe whether a 7-bit peripheral address ACKs.
Definition ra8_i2c.c:762
I3C Bus Interface driver – unified native-I3C + I2C-compat modes.
@ k_ra8_i3c_mode_i2c
Legacy I2C-compatibility controller.
Definition ra8_i3c.h:69
ra8_err_t ra8_i3c_scan(uint8_t channel, uint8_t addr, bool *out_acked)
Probe whether a 7-bit address acknowledges (I2C mode).
Definition ra8_i3c.c:729
ra8_err_t ra8_i3c_init(uint8_t channel, const ra8_i3c_cfg_t *cfg)
Initialise an I3C channel in the configured mode.
Definition ra8_i3c.c:311
NVIC + ICU IELSR allocator.
void ra8_isr_globals_enable(void)
Globally enable maskable interrupts (PRIMASK = 0).
Definition ra8_isr.c:439
Multi-function Pin Controller (MPC) facade.
ra8_err_t ra8_mpc_set_open_drain(ra8_port_t port, ra8_pin_t pin, bool enable)
Enable or disable N-channel open-drain on a pin.
Definition ra8_mpc.c:198
Ref-counted Module Stop Control wrapper for the RA8D2.
ra8_err_t ra8_mstp_init(void)
Re-establish the ra8_mstp ref-count table from current hardware state.
Definition ra8_mstp.c:291
ra8_port_pin_t
Packed (port << 8) | pin pin identifier.
@ k_ra8_port_4
RA8 port 4.
@ k_ra8_pin_1
RA8 pin 1.
@ k_ra8_pin_0
RA8 pin 0.
High-level GPIO helpers on top of the PORT + PFS register layer.
ra8_err_t ra8_pfs_route_peripheral(ra8_port_pin_t pin, ra8_psel_t psel, const char *owner)
Route a pin to a non-IRQ peripheral function via PFS.PSEL.
Definition gpio.c:238
SysTick-based tick counter, delay and timestamp helpers.
ra8_err_t ra8_time_init(uint32_t cpu_hz)
Initialise SysTick for a 1 kHz tick interrupt.
Definition ra8_time.c:59
void ra8_delay_ms(uint32_t ms)
Busy-wait for at least ms milliseconds.
Definition ra8_time.c:129
Per-channel bring-up configuration for ra8_i3c_init.
Definition ra8_i3c.h:90