main.c

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#include <stddef.h>
#include <stdint.h>
 
#include "ra8_adc.h"
#include "ra8_board_ek_ra8d2.h"
#include "ra8_boot_entry.h"
#include "ra8_cgc.h"
#include "ra8_err.h"
#include "ra8_isr.h"
#include "ra8_mstp.h"
#include "ra8_time.h"
#include "ra8_tsn.h"

typedef enum : uint32_t {
  k_adc_diag_baud      = 115200U, 
  k_adc_diag_period_ms = 500U,    
} adc_diag_const_t;

typedef enum : uint8_t {
  k_adc_diag_num_modes = 3U,  
  k_adc_diag_radix     = 10U, 
  k_adc_diag_dec_max   = 10U, 
  k_adc_diag_minus     = '-', 
} adc_diag_fmt_t;

typedef enum : uint16_t {
  k_adc_diag_stab_us = 30U, 
} adc_diag_tsn_t;

static const ra8_adc_selfdiag_mode_t k_adc_diag_modes[k_adc_diag_num_modes] = {
  k_ra8_adc_selfdiag_mode_1,
  k_ra8_adc_selfdiag_mode_2,
  k_ra8_adc_selfdiag_mode_3,
};
 
/* Console line fragments (kept short so each write is one shift-register
 * fill; the periodic log is the only output path). */
static const uint8_t k_adc_diag_mode_prefix[]  = "diag: mode=";
static const uint8_t k_adc_diag_code_sep[]     = " code=";
static const uint8_t k_adc_diag_pass_sfx[]     = " PASS\r\n";
static const uint8_t k_adc_diag_fail_sfx[]     = " FAIL\r\n";
static const uint8_t k_adc_diag_tsn_prefix[]   = "tsn: die_mC=";
static const uint8_t k_adc_diag_vref_prefix[]  = "vref: raw=";
static const uint8_t k_adc_diag_crlf[]         = "\r\n";
static const uint8_t k_adc_diag_verdict_pass[] = "diag: selftest PASS\r\n";
static const uint8_t k_adc_diag_verdict_fail[] = "diag: selftest FAIL\r\n";

static void adc_diag_panic_halt(void)
{
  while (1) {
    __asm__ volatile("wfi");
  }
}

static void adc_diag_write(const uint8_t* data, uint32_t len)
{
  (void)ra8_board_uart_console_write(data, (size_t)len);
}

static uint32_t adc_diag_u32_to_dec(uint8_t* buf, uint32_t val)
{
  if (val == 0U) {
    buf[0] = (uint8_t)'0';
    return 1U;
  }
  uint8_t  tmp[k_adc_diag_dec_max];
  uint32_t n = 0U;
  uint32_t v = val;
  while (v != 0U) {
    tmp[n] = (uint8_t)('0' + (uint8_t)(v % (uint32_t)k_adc_diag_radix));
    v      = v / (uint32_t)k_adc_diag_radix;
    n++;
  }
  for (uint32_t i = 0U; i < n; i++) {
    buf[i] = tmp[n - 1U - i];
  }
  return n;
}

static void adc_diag_write_u32(uint32_t val)
{
  uint8_t        buf[k_adc_diag_dec_max];
  const uint32_t n = adc_diag_u32_to_dec(buf, val);
  adc_diag_write(buf, n);
}

static void adc_diag_write_i32(int32_t val)
{
  if (val < 0) {
    const uint8_t minus = (uint8_t)k_adc_diag_minus;
    adc_diag_write(&minus, 1U);
    adc_diag_write_u32((uint32_t)(-(int64_t)val));
  } else {
    adc_diag_write_u32((uint32_t)val);
  }
}

static void adc_diag_emit_mode(uint8_t mode_num, uint16_t code, bool pass)
{
  adc_diag_write(k_adc_diag_mode_prefix, (uint32_t)(sizeof(k_adc_diag_mode_prefix) - 1U));
  adc_diag_write_u32((uint32_t)mode_num);
  adc_diag_write(k_adc_diag_code_sep, (uint32_t)(sizeof(k_adc_diag_code_sep) - 1U));
  adc_diag_write_u32((uint32_t)code);
  if (pass) {
    adc_diag_write(k_adc_diag_pass_sfx, (uint32_t)(sizeof(k_adc_diag_pass_sfx) - 1U));
  } else {
    adc_diag_write(k_adc_diag_fail_sfx, (uint32_t)(sizeof(k_adc_diag_fail_sfx) - 1U));
  }
}

static bool adc_diag_run_cycle(void)
{
  bool healthy = true;
  for (uint32_t i = 0U; i < (uint32_t)k_adc_diag_num_modes; i++) {
    uint16_t        code = 0U;
    bool            pass = false;
    const ra8_err_t err  = ra8_adc_self_diagnose(k_adc_diag_modes[i], &code, &pass);
    if (err != k_ra8_ok) {
      healthy = false;
      pass    = false;
    }
    if (!pass) {
      healthy = false;
    }
    adc_diag_emit_mode((uint8_t)(i + 1U), code, pass);
  }
 
  int32_t         milli    = 0;
  const ra8_err_t temp_err = ra8_tsn_read_die_temp_milli_c(&milli);
  if (temp_err != k_ra8_ok) {
    healthy = false;
  }
  adc_diag_write(k_adc_diag_tsn_prefix, (uint32_t)(sizeof(k_adc_diag_tsn_prefix) - 1U));
  adc_diag_write_i32(milli);
  adc_diag_write(k_adc_diag_crlf, (uint32_t)(sizeof(k_adc_diag_crlf) - 1U));
 
  uint16_t        vref     = 0U;
  const ra8_err_t vref_err = ra8_adc_read_internal_channel(k_ra8_adc_chan_int_ref_volt, &vref);
  if (vref_err != k_ra8_ok) {
    healthy = false;
  }
  adc_diag_write(k_adc_diag_vref_prefix, (uint32_t)(sizeof(k_adc_diag_vref_prefix) - 1U));
  adc_diag_write_u32((uint32_t)vref);
  adc_diag_write(k_adc_diag_crlf, (uint32_t)(sizeof(k_adc_diag_crlf) - 1U));
 
  return healthy;
}

static void adc_diag_setup_or_halt(void)
{
  uint32_t cpuclk0_hz = 0U;
  if (ra8_cgc_init() != k_ra8_ok) {
    adc_diag_panic_halt();
  }
  if (ra8_cgc_get_clock_hz(k_ra8_clock_id_cpuclk0, &cpuclk0_hz) != k_ra8_ok) {
    adc_diag_panic_halt();
  }
  if (ra8_mstp_init() != k_ra8_ok) {
    adc_diag_panic_halt();
  }
  if (ra8_time_init(cpuclk0_hz) != k_ra8_ok) {
    adc_diag_panic_halt();
  }
  if (ra8_board_uart_console_init((uint32_t)k_adc_diag_baud) != k_ra8_ok) {
    adc_diag_panic_halt();
  }
  if (ra8_board_led_init(k_ra8_board_led1) != k_ra8_ok) {
    adc_diag_panic_halt();
  }
}

[[nodiscard]] static ra8_err_t adc_diag_arm(void)
{
  const ra8_err_t adc_err = ra8_adc_init();
  if (adc_err != k_ra8_ok) {
    return adc_err;
  }
  const ra8_tsn_config_t cfg = {
    .high_ref_degc = k_ra8_tsn_cal_temp_high_125,
    .low_ref_degc  = k_ra8_tsn_cal_temp_low_n40,
    .stab_us       = (uint16_t)k_adc_diag_stab_us,
  };
  return ra8_tsn_init(&cfg);
}
 
void main(void)
{
  adc_diag_setup_or_halt();
  ra8_isr_globals_enable();
 
  if (adc_diag_arm() != k_ra8_ok) {
    adc_diag_panic_halt();
  }
 
  while (1) {
    const bool healthy = adc_diag_run_cycle();
    if (healthy) {
      adc_diag_write(k_adc_diag_verdict_pass, (uint32_t)(sizeof(k_adc_diag_verdict_pass) - 1U));
    } else {
      adc_diag_write(k_adc_diag_verdict_fail, (uint32_t)(sizeof(k_adc_diag_verdict_fail) - 1U));
    }
    if (ra8_board_led_toggle(k_ra8_board_led1) != k_ra8_ok) {
      break;
    }
    ra8_delay_ms((uint32_t)k_adc_diag_period_ms);
  }
  adc_diag_panic_halt();
}