43typedef enum : uint32_t {
63typedef enum : uint16_t {
74 __asm__
volatile(
"wfi");
80 uint32_t cpuclk0_hz = 0U;
151 uint16_t counter = 0U;
void main(void)
Secure fallback main entry point.
static void wdt_window_demo_panic_halt(void)
static const uint8_t k_wdt_window_demo_msg_refresh_failed[]
static const uint8_t k_wdt_window_demo_msg_clear_failed[]
static const uint8_t k_wdt_window_demo_msg_boot[]
static bool wdt_window_demo_iter(void)
Inner loop body – one polling iteration.
wdt_window_demo_const_t
Demo tunables.
@ k_wdt_window_demo_baud
Wdt window demo baud.
@ k_wdt_window_demo_poll_ms
Wdt window demo poll ms.
static void wdt_window_demo_setup_or_halt(void)
static void wdt_window_demo_banner(const uint8_t *msg, uint32_t len)
Print a short ASCII banner and never block the caller.
static bool wdt_window_demo_in_window(uint16_t counter)
Decide whether the live counter sits inside the legal window.
wdt_window_demo_window_t
Window bounds in WDT-counter units.
@ k_wdt_window_demo_window_low
Wdt window demo window low.
@ k_wdt_window_demo_window_high
Wdt window demo window high.
static const uint8_t k_wdt_window_demo_msg_counter_failed[]
static const uint8_t k_wdt_window_demo_msg_refresh[]
static const uint8_t k_wdt_window_demo_msg_init_failed[]
Board-support layer for the Renesas EK-RA8D2 v1 evaluation kit.
ra8_err_t ra8_board_led_toggle(ra8_board_led_id_t led)
Toggle led's output state.
ra8_err_t ra8_board_led_init(ra8_board_led_id_t led)
Configure led as a digital output, initial level low (off).
@ k_ra8_board_led1
LED1, BLUE, P600 (jumper E27).
ra8_err_t ra8_board_uart_console_write(const uint8_t *data, size_t len)
Polled blocking write to the J-Link OB VCOM console.
ra8_err_t ra8_board_uart_console_init(uint32_t baud)
Configure SCI8 + PD02/PD03 as the debug-console UART.
Boot entry points shared between a vector table and its startup code.
High-level Clock Generation Circuit driver.
ra8_err_t ra8_cgc_get_clock_hz(ra8_clock_id_t id, uint32_t *out_hz)
Query the current frequency of a clock-tree domain.
@ k_ra8_clock_id_cpuclk0
Cortex-M85 CPUCLK0.
ra8_err_t ra8_cgc_init(void)
Configure the clock tree to a safe default.
Error Code Definitions for ra8-firmware.
@ k_ra8_ok
Success – operation completed with all postconditions satisfied.
NVIC + ICU IELSR allocator.
void ra8_isr_globals_enable(void)
Globally enable maskable interrupts (PRIMASK = 0).
SysTick-based tick counter, delay and timestamp helpers.
ra8_err_t ra8_time_init(uint32_t cpu_hz)
Initialise SysTick for a 1 kHz tick interrupt.
void ra8_delay_ms(uint32_t ms)
Busy-wait for at least ms milliseconds.
Software Watchdog Timer (WDT) driver header.
@ k_ra8_wdt_timeout_1024
1024 cycles.
@ k_ra8_wdt_clkdiv_4
PCLKB / 4.
ra8_err_t ra8_wdt_refresh_for(ra8_wdt_instance_t which)
Refresh a specific WDT instance.
ra8_err_t ra8_wdt_init(const ra8_wdt_cfg_t *cfg)
Initialise the WDT in register-start mode.
@ k_ra8_wdt_window_start_75
75 %.
@ k_ra8_wdt_on_expiry_nmi
RSTIRQS=0 – route to NMI / IRQ.
ra8_err_t ra8_wdt_clear_status(void)
Clear the WDTSR underflow / refresh-error flags.
@ k_ra8_wdt_sleep_stop_count
SLCSTP=1 – counter halts in Sleep.
ra8_err_t ra8_wdt_get_counter(uint16_t *out_count)
Read the live CNTVAL[13:0] down-counter value.
@ k_ra8_wdt_window_end_25
25 %.
@ k_ra8_wdt0
WDT0 – Cortex-M85 side.
Register-start-mode configuration block.