ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
Loading...
Searching...
No Matches
main.c
Go to the documentation of this file.
1
45
46#include <stddef.h>
47#include <stdint.h>
48
49#include "ra8_board_ek_ra8d2.h"
50#include "ra8_boot_entry.h"
51#include "ra8_cgc.h"
52#include "ra8_err.h"
53#include "ra8_isr.h"
54#include "ra8_systick.h"
55#include "ra8_time.h"
56
58typedef enum : uint32_t {
59 k_demo_baud = 115200U,
63 k_demo_hz_per_mhz = 1000000U,
66
68static const uint8_t k_demo_lbl_reload[] = "reload=";
70static const uint8_t k_demo_lbl_ms[] = "hal timebase ms=";
72static const uint8_t k_demo_lbl_cycles[] = " cycles=";
74static const uint8_t k_demo_lbl_us[] = " us=";
76static const uint8_t k_demo_crlf[] = "\r\n";
77
93static void demo_panic_halt(void)
94{
95 while (1) {
96 __asm__ volatile("wfi");
97 }
98}
99
118static void demo_emit(const uint8_t* data, size_t len)
119{
120 (void)ra8_board_uart_console_write(data, len);
121}
122
141static void demo_emit_u32(uint32_t value)
142{
143 uint8_t buf[k_demo_u32_digits];
144 uint32_t idx = (uint32_t)k_demo_u32_digits;
145
146 if (value == 0U) {
147 idx--;
148 buf[idx] = (uint8_t)'0';
149 } else {
150 for (uint32_t d = 0U; d < (uint32_t)k_demo_u32_digits; d++) {
151 if (value == 0U) {
152 break;
153 }
154 idx--;
155 buf[idx] = (uint8_t)('0' + (uint8_t)(value % (uint32_t)k_demo_dec_base));
156 value /= (uint32_t)k_demo_dec_base;
157 }
158 }
159
160 demo_emit(&buf[idx], (size_t)((uint32_t)k_demo_u32_digits - idx));
161}
162
187static ra8_err_t demo_setup_or_halt(uint32_t* out_cpuclk_hz)
188{
189 if (out_cpuclk_hz == nullptr) {
191 }
192
193 uint32_t cpuclk0_hz = 0U;
194 if (ra8_cgc_init() != k_ra8_ok) {
196 }
199 }
200 if (ra8_time_init(cpuclk0_hz) != k_ra8_ok) {
202 }
205 }
208 }
209
210 /* The timebase primitive owns the DWT enable and the SysTick arithmetic. */
212
213 uint32_t reload = 0U;
214 if (ra8_systick_reload_for(cpuclk0_hz, (uint32_t)k_demo_tick_hz, &reload) != k_ra8_ok) {
216 }
217 /* Re-arm the SAME SysTick via the HAL path: same reload + control bits the
218 * raw ra8_time_init() programmed, so ra8_delay_ms() keeps ticking. */
221 }
222
224 demo_emit_u32(reload);
225 demo_emit(k_demo_crlf, sizeof(k_demo_crlf) - 1U);
226
227 *out_cpuclk_hz = cpuclk0_hz;
228 return k_ra8_ok;
229}
230
249static void demo_emit_measurement(uint32_t cpuclk_hz)
250{
251 uint32_t cycles_per_us = cpuclk_hz / (uint32_t)k_demo_hz_per_mhz;
252 if (cycles_per_us == 0U) {
253 cycles_per_us = 1U;
254 }
255
258 const uint32_t cycles = ra8_dwt_cyccnt_read();
259 const uint32_t micros = cycles / cycles_per_us;
260
264 demo_emit_u32(cycles);
266 demo_emit_u32(micros);
267 demo_emit(k_demo_crlf, sizeof(k_demo_crlf) - 1U);
268}
269
281void main(void)
282{
283 uint32_t cpuclk0_hz = 0U;
284 if (demo_setup_or_halt(&cpuclk0_hz) != k_ra8_ok) {
286 }
287
289
290 while (1) {
291 demo_emit_measurement(cpuclk0_hz);
293 break;
294 }
295 }
296
298}
void main(void)
Secure fallback main entry point.
Definition main.c:37
@ k_demo_baud
Demo baud.
Definition main.c:88
static void demo_setup_or_halt(void)
Bring up CGC + SysTick + the SCI8 console; halt forever on any failure.
Definition main.c:123
static void demo_emit(const uint8_t *data, size_t len)
Write a byte span to the SCI8 console, ignoring flow-control errors.
Definition main.c:118
static const uint8_t k_demo_lbl_reload[]
Label emitted once with the HAL-computed SysTick reload.
Definition main.c:68
hal_timebase_config_t
Compile-time settings for the demo.
Definition main.c:58
@ k_demo_period_ms
Heartbeat + measured-delay period.
Definition main.c:60
@ k_demo_u32_digits
Max decimal digits in a uint32_t.
Definition main.c:62
@ k_demo_hz_per_mhz
Hz per MHz -> cycles-per-us divisor.
Definition main.c:63
@ k_demo_dec_base
Decimal radix for the number emitter.
Definition main.c:64
@ k_demo_tick_hz
1 kHz -> 1 ms SysTick tick.
Definition main.c:61
static const uint8_t k_demo_lbl_us[]
Field separator before the derived microseconds.
Definition main.c:74
static void demo_emit_measurement(uint32_t cpuclk_hz)
Emit one measurement line: DWT-timed length of a 1 s delay.
Definition main.c:249
static const uint8_t k_demo_lbl_cycles[]
Field separator before the DWT cycle count.
Definition main.c:72
static const uint8_t k_demo_crlf[]
Line terminator.
Definition main.c:76
static const uint8_t k_demo_lbl_ms[]
Label opening each per-second measurement line.
Definition main.c:70
static void demo_panic_halt(void)
Halt forever in WFI – used as a panic stop on init failure.
Definition main.c:93
static void demo_emit_u32(uint32_t value)
Emit a uint32_t as decimal ASCII over the console.
Definition main.c:141
Board-support layer for the Renesas EK-RA8D2 v1 evaluation kit.
ra8_err_t ra8_board_led_toggle(ra8_board_led_id_t led)
Toggle led's output state.
ra8_err_t ra8_board_led_init(ra8_board_led_id_t led)
Configure led as a digital output, initial level low (off).
@ k_ra8_board_led1
LED1, BLUE, P600 (jumper E27).
ra8_err_t ra8_board_uart_console_write(const uint8_t *data, size_t len)
Polled blocking write to the J-Link OB VCOM console.
ra8_err_t ra8_board_uart_console_init(uint32_t baud)
Configure SCI8 + PD02/PD03 as the debug-console UART.
Boot entry points shared between a vector table and its startup code.
High-level Clock Generation Circuit driver.
ra8_err_t ra8_cgc_get_clock_hz(ra8_clock_id_t id, uint32_t *out_hz)
Query the current frequency of a clock-tree domain.
Definition ra8_cgc.c:132
@ k_ra8_clock_id_cpuclk0
Cortex-M85 CPUCLK0.
Definition ra8_cgc.h:70
ra8_err_t ra8_cgc_init(void)
Configure the clock tree to a safe default.
Definition ra8_cgc.c:727
Error Code Definitions for ra8-firmware.
@ k_ra8_err_invalid_arg
Invalid function argument.
Definition ra8_err.h:152
@ k_ra8_ok
Success – operation completed with all postconditions satisfied.
Definition ra8_err.h:119
ra8_err_codes_t ra8_err_t
Canonical error-return type used by every ra8-firmware API.
Definition ra8_err.h:546
NVIC + ICU IELSR allocator.
void ra8_isr_globals_enable(void)
Globally enable maskable interrupts (PRIMASK = 0).
Definition ra8_isr.c:439
Cortex-M85 SysTick + DWT cycle-counter timebase primitive.
ra8_err_t ra8_systick_reload_for(uint32_t cpu_hz, uint32_t tick_hz, uint32_t *out_reload)
Compute the SysTick reload for a given core clock and tick rate.
Definition ra8_systick.c:92
void ra8_dwt_cyccnt_reset(void)
Zero the DWT cycle counter (DWT_CYCCNT).
@ k_ra8_systick_clk_cpu
CLKSOURCE = 1: processor (CPU) clock.
Definition ra8_systick.h:75
ra8_err_t ra8_systick_configure(uint32_t reload, ra8_systick_clock_source_t src, bool tick_irq)
Arm and start SysTick with a reload value and clock source.
uint32_t ra8_dwt_cyccnt_read(void)
Sample the DWT cycle counter (DWT_CYCCNT).
void ra8_dwt_cyccnt_enable(void)
Enable the DWT free-running cycle counter (DWT_CYCCNT).
SysTick-based tick counter, delay and timestamp helpers.
ra8_err_t ra8_time_init(uint32_t cpu_hz)
Initialise SysTick for a 1 kHz tick interrupt.
Definition ra8_time.c:59
void ra8_delay_ms(uint32_t ms)
Busy-wait for at least ms milliseconds.
Definition ra8_time.c:129