66typedef enum : uint32_t {
78typedef enum : uint8_t {
130 __asm__
volatile(
"wfi");
196 if ((status & tcstf_mask) != 0U) {
224 uint32_t cpuclk0_hz = 0U;
241 .io_port_keep =
false,
242 .opa_bus_keep =
true,
243 .sscr_fast_return =
false,
void main(void)
Secure fallback main entry point.
lus_const_t
Demo tunables.
@ k_lus_period_ticks
Lus period ticks.
@ k_lus_tcstf_poll_limit
Lus tcstf poll limit.
@ k_lus_baud
SCI8 console baud rate.
static const uint8_t s_lus_boot_msg[]
Boot banner emitted once before the first standby entry.
static void internal_lus_panic_halt(void)
Park the processor after an unrecoverable setup or arm failure.
static ra8_err_t internal_lus_arm_wake(void)
Wire the ULPT0 underflow as a Software-Standby wake source.
volatile uint32_t g_lpm_ulpt_wake_count
Liveness counter – bumped in the ULPT0 underflow ISR.
static ra8_err_t internal_lus_wait_count_started(uint8_t channel)
Spin until the ULPT count operation has actually started.
static void internal_lus_ulpt_isr(void *ctx)
ULPT0 underflow interrupt service routine.
static const uint8_t s_lus_wake_msg[]
Wake banner and per-underflow HIL gate string.
lus_chan_t
ULPT channel selector.
@ k_lus_channel
ULPT0 (its underflow is the wake source).
static void internal_lus_setup_or_halt(void)
Bring CGC + SysTick + SCI8 + ULPT + LPM block up.
Annotation-attribute framework macros for ra8-firmware.
#define RA8_INTERNAL
Marker that a function is intended to be static (file-local).
Board-support layer for the Renesas EK-RA8D2 v1 evaluation kit.
ra8_err_t ra8_board_uart_console_write(const uint8_t *data, size_t len)
Polled blocking write to the J-Link OB VCOM console.
ra8_err_t ra8_board_uart_console_init(uint32_t baud)
Configure SCI8 + PD02/PD03 as the debug-console UART.
Boot entry points shared between a vector table and its startup code.
High-level Clock Generation Circuit driver.
ra8_err_t ra8_cgc_get_clock_hz(ra8_clock_id_t id, uint32_t *out_hz)
Query the current frequency of a clock-tree domain.
@ k_ra8_clock_id_cpuclk0
Cortex-M85 CPUCLK0.
ra8_err_t ra8_cgc_init(void)
Configure the clock tree to a safe default.
Event Link Controller (ELC) register layout for the Renesas RA8D2.
@ k_ra8_elc_event_ulpt0_ulpti
ULPT0 underflow (counter reaches 0).
Error Code Definitions for ra8-firmware.
@ k_ra8_err_hw_timeout
Hardware timed out waiting for a flag or handshake.
@ k_ra8_ok
Success – operation completed with all postconditions satisfied.
ra8_err_codes_t ra8_err_t
Canonical error-return type used by every ra8-firmware API.
NVIC + ICU IELSR allocator.
@ k_ra8_isr_prio_default
Middle priority.
ra8_err_t ra8_isr_init(void)
Initialise the ra8_isr table.
void ra8_isr_globals_enable(void)
Globally enable maskable interrupts (PRIMASK = 0).
ra8_err_t ra8_isr_register(ra8_elc_event_t event, ra8_isr_handler_t handler, void *ctx, uint8_t priority, uint16_t *out_slot)
Allocate an IELSR slot for an ELC event + handler.
Low Power Mode (LPM) HAL driver – public API.
ra8_err_t ra8_lpm_init(const ra8_lpm_config_t *cfg)
Initialise the LPM block from a config descriptor.
@ k_ra8_lpm_clock_loco
Low-Speed On-Chip Oscillator.
ra8_err_t ra8_lpm_enter_sleep(ra8_sleep_mode_t mode)
Programme LPSCR for mode and enter the requested sleep.
ra8_err_t ra8_lpm_arm_wupen1_bits(uint32_t bits)
OR-in additional WUPEN1 bits without disturbing other sources.
ra8_err_t ra8_lpm_set_clock_stop(ra8_lpm_clock_t clock, bool stop)
Set or clear the per-oscillator stop bit before sleep entry.
Low Power Mode (LPM) register layout for the Renesas RA8D2.
@ k_ra8_lpm_ss2lp_default
SS2LP_0 – default mode.
@ k_ra8_sleep_mode_software_std
Software Standby (LPMD=0x5).
@ k_ra8_lpm_dcssmode_128us
128 us soft-start (cold-reset default).
@ k_ra8_lpm_wupen1_ulpt0u
ULP0UWUPEN @ bit 8.
SysTick-based tick counter, delay and timestamp helpers.
ra8_err_t ra8_time_init(uint32_t cpu_hz)
Initialise SysTick for a 1 kHz tick interrupt.
Ultra-Low-Power Timer (ULPT) driver header.
ra8_err_t ra8_ulpt_get_status(uint8_t channel, uint8_t *out_mask)
Read ULPTCR status bits.
ra8_err_t ra8_ulpt_stop(uint8_t channel)
Stop a ULPT channel and confirm the counter has halted.
ra8_err_t ra8_ulpt_init(void)
Reset both ULPT channels to their power-on state.
ra8_err_t ra8_ulpt_start(uint8_t channel, uint32_t period)
Start a ULPT channel counting down from period.
@ k_ra8_ulpt_bit_tcstf
Count-status flag (read-only).
Configuration descriptor for ra8_lpm_init.