75typedef enum : uint32_t {
182 ra8_log_info(
"M85",
"cache_coherency_hil: 8 rounds PASS");
204 __asm
volatile(
"nop");
234 if (shared ==
nullptr) {
271 if ((shared ==
nullptr) || (next_seq ==
nullptr)) {
277 __asm
volatile(
"dsb" :::
"memory");
306 ra8_log_info(
"M85",
"cache_coherency_hil: D-cache ON, non-cacheable shared SRAM");
315 __asm
volatile(
"dsb" :::
"memory");
320 ra8_log_info(
"M85",
"VCOM console init failed -- banner over ITM only");
331 uint32_t next_seq = 1U;
333 bool banner_sent =
false;
void main(void)
Secure fallback main entry point.
Shared-SRAM message layout for the M85<->M33 cache-coherency HIL test.
@ k_cache_coherency_poll_budget
Max spin iters per direction.
@ k_cache_coherency_rounds
Verified rounds before PASS.
@ k_cache_coherency_pong_base
Expected round-0 pong payload.
@ k_cache_coherency_ping_base
CPU0 round-0 ping payload.
static volatile cache_coherency_shared_t * internal_shared(void)
Typed pointer to the fixed-address shared message block.
uint32_t g_ra8_ls_cpu1_mram_start
static void internal_emit_pass(void)
Emit the deterministic HIL success banner over the VCOM console.
static bool internal_console_init(void)
Bring up the SCI8 / J-Link OB VCOM console for the HIL success banner.
static void internal_park_forever(void)
Park the M85 forever after an unrecoverable startup failure.
cache_coherency_hil_const_t
VCOM-console line rate for the deterministic HIL banner.
@ k_cache_coherency_hil_baud
VCOM console line rate (8N1).
static RA8_INTERNAL void internal_round(volatile cache_coherency_shared_t *shared, uint32_t round, uint32_t *next_seq)
Run one cross-core round and update the HIL counters.
volatile uint32_t g_cache_coherency_match
HIL liveness counter – incremented on every verified M85 -> M33 -> M85 round-trip (echo == pong_base ...
volatile uint32_t g_cache_coherency_mismatch
HIL failure counter – incremented whenever a round cannot complete: the bounded pong wait timed out,...
static const uint8_t s_cache_coherency_pass_banner[]
Deterministic HIL success banner (uart_scrape / emulator-scrape).
static RA8_INTERNAL bool internal_wait_for_pong(const volatile cache_coherency_shared_t *shared, uint32_t target)
Poll until pong_seq reaches target or the budget runs out.
uint32_t g_ra8_ls_cpu1_stack_top
#define RA8_INTERNAL
Marker that a function is intended to be static (file-local).
ra8_err_t ra8_board_led_toggle(ra8_board_led_id_t led)
Toggle led's output state.
ra8_err_t ra8_board_led_init(ra8_board_led_id_t led)
Configure led as a digital output, initial level low (off).
@ k_ra8_board_led1
LED1, BLUE, P600 (jumper E27).
I/O-expander, USB, camera, external-memory, MIPI-DSI, UART console, and Ethernet portion of the EK-RA...
ra8_err_t ra8_board_uart_console_write(const uint8_t *data, size_t len)
Polled blocking write to the J-Link OB VCOM console.
ra8_err_t ra8_board_uart_console_init(uint32_t baud)
Configure SCI8 + PD02/PD03 as the debug-console UART.
ra8_err_t ra8_board_uart_console_flush(void)
Block until every byte queued on the J-Link OB VCOM console has finished clocking out on the wire.
Boot entry points shared between a vector table and its startup code.
High-level Clock Generation Circuit driver.
ra8_err_t ra8_cgc_init(void)
Configure the clock tree to a safe default.
Dual-core (CPU0 / CPU1) lifecycle helper – public API.
ra8_err_t ra8_cpu1_release(void *entry, void *sp)
Release CPU1 (Cortex-M33) from reset and start it executing.
Error Code Definitions for ra8-firmware.
@ k_ra8_ok
Success – operation completed with all postconditions satisfied.
ra8_err_codes_t ra8_err_t
Canonical error-return type used by every ra8-firmware API.
Lightweight Logging Interface for ra8-firmware.
void ra8_log_init(void)
Initialise the logging backend.
#define ra8_log_info_val(tag, message, value)
RA8 log info val.
#define ra8_log_info(tag, message)
RA8 log info.
Cross-CPU message struct backed by a fixed non-cacheable SRAM address.
volatile uint32_t ping_payload
CPU0 writes ping_base + r, CPU1 reads.
volatile uint32_t ping_seq
CPU0 increments after writing payload.
volatile uint32_t pong_seq
CPU1 sets to match ping_seq after reply.
volatile uint32_t pong_payload
CPU1 writes ping_payload + delta.