MIPI DSI-2 host driver – full HUM Ch 65 coverage. More...

#include "ra8_mipi_dsi.h"
#include <stddef.h>
#include <stdint.h>
#include <string.h>
#include "ra8_attributes.h"
#include "ra8_check.h"
#include "ra8_err.h"
#include "ra8_log.h"
#include "ra8_mipi_dsi_internal.h"
#include "ra8_mipi_dsi_regs.h"
#include "ra8_mstp.h"

Include dependency graph for ra8_mipi_dsi.c:

Functions
static ra8_err_t	internal_ra8_mipi_dsi_validate_cfg (const ra8_mipi_dsi_config_t *cfg)
	Validate a ra8_mipi_dsi_config_t argument.
static void	internal_ra8_mipi_dsi_clear_all_status (void)
	Clear every latched status bit in every sub-status register.
static uint32_t	internal_ra8_mipi_dsi_make_txsetr (const ra8_mipi_dsi_config_t *cfg)
	Compose TXSETR from a config (lane count + clock + data lane enable).
static uint32_t	internal_ra8_mipi_dsi_make_dsisetr (const ra8_mipi_dsi_config_t *cfg)
	Compose DSISETR from a config.
ra8_err_t	priv_ra8_mipi_dsi_internal_wait_eq (volatile const uint32_t *reg, uint32_t mask, uint32_t expect)
	Implementation of priv_ra8_mipi_dsi_internal_wait_eq() – bounded busy-poll.
static void	internal_program_link (const ra8_mipi_dsi_config_t *cfg)
	Pulse the RSTCR software reset and program the steady-state link-level registers.
static void	internal_program_timeouts (const ra8_mipi_dsi_config_t *cfg)
	Program the peripheral-response and transmit-side timeouts.
ra8_err_t	ra8_mipi_dsi_init (const ra8_mipi_dsi_config_t *cfg)
	Bring up the MIPI DSI host link layer.
ra8_err_t	ra8_mipi_dsi_deinit (void)
	Tear down the MIPI DSI host link layer.
ra8_err_t	ra8_mipi_dsi_enter_stop (void)
	Gate the MIPI DSI block at the MSTP register.
ra8_err_t	ra8_mipi_dsi_exit_stop (void)
	Re-enable the MIPI DSI block clock from MSTP.
ra8_err_t	ra8_mipi_dsi_soft_reset (void)
	Pulse RSTCR.SWRST to take the protocol-layer state back to a clean slate (registers retained).
ra8_err_t	ra8_mipi_dsi_hs_clock_start (void)
	Start the high-speed differential clock to the panel.
ra8_err_t	ra8_mipi_dsi_hs_clock_stop (void)
	Stop the high-speed differential clock.
ra8_err_t	ra8_mipi_dsi_ulps_enter (uint8_t lanes)
	Drive the selected lanes into Ultra-Low-Power State.
ra8_err_t	ra8_mipi_dsi_ulps_exit (uint8_t lanes)
	Wake the selected lanes out of ULPS.

Variables
static const char *	s_tag = "MIPI_DSI"
	Component tag used by the ra8_log_* family.
ra8_mipi_dsi_event_fn_t	s_mipi_dsi_event_fn
	Single definition of the shared IRQ callback pointer.
void *	s_mipi_dsi_event_ctx
	Single definition of the shared IRQ callback context.
static bool	s_continuous_clock
	Cache of cfg->clock_mode == continuous from the last init.
static bool	s_clock_lanes_in_ulps
	Software shadow of clock-lane ULPS state.
static bool	s_data_lanes_in_ulps
	Software shadow of data-lane ULPS state.
uint8_t *	s_mipi_dsi_pending_rx_buffer
	Single definition of the shared pending receive buffer.
uint16_t	s_mipi_dsi_pending_rx_len
	Single definition of the shared pending receive capacity.
static bool	s_initialized
	Software latch tracking whether the driver currently owns the MIPI-DSI module-stop reference count.

Detailed Description

MIPI DSI-2 host driver – full HUM Ch 65 coverage.

Tag: [Ring 3 / HAL] {World: S}

Hand-written HAL for the RA8D2 MIPI DSI Host module (HUM Ch 65, p 3839-3934). Covers every documented register, every operating mode (sequence channel 0 LP, sequence channel 1 HS, video mode, BTA / read response, ULPS), every interrupt source (SQ0, SQ1, VM, RX, FERR, PHY), every error class (ECC single/multi, CRC, BTA TO, peripheral response timeout, fatal HS-Tx / LP-Rx / TA timeouts).

The D-PHY analog block (HUM Ch 64) is owned by ra8_mipi_phy.c. This driver only programmes the DSI link/protocol layer above it.

This translation unit carries the configuration, software-reset, module-stop lifecycle, HS-clock control, and ULPS paths – everything that owns the driver's module state. The sequence-channel command path lives in the sibling ra8_mipi_dsi_cmd.c, and the video-mode, status, IRQ-dispatch and convenience surfaces in ra8_mipi_dsi_dispatch.c; state shared across the three TUs lives in ra8_mipi_dsi_internal.h.

Every register access carries a HUM Ch 65 citation in the form required by scripts/checks/cite_check.py:

/* HUM Ch 65.X "name", p NNNN *\/

State Machine: <p><b>This browser is not able to show SVG: try Firefox, Chrome, Safari, or Opera instead.</b></p>

Copyright: Copyright (c) 2026 Brighton Sikarskie SPDX-License-Identifier: MIT

Definition in file ra8_mipi_dsi.c.

Function Documentation

◆ internal_program_link()

void internal_program_link ( const ra8_mipi_dsi_config_t * cfg )

static

Pulse the RSTCR software reset and program the steady-state link-level registers.

HUM Ch 65.2 "RSTCR" p 3853 plus the TXSETR / ULPSSETR / DSISETR / CLSTPTSETR / LPTRNSTSETR cluster (pp 3845-3887). Split out so ra8_mipi_dsi_init stays under the function-size threshold.

Parameters

[in] cfg Validated config.

Precondition: Module clock ungated.

Postcondition: Listed registers reflect cfg; SWRST cleared.

Note: Internal helper, not thread-safe.

Precondition: Module state is consistent.

Postcondition: Caller-visible state matches the documented contract.

Since: 0.1.0

Definition at line 384 of file ra8_mipi_dsi.c.

References ra8_mipi_dsi_timing_t::clock_beforehand_time, ra8_mipi_dsi_timing_t::clock_keep_time, ra8_mipi_dsi_timing_t::clock_stop_time, r_mipi_dsi_regs_t::CLSTPTSETR, r_mipi_dsi_regs_t::DSISETR, ra8_mipi_dsi_timing_t::go_lp_and_back, internal_ra8_mipi_dsi_make_dsisetr(), internal_ra8_mipi_dsi_make_txsetr(), k_ra8_mipi_dsi_clstpt_clkbfht_mask, k_ra8_mipi_dsi_clstpt_clkbfht_shift, k_ra8_mipi_dsi_clstpt_clkkpt_mask, k_ra8_mipi_dsi_clstpt_clkkpt_shift, k_ra8_mipi_dsi_clstpt_clkstpt_mask, k_ra8_mipi_dsi_clstpt_clkstpt_shift, k_ra8_mipi_dsi_lptrnst_golpbkt_mask, k_ra8_mipi_dsi_rstcr_swrst, k_ulpssetr_wkup_shift, r_mipi_dsi_regs_t::LPTRNSTSETR, RA8_INTERNAL, ra8_mipi_dsi(), r_mipi_dsi_regs_t::RSTCR, ra8_mipi_dsi_config_t::timing, r_mipi_dsi_regs_t::TXSETR, ra8_mipi_dsi_config_t::ulps_wakeup_period, and r_mipi_dsi_regs_t::ULPSSETR.

Referenced by ra8_mipi_dsi_init().

◆ internal_program_timeouts()

void internal_program_timeouts ( const ra8_mipi_dsi_config_t * cfg )

static

Program the peripheral-response and transmit-side timeouts.

HUM Ch 65.2 PRESPTOBTASETR / PRESPTOLPSETR / PRESPTOHSSETR / HSTXTOSETR / LRXHTOSETR / TATOSETR pp 3873-3881.

Parameters

[in] cfg Validated config.

Precondition: Module clock ungated.

Postcondition: Listed timeout registers reflect cfg.

Note: Internal helper, not thread-safe.

Precondition: Module state is consistent.

Postcondition: Caller-visible state matches the documented contract.

Since: 0.1.0

Definition at line 428 of file ra8_mipi_dsi.c.

References ra8_mipi_dsi_timeouts_t::bta_timeout, ra8_mipi_dsi_timeouts_t::hs_rw_timeout, ra8_mipi_dsi_timeouts_t::hs_tx_timeout, r_mipi_dsi_regs_t::HSTXTOSETR, ra8_mipi_dsi_timeouts_t::lp_rw_timeout, ra8_mipi_dsi_timeouts_t::lp_rx_host_timeout, r_mipi_dsi_regs_t::LRXHTOSETR, r_mipi_dsi_regs_t::PRESPTOBTASETR, r_mipi_dsi_regs_t::PRESPTOHSSETR, r_mipi_dsi_regs_t::PRESPTOLPSETR, RA8_INTERNAL, ra8_mipi_dsi(), r_mipi_dsi_regs_t::TATOSETR, ra8_mipi_dsi_config_t::timeouts, and ra8_mipi_dsi_timeouts_t::turnaround_timeout.

Referenced by ra8_mipi_dsi_init().

◆ internal_ra8_mipi_dsi_clear_all_status()

void internal_ra8_mipi_dsi_clear_all_status ( void )

static

Clear every latched status bit in every sub-status register.

RW1C semantics mean writing a 1 clears the bit; writing 0xFFFFFFFF clears them all in a single store. Used by both init and the dispatch routines.

Precondition: Block is out of MSTP gate.; Caller's IRQs are masked or the call is itself in IRQ context.

Postcondition: All sub-status registers read 0 for valid bits.; Caller-visible state matches the documented contract.

Note: Not thread-safe unless documented otherwise.

Since: 0.1.0

Definition at line 271 of file ra8_mipi_dsi.c.

References r_mipi_dsi_regs_t::FERRSCR, k_ra8_mipi_dsi_ferrsr_clear_all, k_ra8_mipi_dsi_plsr_clear_all, k_ra8_mipi_dsi_rxsr_clear_all, k_ra8_mipi_dsi_sqch_clear_all, k_ra8_mipi_dsi_vmsr_clear_all, r_mipi_dsi_regs_t::PLSCR, RA8_INTERNAL, ra8_mipi_dsi(), r_mipi_dsi_regs_t::RXSCR, r_mipi_dsi_regs_t::SQCH0SCR, r_mipi_dsi_regs_t::SQCH1SCR, and r_mipi_dsi_regs_t::VMSCR.

Referenced by ra8_mipi_dsi_init().

◆ internal_ra8_mipi_dsi_make_dsisetr()

uint32_t internal_ra8_mipi_dsi_make_dsisetr ( const ra8_mipi_dsi_config_t * cfg )

static

Compose DSISETR from a config.

Parameters

[in] cfg Validated configuration.

Returns: Word ready for write to DSISETR.

See implementation.

Return values

k_ra8_ok Operation succeeded.

Precondition: Module state is consistent.; Module state is consistent.

Postcondition: Caller-visible state matches the documented contract.; Caller-visible state matches the documented contract.

Note: Not thread-safe unless documented otherwise.

Since: 0.1.0

Definition at line 327 of file ra8_mipi_dsi.c.

References ra8_mipi_dsi_config_t::crc_check_vc_mask, ra8_mipi_dsi_config_t::ecc_check_enable, ra8_mipi_dsi_config_t::eotp_enable, k_dsisetr_vc_crc_shift, k_ra8_mipi_dsi_dsisetr_eccen, k_ra8_mipi_dsi_dsisetr_eotpen, k_ra8_mipi_dsi_dsisetr_extemd, k_ra8_mipi_dsi_dsisetr_mrpsz_mask, k_ra8_mipi_dsi_dsisetr_scren, k_ra8_mipi_dsi_dsisetr_vc_crc_mask, ra8_mipi_dsi_config_t::max_return_packet_size, RA8_INTERNAL, ra8_mipi_dsi_config_t::scramble_enable, and ra8_mipi_dsi_config_t::tearing_detect_enable.

Referenced by internal_program_link().

◆ internal_ra8_mipi_dsi_make_txsetr()

uint32_t internal_ra8_mipi_dsi_make_txsetr ( const ra8_mipi_dsi_config_t * cfg )

static

Compose TXSETR from a config (lane count + clock + data lane enable).

Parameters

[in] cfg Validated configuration.

Returns: Word ready for write to TXSETR.

See implementation.

Return values

k_ra8_ok Operation succeeded.

Precondition: Module state is consistent.; Module state is consistent.

Postcondition: Caller-visible state matches the documented contract.; Caller-visible state matches the documented contract.

Note: Not thread-safe unless documented otherwise.

Since: 0.1.0

Definition at line 303 of file ra8_mipi_dsi.c.

References k_ra8_mipi_dsi_lanes_2, k_ra8_mipi_dsi_txset_clen, k_ra8_mipi_dsi_txset_dlen, k_ra8_mipi_dsi_txset_lane2, ra8_mipi_dsi_config_t::lane_count, and RA8_INTERNAL.

Referenced by internal_program_link().

◆ internal_ra8_mipi_dsi_validate_cfg()

ra8_err_t internal_ra8_mipi_dsi_validate_cfg ( const ra8_mipi_dsi_config_t * cfg )

static

Validate a ra8_mipi_dsi_config_t argument.

Parameters

[in] cfg Caller-supplied config.

Returns: k_ra8_ok if OK, k_ra8_err_invalid_arg if lane_count is outside [1,2].

Precondition: cfg is non-NULL (checked by caller via RA8_CHECK_NULL_PTR).; Caller is in single-threaded context.

Postcondition: No side effects.

See implementation.

Return values

k_ra8_ok Operation succeeded.

Postcondition: Caller-visible state matches the documented contract.

Note: Not thread-safe unless documented otherwise.

Since: 0.1.0

Definition at line 247 of file ra8_mipi_dsi.c.

References k_ra8_err_invalid_arg, k_ra8_mipi_dsi_lanes_1, k_ra8_mipi_dsi_lanes_2, k_ra8_ok, ra8_mipi_dsi_config_t::lane_count, and RA8_INTERNAL.

Referenced by ra8_mipi_dsi_init().

◆ priv_ra8_mipi_dsi_internal_wait_eq()

ra8_err_t priv_ra8_mipi_dsi_internal_wait_eq	(	volatile const uint32_t *	reg,
		uint32_t	mask,
		uint32_t	expect )

Implementation of priv_ra8_mipi_dsi_internal_wait_eq() – bounded busy-poll.

Bounded poll waiting for (reg & mask) == expect.

Definition at line 349 of file ra8_mipi_dsi.c.

References k_ra8_err_hw_timeout, k_ra8_mipi_dsi_busy_loop_max, and k_ra8_ok.

Referenced by ra8_mipi_dsi_hs_clock_start(), ra8_mipi_dsi_hs_clock_stop(), ra8_mipi_dsi_video_start(), and ra8_mipi_dsi_video_stop().

◆ ra8_mipi_dsi_deinit()

ra8_err_t ra8_mipi_dsi_deinit ( void )

nodiscard

Tear down the MIPI DSI host link layer.

Detaches any IRQ handler, asserts RSTCR.SWRST, then disables the MSTP gate. Idempotent: calling twice in a row is harmless.

Returns: ra8_err_t outcome.

Return values

k_ra8_ok	Block stopped, MSTP gated.
k_ra8_err_hw_timeout	MSTP read-back loop timed out.

Precondition: Driver was initialized with ra8_mipi_dsi_init (ignored if not).; No active sequence operation (LINKSR.SQ0RUN == SQ1RUN == 0).

Postcondition: IRQ callback pointer cleared.; MSTPCRC.MSTPC10 set (block clock gated).

Note: Not thread-safe.

See also: ra8_mipi_dsi_init

Since: 0.1.0

Definition at line 466 of file ra8_mipi_dsi.c.

References k_ra8_mipi_dsi_rstcr_swrst, k_ra8_mstp_mipi_dsi, k_ra8_ok, ra8_mipi_dsi(), ra8_mstp_disable(), r_mipi_dsi_regs_t::RSTCR, s_clock_lanes_in_ulps, s_continuous_clock, s_data_lanes_in_ulps, s_initialized, s_mipi_dsi_event_ctx, s_mipi_dsi_event_fn, s_mipi_dsi_pending_rx_buffer, and s_mipi_dsi_pending_rx_len.

◆ ra8_mipi_dsi_enter_stop()

ra8_err_t ra8_mipi_dsi_enter_stop ( void )

nodiscard

Gate the MIPI DSI block at the MSTP register.

Returns: ra8_err_t outcome.

Return values

k_ra8_ok	Block gated.
k_ra8_err_hw_timeout	MSTP read-back loop timed out.

Precondition: Sequence + video engines are idle (caller's responsibility).; IRQs are masked.

Postcondition: MSTPCRC.MSTPC10 is set.

See also: ra8_mipi_dsi_exit_stop

Since: 0.1.0

Definition at line 495 of file ra8_mipi_dsi.c.

References k_ra8_err_invalid_state, k_ra8_mstp_mipi_dsi, k_ra8_ok, ra8_mstp_disable(), and s_initialized.

◆ ra8_mipi_dsi_exit_stop()

ra8_err_t ra8_mipi_dsi_exit_stop ( void )

nodiscard

Re-enable the MIPI DSI block clock from MSTP.

Returns: ra8_err_t outcome.

Return values

k_ra8_ok	Block clocked again.
k_ra8_err_hw_timeout	MSTP read-back loop timed out.

Precondition: Caller is in single-threaded context.; PHY is up and out of LP-11 stop.

Postcondition: MSTPCRC.MSTPC10 is clear, register I/O works again.

See also: ra8_mipi_dsi_enter_stop

Since: 0.1.0

Definition at line 510 of file ra8_mipi_dsi.c.

References k_ra8_err_invalid_state, k_ra8_mstp_mipi_dsi, k_ra8_ok, ra8_mstp_enable(), and s_initialized.

◆ ra8_mipi_dsi_hs_clock_start()

ra8_err_t ra8_mipi_dsi_hs_clock_start ( void )

nodiscard

Start the high-speed differential clock to the panel.

Sets HSCLKSETR.HSCLST = 1 and, if the init config selected continuous mode, also sets HSCLMD = 1. Polls PLSR.CLLP2HS until the clock-lane LP-to-HS event fires (bounded by k_ra8_mipi_dsi_busy_loop_max).

Returns: k_ra8_ok on success, k_ra8_err_hw_timeout on poll timeout.

Precondition: Driver is initialized.; PHY is up.

Postcondition: LINKSR.HSBUSY clear once HS clock is stable.; Continuous mode: clock keeps running until ra8_mipi_dsi_hs_clock_stop().

Since: 0.1.0

Definition at line 539 of file ra8_mipi_dsi.c.

References r_mipi_dsi_regs_t::HSCLKSETR, k_ra8_mipi_dsi_hsclk_continuous, k_ra8_mipi_dsi_hsclk_start, k_ra8_mipi_dsi_plsr_cllp2hs, r_mipi_dsi_regs_t::PLSR, priv_ra8_mipi_dsi_internal_wait_eq(), ra8_mipi_dsi(), and s_continuous_clock.

Referenced by ra8_board_mipi_dsi_init().

◆ ra8_mipi_dsi_hs_clock_stop()

ra8_err_t ra8_mipi_dsi_hs_clock_stop ( void )

nodiscard

Stop the high-speed differential clock.

Clears HSCLKSETR.HSCLST and waits for PLSR.CLHS2LP.

Returns: k_ra8_ok on success, k_ra8_err_hw_timeout on poll timeout.

Precondition: Sequence channels idle.; Video mode stopped.

Postcondition: HS clock lane is back to LP-11.; Subsequent HS Tx will fail until the clock is restarted.

Since: 0.1.0

Definition at line 554 of file ra8_mipi_dsi.c.

References r_mipi_dsi_regs_t::HSCLKSETR, k_ra8_mipi_dsi_plsr_clhs2lp, r_mipi_dsi_regs_t::PLSR, priv_ra8_mipi_dsi_internal_wait_eq(), and ra8_mipi_dsi().

◆ ra8_mipi_dsi_init()

ra8_err_t ra8_mipi_dsi_init ( const ra8_mipi_dsi_config_t * cfg )

nodiscard

Bring up the MIPI DSI host link layer.

Releases module-stop bit MSTPCRC.MSTPC10 (HUM 11.2.8 p 446).
Asserts then de-asserts RSTCR.SWRST to drop the block back to a known reset state.
Programmes lane count + lane enables in TXSETR.
Loads DSISETR from the config struct (ECC, CRC mask, scramble, EoTp, tearing detect, max-return-packet size).
Loads guard-band timing into CLSTPTSETR / LPTRNSTSETR.
Loads bus timeouts into HSTXTOSETR / LRXHTOSETR / TATOSETR / PRESPTOBTASETR / PRESPTOLPSETR / PRESPTOHSSETR.
Loads ULPS wake-up period into ULPSSETR.
Clears all latched status flags so the first IRQ reflects only post-init events.

The HS clock is not started by this function; call ra8_mipi_dsi_hs_clock_start() separately so the application can insert PHY-level steps in between.

Parameters

[in] cfg Static driver configuration. Must not be nullptr.

Returns: ra8_err_t outcome.

Return values

k_ra8_ok	Driver initialized, link up.
k_ra8_err_null_ptr	cfg == nullptr.
k_ra8_err_invalid_arg	Lane count outside [1,2].
k_ra8_err_hw_timeout	MSTP read-back loop timed out.

Precondition: cfg is non-NULL.; cfg->lane_count is one of the k_ra8_mipi_dsi_lanes_* values.

Postcondition: On success, LINKSR reports HSBUSY/LPBUSY clear.; On success, every sub-status register reads 0.

Note: Not thread-safe. Call from single-threaded init context.

Warning: The MIPI PHY (HUM Ch 64) must be brought up first.

See also: ra8_mipi_dsi_deinit; ra8_mipi_dsi_hs_clock_start

Since: 0.1.0

Definition at line 439 of file ra8_mipi_dsi.c.

References ra8_mipi_dsi_config_t::clock_mode, internal_program_link(), internal_program_timeouts(), internal_ra8_mipi_dsi_clear_all_status(), internal_ra8_mipi_dsi_validate_cfg(), k_ra8_mipi_dsi_clock_continuous, k_ra8_mstp_mipi_dsi, k_ra8_ok, RA8_CHECK_NULL_PTR, ra8_log_info, ra8_mstp_enable(), RA8_RETURN_ON_ERROR, s_clock_lanes_in_ulps, s_continuous_clock, s_data_lanes_in_ulps, s_initialized, s_mipi_dsi_event_ctx, s_mipi_dsi_event_fn, s_mipi_dsi_pending_rx_buffer, s_mipi_dsi_pending_rx_len, and s_tag.

Referenced by ra8_board_mipi_dsi_init().

◆ ra8_mipi_dsi_soft_reset()

ra8_err_t ra8_mipi_dsi_soft_reset ( void )

nodiscard

Pulse RSTCR.SWRST to take the protocol-layer state back to a clean slate (registers retained).

Returns: k_ra8_ok always.

Precondition: Caller has IRQs masked or is in IRQ context.; Sequence channels are idle.

Postcondition: RSTSR.RSTHS|RSTLP|RSTAPB|RSTAXI|RSTV read 0 on success.; Block is ready for a fresh ra8_mipi_dsi_hs_clock_start().

Since: 0.1.0

Definition at line 524 of file ra8_mipi_dsi.c.

References k_ra8_mipi_dsi_rstcr_swrst, k_ra8_ok, ra8_mipi_dsi(), and r_mipi_dsi_regs_t::RSTCR.

◆ ra8_mipi_dsi_ulps_enter()

ra8_err_t ra8_mipi_dsi_ulps_enter ( uint8_t lanes )

nodiscard

Drive the selected lanes into Ultra-Low-Power State.

Parameters

[in] lanes OR of k_ra8_mipi_dsi_lane_clock / k_ra8_mipi_dsi_lane_data.

Returns: k_ra8_ok on success; k_ra8_err_invalid_arg if lanes == 0 or the clock lane is requested while continuous-clock mode is on (HW prohibits it).

Precondition: Driver initialized and HS clock currently running.; lanes is a non-empty subset of valid lane bits.

Postcondition: ULPSCR.CLENT and/or DLENT were pulsed for selected lanes.; Subsequent ra8_mipi_dsi_send_* is rejected until _ulps_exit.

Since: 0.1.0

Definition at line 570 of file ra8_mipi_dsi.c.

References k_ra8_err_invalid_arg, k_ra8_mipi_dsi_lane_clock, k_ra8_mipi_dsi_lane_data, k_ra8_mipi_dsi_lane_none, k_ra8_mipi_dsi_ulpscr_clent, k_ra8_mipi_dsi_ulpscr_dlent, k_ra8_ok, ra8_log_error, ra8_mipi_dsi(), s_clock_lanes_in_ulps, s_continuous_clock, s_data_lanes_in_ulps, s_tag, and r_mipi_dsi_regs_t::ULPSCR.

Referenced by ra8_mipi_dsi_enter_ulps().

◆ ra8_mipi_dsi_ulps_exit()

ra8_err_t ra8_mipi_dsi_ulps_exit ( uint8_t lanes )

nodiscard

Wake the selected lanes out of ULPS.

Parameters

[in] lanes OR of k_ra8_mipi_dsi_lane_* bits.

Returns: k_ra8_ok on success; k_ra8_err_invalid_arg if lanes == 0.

Precondition: At least one of the requested lanes is currently in ULPS (otherwise the exit pulse is a no-op).; Driver initialized.

Postcondition: ULPSCR.CLEXIT and/or DLEXIT pulsed.; After the wake-up sequence completes (driver-tracked) the link is ready for HS / LP traffic again.

Since: 0.1.0

Definition at line 595 of file ra8_mipi_dsi.c.

References k_ra8_err_invalid_arg, k_ra8_mipi_dsi_lane_clock, k_ra8_mipi_dsi_lane_data, k_ra8_mipi_dsi_lane_none, k_ra8_mipi_dsi_ulpscr_clexit, k_ra8_mipi_dsi_ulpscr_dlexit, k_ra8_ok, ra8_mipi_dsi(), s_clock_lanes_in_ulps, s_data_lanes_in_ulps, and r_mipi_dsi_regs_t::ULPSCR.

Referenced by ra8_mipi_dsi_exit_ulps().

Variable Documentation

◆ s_clock_lanes_in_ulps

bool s_clock_lanes_in_ulps

static

Software shadow of clock-lane ULPS state.

The hardware does not expose a "currently in ULPS" bit cheaply, so the driver tracks it. Pulsing CLENT a second time while already in ULPS is a no-op in HW but FSP guards against it for symmetry; we do the same.

Note: Updated only from ULPS enter / exit helpers.

Warning: Reset by ra8_mipi_dsi_init() and _deinit().

Since: 0.1.0

Definition at line 153 of file ra8_mipi_dsi.c.

Referenced by ra8_mipi_dsi_deinit(), ra8_mipi_dsi_init(), ra8_mipi_dsi_ulps_enter(), and ra8_mipi_dsi_ulps_exit().

◆ s_continuous_clock

bool s_continuous_clock

static

Cache of cfg->clock_mode == continuous from the last init.

Needed because the ULPS-enter helper must reject a clock-lane ULPS request when continuous-clock mode is on – the FSP source enforces the same rule. Snap-shotting it once at init avoids an extra register read on every ra8_mipi_dsi_ulps_enter() call.

Note: Mutated only from ra8_mipi_dsi_init().

Warning: Stale across reinit if init is skipped.

Since: 0.1.0

Definition at line 137 of file ra8_mipi_dsi.c.

Referenced by ra8_mipi_dsi_deinit(), ra8_mipi_dsi_hs_clock_start(), ra8_mipi_dsi_init(), and ra8_mipi_dsi_ulps_enter().

◆ s_data_lanes_in_ulps

bool s_data_lanes_in_ulps

static

Software shadow of data-lane ULPS state.

Note: Updated only from ULPS enter / exit helpers.

Warning: Reset by ra8_mipi_dsi_init() and _deinit().

Since: 0.1.0

Definition at line 163 of file ra8_mipi_dsi.c.

Referenced by ra8_mipi_dsi_deinit(), ra8_mipi_dsi_init(), ra8_mipi_dsi_ulps_enter(), and ra8_mipi_dsi_ulps_exit().

◆ s_initialized

bool s_initialized

static

Software latch tracking whether the driver currently owns the MIPI-DSI module-stop reference count.

Set true at the tail of ra8_mipi_dsi_init() once the MSTPC bit has been ungated, and cleared at the tail of ra8_mipi_dsi_deinit() once the bit has been gated. ra8_mipi_dsi_enter_stop() clears it (because it gives the MSTPC reference back) and ra8_mipi_dsi_exit_stop() re-sets it. The flag exists so that deinit() is idempotent: calling it on an already-de-initialized driver returns k_ra8_ok instead of letting ra8_mstp_disable() underflow its reference count and surface k_ra8_err_invalid_state. HUM Ch 11.2.8 "MSTPCRC : Module Stop Control Register C", p 446 only describes the gate bit; the reference-count discipline is a software invariant maintained by libs/ra8_hal/src/ra8_mstp.c.

Note: Mutated only from init / deinit / enter_stop / exit_stop; not thread-safe.

Warning: Bypassing these entry points (e.g. by calling ra8_mstp_* directly) will desynchronise this latch from the actual MSTPC state.

Since: 0.1.0

Definition at line 223 of file ra8_mipi_dsi.c.

◆ s_mipi_dsi_event_ctx

void* s_mipi_dsi_event_ctx

Single definition of the shared IRQ callback context.

Opaque context handed back to the IRQ callback.

Declared extern (with the full contract) in ra8_mipi_dsi_internal.h. Lifetime is owned by the caller of ra8_mipi_dsi_attach_handler.

Note: May be NULL if the user never attached.

Warning: Direct access from outside the MIPI DSI-2 driver is forbidden.

Since: 0.1.0

Single definition lives in ra8_mipi_dsi.c. Lifetime is owned by the caller of ra8_mipi_dsi_attach_handler.

Note: May be NULL if the user never attached.

Warning: Direct access from outside the MIPI DSI-2 driver is forbidden.

Since: 0.1.0

Definition at line 121 of file ra8_mipi_dsi.c.

Referenced by internal_ra8_mipi_dsi_call_user(), ra8_mipi_dsi_attach_handler(), ra8_mipi_dsi_deinit(), and ra8_mipi_dsi_init().

◆ s_mipi_dsi_event_fn

ra8_mipi_dsi_event_fn_t s_mipi_dsi_event_fn

Single definition of the shared IRQ callback pointer.

Currently registered IRQ callback, or nullptr.

Declared extern (with the full contract) in ra8_mipi_dsi_internal.h and read from IRQ context in ra8_mipi_dsi_dispatch.c. Mutated only from the single-threaded init / deinit / attach-handler call sites.

Note: Direct access from outside the MIPI DSI-2 driver is forbidden.

Warning: Not thread-safe; treat as IRQ-shared state.

Since: 0.1.0

Single definition lives in ra8_mipi_dsi.c. Mutated from the single-threaded init / deinit / attach-handler call sites; read from IRQ context inside ra8_mipi_dsi_dispatch.c.

Note: Direct access from outside the MIPI DSI-2 driver is forbidden.

Warning: Not thread-safe; treat as IRQ-shared state.

Since: 0.1.0

Definition at line 106 of file ra8_mipi_dsi.c.

Referenced by internal_ra8_mipi_dsi_call_user(), ra8_mipi_dsi_attach_handler(), ra8_mipi_dsi_deinit(), and ra8_mipi_dsi_init().

◆ s_mipi_dsi_pending_rx_buffer

uint8_t* s_mipi_dsi_pending_rx_buffer

Single definition of the shared pending receive buffer.

Buffer the caller passed to ra8_mipi_dsi_read_packet().

Declared extern (with the full contract) in ra8_mipi_dsi_internal.h. The receive ISR in ra8_mipi_dsi_dispatch.c copies long-packet payload bytes from RXPPD0..3R into this buffer once the response arrives, then clears it to avoid stale-pointer use.

Note: Modified from read_packet / send_command and the RX dispatch.

Warning: The pointer must remain valid until the IRQ fires.

Since: 0.1.0

Single definition lives in ra8_mipi_dsi.c. The receive ISR in ra8_mipi_dsi_dispatch.c copies long-packet payload bytes into this buffer once the response arrives and then clears it to avoid stale-pointer use.

Note: Modified from read_packet / send_command and the RX dispatch.

Warning: The pointer must remain valid until the IRQ fires.

Since: 0.1.0

Definition at line 180 of file ra8_mipi_dsi.c.

Referenced by ra8_mipi_dsi_deinit(), ra8_mipi_dsi_dispatch_receive(), ra8_mipi_dsi_init(), ra8_mipi_dsi_read_packet(), and ra8_mipi_dsi_send_command().

◆ s_mipi_dsi_pending_rx_len

uint16_t s_mipi_dsi_pending_rx_len

Single definition of the shared pending receive capacity.

Capacity of s_mipi_dsi_pending_rx_buffer in bytes.

Declared extern (with the full contract) in ra8_mipi_dsi_internal.h. Cleared to zero once the response is consumed by the RX dispatch.

Note: Treat as undefined when s_mipi_dsi_pending_rx_buffer is NULL.

Warning: Direct access from outside the MIPI DSI-2 driver is forbidden.

Since: 0.1.0

Single definition lives in ra8_mipi_dsi.c. Cleared to zero once the response is consumed by the RX dispatch.

Note: Treat as undefined when s_mipi_dsi_pending_rx_buffer is NULL.

Warning: Direct access from outside the MIPI DSI-2 driver is forbidden.

Since: 0.1.0

Definition at line 195 of file ra8_mipi_dsi.c.

Referenced by ra8_mipi_dsi_deinit(), ra8_mipi_dsi_dispatch_receive(), ra8_mipi_dsi_init(), ra8_mipi_dsi_read_packet(), and ra8_mipi_dsi_send_command().

◆ s_tag

const char* s_tag = "MIPI_DSI"

static

Component tag used by the ra8_log_* family.

Static so the linker keeps it confined to this TU. Same convention as every other ra8_hal driver (see ra8_glcdc.c, ra8_doc.c).

Note: Read-only after assignment. Not modified at runtime.

Warning: Never modify directly – declared const to enforce.

Since: 0.1.0

Definition at line 90 of file ra8_mipi_dsi.c.

Functions

Variables

Detailed Description

Function Documentation

◆ internal_program_link()

◆ internal_program_timeouts()

◆ internal_ra8_mipi_dsi_clear_all_status()

◆ internal_ra8_mipi_dsi_make_dsisetr()

◆ internal_ra8_mipi_dsi_make_txsetr()

◆ internal_ra8_mipi_dsi_validate_cfg()

◆ priv_ra8_mipi_dsi_internal_wait_eq()

◆ ra8_mipi_dsi_deinit()

◆ ra8_mipi_dsi_enter_stop()

◆ ra8_mipi_dsi_exit_stop()

◆ ra8_mipi_dsi_hs_clock_start()

◆ ra8_mipi_dsi_hs_clock_stop()

◆ ra8_mipi_dsi_init()

◆ ra8_mipi_dsi_soft_reset()

◆ ra8_mipi_dsi_ulps_enter()

◆ ra8_mipi_dsi_ulps_exit()

Variable Documentation

◆ s_clock_lanes_in_ulps

◆ s_continuous_clock

◆ s_data_lanes_in_ulps

◆ s_initialized

◆ s_mipi_dsi_event_ctx

◆ s_mipi_dsi_event_fn

◆ s_mipi_dsi_pending_rx_buffer

◆ s_mipi_dsi_pending_rx_len

◆ s_tag