Where the EK-RA8D2's Cortex-M85 and Cortex-M33 meet, stated once. More...

#include <stdint.h>
#include "ra8_err.h"

Include dependency graph for ra8_board_ek_ra8d2_dualcore.h:

This graph shows which files directly or indirectly include this file:

Data Structures
struct	ra8_board_shared_ram_t
	Runtime descriptor of the CPU0 <-> CPU1 shared window. More...

Enumerations
enum	ra8_board_dualcore_addr_t : uintptr_t { k_ra8_board_shared_ram_base = 0x22100000UL , k_ra8_board_cpu1_sram_base = 0x22190000UL , k_ra8_board_cpu1_image_base = 0x020C0000UL }
	Base addresses of the EK-RA8D2 dual-core memory map. More...
enum	ra8_board_dualcore_size_t : uint32_t { k_ra8_board_shared_ram_size_bytes = 0x90000UL , k_ra8_board_cpu1_sram_size_bytes = 0x10000UL , k_ra8_board_cpu1_image_size_bytes = 0x40000UL }
	Lengths of the windows named by ra8_board_dualcore_addr_t. More...

Functions
ra8_err_t	ra8_board_shared_ram (ra8_board_shared_ram_t *out)
	Describe the window where the M85 and the M33 meet.

Detailed Description

Where the EK-RA8D2's Cortex-M85 and Cortex-M33 meet, stated once.

Tag: [Ring 5 / BSP] {World: S}

The RA8D2 is a dual-core part and its two cores have to agree on an address to talk through. Nothing in the tree used to say what that address was, so every dual-core application invented its own answer: seven app-private headers each declared the same SRAM2 base under a different name (k_dualcore_mailbox_addr, k_cpu1_pingpong_shared_addr, k_cache_coherency_shared_addr, k_erm33_mailbox_addr, k_lowpower_mailbox_addr, k_com33_mailbox_addr, k_bg_sram_base), each re-arguing the same three facts in a hand-written paragraph. One memory-map decision was spelled out in roughly nineteen places across examples/, and a change to it would have had to find all nineteen.

It is a BOARD fact, and the board already acts on it: this package's src/boot/system_init.c programmes MPU region 4 over exactly this window. That translation unit now takes its numbers from here, so the boot and the applications cannot drift apart.

SELF-CONTAINED ON PURPOSE. A dual-core app's CPU1 translation unit compiles against a deliberately narrow include path (ra8_core/inc, ra8_hal/inc, this directory) because a Cortex-M33 image must not reach a header that drags in the logger or the pin validator. This header pulls in nothing but <stdint.h> and ra8_err.h so it can be included from either core's image. Only ra8_board_shared_ram needs the M85-side translation unit; the constants alone cost no link dependency.

THE MAP

Window	Base	Length
CPU0 (M85) private SRAM0+1	0x22000000	1 MiB
CPU0 <-> CPU1 shared window	0x22100000	576 KiB
CPU1 (M33) private SRAM bank	0x22190000	64 KiB
CPU1 (M33) code image, MRAM	0x020C0000	256 KiB

The shared window is unallocated by BOTH linker scripts – CPU0's ends at 0x22100000 and CPU1's claims only the 64 KiB bank above it – so the same physical bytes back the same addresses on both cores with no aliasing.

Copyright: Copyright (c) 2026 Brighton Sikarskie SPDX-License-Identifier: MIT

Since: 0.1.0

Definition in file ra8_board_ek_ra8d2_dualcore.h.

Enumeration Type Documentation

◆ ra8_board_dualcore_addr_t

enum ra8_board_dualcore_addr_t : uintptr_t

Base addresses of the EK-RA8D2 dual-core memory map.

uintptr_t rather than uint32_t: these are addresses, and the host unit-test build is 64-bit, where a uint32_t enum silently truncates a pointer cast.

Invariant: k_ra8_board_shared_ram_base is above CPU0's linker-allocated SRAM and below k_ra8_board_cpu1_sram_base, so neither linker script can place an object in it.; k_ra8_board_cpu1_sram_base + 64 KiB is the top of on-chip SRAM.

volatile my_mailbox_t* mbox =

(volatile my_mailbox_t*)(uintptr_t)k_ra8_board_shared_ram_base;

k_ra8_board_shared_ram_base

@ k_ra8_board_shared_ram_base

Start of SRAM2: the CPU0 <-> CPU1 meeting window.

Definition ra8_board_ek_ra8d2_dualcore.h:87

See also: ra8_board_shared_ram The runtime descriptor over this window.; ra8_board_dualcore_size_t The matching lengths.

Since: 0.1.0

Enumerator

k_ra8_board_shared_ram_base

Start of SRAM2: the CPU0 <-> CPU1 meeting window.

Both linker scripts leave it unclaimed.

k_ra8_board_cpu1_sram_base

CPU1's private 64 KiB bank at the top of on-chip SRAM: .data, .bss and the M33 main stack.

k_ra8_board_cpu1_image_base

MRAM_CPU1: where the linked M33 image is pinned, so one .hex spans both cores' code.

Definition at line 86 of file ra8_board_ek_ra8d2_dualcore.h.

◆ ra8_board_dualcore_size_t

enum ra8_board_dualcore_size_t : uint32_t

Lengths of the windows named by ra8_board_dualcore_addr_t.

The shared window's length is the distance from its base up to CPU1's private bank – it is bounded by that bank, not by the top of SRAM, so an application carving a large buffer out of it cannot silently overrun into the M33's stack.

Invariant: k_ra8_board_shared_ram_size_bytes equals k_ra8_board_cpu1_sram_base - k_ra8_board_shared_ram_base.

See also: ra8_board_dualcore_addr_t The matching bases.

Since: 0.1.0

Enumerator
k_ra8_board_shared_ram_size_bytes	576 KiB, base up to CPU1's bank.
k_ra8_board_cpu1_sram_size_bytes	64 KiB CPU1 private bank.
k_ra8_board_cpu1_image_size_bytes	256 KiB MRAM window for the M33 image.

Definition at line 115 of file ra8_board_ek_ra8d2_dualcore.h.

Function Documentation

◆ ra8_board_shared_ram()

ra8_err_t ra8_board_shared_ram ( ra8_board_shared_ram_t * out )

nodiscard

Describe the window where the M85 and the M33 meet.

Publishes the board's answer to "where do the two cores talk", so an application stops carrying its own copy of the address, the length and the cacheability argument. The values are compile-time board facts; this call performs no hardware access and cannot fail for any reason other than a null argument.

Parameters

[out] out Descriptor to fill in. Must not be null. Fully overwritten on success.

Returns: ra8_err_t Error code.

Return values

k_ra8_ok	`out` describes the shared window.
k_ra8_err_null_ptr	`out` was null.

Precondition: The image is running on an EK-RA8D2 (or its emulator), whose linker scripts leave this window unallocated.; Called from a context that may read board configuration – any, since no register is touched.

Postcondition: On success out->base is k_ra8_board_shared_ram_base and out->size_bytes is k_ra8_board_shared_ram_size_bytes.; On failure no caller-visible state is modified.

Note: Thread-safe and reentrant: it reads only compile-time constants.

Warning: The window is shared. Two applications' worth of structures cannot both start at base; carve from it with an explicit offset when a component needs more than the first object.

See also: ra8_board_dualcore_addr_t The same facts as compile-time constants, for a statically placed object.; ra8_cpu1_release Starting the M33 once the window is set up.

Since: 0.1.0

Definition at line 55 of file ra8_board_ek_ra8d2_dualcore.c.

References k_ra8_board_shared_ram_base, k_ra8_board_shared_ram_size_bytes, k_ra8_ok, RA8_CHECK_NULL_PTR, s_shared_ram_is_non_cacheable, and s_tag.

Data Structures

Enumerations