Shared-SRAM control block for the M33 autonomous counter demo. More...

#include <stdint.h>
#include "ra8_board_ek_ra8d2_dualcore.h"

Include dependency graph for dualcore_background.h:

This graph shows which files directly or indirectly include this file:

Data Structures
struct	dualcore_bg_t
	Shared control block for the autonomous M33 counter demo. More...

Enumerations
enum	bg_addr_t : uintptr_t { k_bg_sram_base = (uintptr_t)k_ra8_board_shared_ram_base }
	Fixed SRAM address for the shared control block. More...
enum	bg_const_t : uint32_t { k_bg_m33_signature = 0x33330033UL , k_bg_target_count = 1000U }
	Protocol constants shared by both core images. More...

Functions
static volatile dualcore_bg_t *	dualcore_bg (void)
	Typed pointer to the fixed-address shared control block.

Detailed Description

Shared-SRAM control block for the M33 autonomous counter demo.

Tag: [Ring 6 / APP] {World: S}

This header defines the single shared-memory struct that lets the M85 observe the M33 running autonomously. The layout is intentionally minimal: three words at a fixed SRAM address that both cores can reach without any linker-visible symbol on the other core's image.

Why a fixed address? Each core is a separate compiled image with its own linker script, so a C-level global in one image is invisible to the other. Hard-coding the address is the one name both images resolve identically.

Address choice: 0x22100000 is the start of the upper on-chip SRAM region, just above the M85 secure SRAM the linker claims (0x22000000 + 1024K). The M33 image's 64 KiB bank lives far above it at the top of SRAM (0x22190000-0x221A0000), so neither linker script allocates these three words, leaving them free for shared use. Both cores can access this address because the on-chip SRAM bus is shared (HUM Ch 5.1 "Address Space" Table 5.1 p 239 – dual-core SRAM spans 0x22000000..0x221A0000).

Coherency: the M85 leaves its data cache off in system_init.c, so a single dsb drains the write buffer and makes a store visible to the other core. The fields are volatile so the compiler always emits real load/store instructions.

Protocol:

M33 boots, writes k_bg_m33_signature to m33_sig.
M33 increments counter k_bg_target_count times.
M33 sets done = 1.
M85 polls m33_sig until it sees the signature (M33 alive).
M85 polls done until it is 1 (M33 finished).
M85 reads counter and logs the result.

Copyright: Copyright (c) 2026 Brighton Sikarskie SPDX-License-Identifier: MIT

Since: 0.1.0

Definition in file dualcore_background.h.

Enumeration Type Documentation

◆ bg_addr_t

enum bg_addr_t : uintptr_t

Fixed SRAM address for the shared control block.

The shared block sits at 0x22100000, the start of the upper on-chip SRAM region just above the M85 secure SRAM allocation (which ends at 0x22000000 + 1 MiB = 0x22100000). The M33 image's 64 KiB bank sits far above it at the top of on-chip SRAM (0x22190000-0x221A0000), so no linker script claims this range.

See also: dualcore_bg()

Since: 0.1.0

Enumerator
k_bg_sram_base	Shared block = window base.

Definition at line 67 of file dualcore_background.h.

◆ bg_const_t

enum bg_const_t : uint32_t

Protocol constants shared by both core images.

k_bg_m33_signature is a distinctive bit pattern the M33 stamps on boot so the M85 can prove the second core left reset. The low byte (0x33) and the high word (0x3333) together make the value easy to spot in a memory-view debugger window.

Invariant: k_bg_target_count fits in a uint32_t; the M33 increments once per iteration so counter equals this at completion.

Since: 0.1.0

Enumerator
k_bg_m33_signature	Boot sentinel written by M33.
k_bg_target_count	Increment iterations M33 runs.

Definition at line 85 of file dualcore_background.h.

Function Documentation

◆ dualcore_bg()

volatile dualcore_bg_t * dualcore_bg ( void )

inlinestatic

Typed pointer to the fixed-address shared control block.

Returns the same physical SRAM address whether called from the M85 image or the M33 image. Inlined so no shared translation unit is required.

Returns: Pointer to the shared block at k_bg_sram_base.

Return values

non-NULL Always; the address is a compile-time constant.

Precondition: Both linker scripts leave the range at k_bg_sram_base unclaimed.; The M85 data cache is disabled so dsb-after-write is sufficient.

Postcondition: Returns a valid volatile pointer; no side effects.; Pointer arithmetic is identical on both cores.

Note: Safe to call from either core; the cast is the same on both images.

Since: 0.1.0

Definition at line 136 of file dualcore_background.h.

References k_bg_sram_base.

Referenced by cpu1_main(), and main().

Data Structures