ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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main.c File Reference

Canonical display PAL example – animated scrolling colour bars. More...

#include <stdint.h>
#include "ra8_board_ek_ra8d2.h"
#include "ra8_boot_entry.h"
#include "ra8_cgc.h"
#include "ra8_display_pal.h"
#include "ra8_display_pal_lcd.h"
#include "ra8_err.h"
#include "ra8_isr.h"
#include "ra8_mstp.h"
#include "ra8_panel.h"
#include "ra8_panel_timing.h"
#include "ra8_time.h"
Include dependency graph for main.c:

Go to the source code of this file.

Enumerations

enum  app_fb_dim_t : uint16_t {
  k_app_fb_w = 512U ,
  k_app_fb_h = 512U
}
 Framebuffer dimensions for this demo. More...
enum  app_bar_count_t : uint8_t { k_app_bar_count = 6U }
 Number of horizontal colour bars rendered per frame. More...
enum  app_color_t : uint16_t {
  k_app_color_red = 0xF800U ,
  k_app_color_yellow = 0xFFE0U ,
  k_app_color_green = 0x07E0U ,
  k_app_color_cyan = 0x07FFU ,
  k_app_color_blue = 0x001FU ,
  k_app_color_magenta = 0xF81FU
}
 RGB565 palette for the bar colours. More...
enum  app_pace_t : uint16_t {
  k_app_frame_period_ms = 60U ,
  k_app_powerup_ms = 500U
}
 Frame pacing in milliseconds. More...

Functions

static void app_panic_halt (void)
 Halt forever with the red board LED on.
static void app_bringup_clocks (void)
 Bring up clocks, MSTP, system tick and the two board LEDs.
static void app_bringup_display (void)
 Bring up the display through the PAL and cache caps + FB.
static void app_paint_bars (uint32_t scroll_offset)
 Paint one frame's worth of scrolling colour bars.
void main (void)
 The application entry point Reset_Handler hands control to.

Variables

static uint16_t s_framebuffer [(uint32_t) k_app_fb_w *(uint32_t) k_app_fb_h]
 RGB565 framebuffer in SRAM, 64-byte AXI-burst aligned.
static const display_cfg_t k_app_display_cfg
 Display PAL config – the one-line backend swap lives here.
static display_handle_ts_display = nullptr
 PAL handle returned by display_init.
static display_caps_t s_caps
 Mutable copy of the backend caps; populated at boot.
static display_fb_t s_fb
 Mutable copy of the FB descriptor; populated at boot.
static uint32_t s_scroll_offset = 0U
 Scroll offset advanced every frame.
static const uint16_t s_palette [k_app_bar_count]

Detailed Description

Canonical display PAL example – animated scrolling colour bars.

Tag
[Ring 6 / APP] {World: S}

Reference example for libs/ra8_display_pal. Paints six horizontal RGB565 colour bars that scroll vertically once per frame, demonstrating every public PAL entry point:

No call to ra8_glcdc_* or ra8_board_lcd_panel_power_on – everything goes through the PAL. Swap to the IT8951 e-ink backend by changing one line of k_app_display_cfg below (point iface at &k_display_backend_eink_it8951 from ra8_display_pal_eink.h); the rest of this file does not change. On the stub e-ink backend display_flush returns k_ra8_err_not_supported until silicon arrives.

The app branches on caps.continuous_refresh to decide whether to call display_flush every frame (e-ink) or only once per full repaint (LCD scans continuously, so flush is a cheap memory barrier).

Since
0.1.0

Definition in file main.c.

Enumeration Type Documentation

◆ app_bar_count_t

enum app_bar_count_t : uint8_t

Number of horizontal colour bars rendered per frame.

Enumerator
k_app_bar_count 

App bar count.

Definition at line 71 of file main.c.

◆ app_color_t

enum app_color_t : uint16_t

RGB565 palette for the bar colours.

Six high-saturation colours so the scrolling pattern is easy to verify on the panel: red, yellow, green, cyan, blue, magenta. Wraps every k_app_bar_count rows.

Enumerator
k_app_color_red 

App color red.

k_app_color_yellow 

App color yellow.

k_app_color_green 

App color green.

k_app_color_cyan 

App color cyan.

k_app_color_blue 

App color blue.

k_app_color_magenta 

App color magenta.

Definition at line 82 of file main.c.

◆ app_fb_dim_t

enum app_fb_dim_t : uint16_t

Framebuffer dimensions for this demo.

Same 512 x 512 size as lcd_draw_x: 0.5 MiB RGB565 fits in the on-chip SRAM, and the GLCDC BG plane fills the rest of the 1024 x 600 panel.

Enumerator
k_app_fb_w 

Framebuffer width (pixels).

k_app_fb_h 

Framebuffer height (pixels).

Definition at line 63 of file main.c.

◆ app_pace_t

enum app_pace_t : uint16_t

Frame pacing in milliseconds.

60 ms = ~16.7 fps. Slow enough to see the bars scroll; fast enough that the panel feels responsive.

Enumerator
k_app_frame_period_ms 

App frame period ms.

k_app_powerup_ms 

PLL / panel power-on settle.

Definition at line 97 of file main.c.

Function Documentation

◆ app_bringup_clocks()

void app_bringup_clocks ( void )
static

Bring up clocks, MSTP, system tick and the two board LEDs.

Mirrors the same boot order lcd_draw_x uses.

Precondition
Reset_Handler ran .data/.bss init.
IRQs are still globally disabled.
Postcondition
Clocks, MSTP, ra8_time and both board LEDs are initialised.
Global IRQs are enabled.
Note
Not thread-safe; single-shot helper.
Since
0.1.0

Definition at line 199 of file main.c.

References app_panic_halt(), k_ra8_board_led_blue, k_ra8_board_led_red, k_ra8_clock_id_cpuclk0, k_ra8_ok, ra8_board_led_init(), ra8_cgc_get_clock_hz(), ra8_cgc_init(), ra8_isr_globals_enable(), ra8_mstp_init(), and ra8_time_init().

◆ app_bringup_display()

void app_bringup_display ( void )
static

Bring up the display through the PAL and cache caps + FB.

Replaces every direct GLCDC/board call with the PAL's display_init + get_caps + get_framebuffer. On a successful return the panel is scanning out s_framebuffer and the app can paint freely.

Precondition
app_bringup_clocks has run.
s_framebuffer is alive (zero-init in .bss is fine).
Postcondition
s_display is non-NULL.
s_caps and s_fb mirror what the backend reported.
Note
Not thread-safe; single-shot helper.
Since
0.1.0

Definition at line 239 of file main.c.

References app_panic_halt(), display_get_caps(), display_get_framebuffer(), display_init(), k_app_display_cfg, k_ra8_ok, s_caps, s_display, and s_fb.

Referenced by main().

◆ app_paint_bars()

void app_paint_bars ( uint32_t scroll_offset)
static

Paint one frame's worth of scrolling colour bars.

Iterates pixel-by-pixel for clarity; a DMA-driven variant would obviously be faster. The bar a pixel belongs to is decided by (y + scroll_offset) / (height / bar_count) modulo the palette length.

Parameters
[in]scroll_offsetPixel offset added to each row's palette lookup (advanced once per frame).
Precondition
app_bringup_display has run.
s_fb.pixels is reachable.
Postcondition
Every pixel of the framebuffer has been overwritten.
DSB barrier issued via the PAL flush below.
Note
Not thread-safe.
Since
0.1.0

Definition at line 271 of file main.c.

References k_app_bar_count, s_fb, and s_palette.

Referenced by main().

◆ app_panic_halt()

void app_panic_halt ( void )
static

Halt forever with the red board LED on.

The blue LED heartbeat (see main) stops too, so a stuck red LED is the visual sign of a fatal init error.

Precondition
None.
None.
Postcondition
Function never returns; CPU is parked in WFI loop.
Red LED is on.
Note
IRQ-safe (no shared state mutated after entry).
Since
0.1.0

Definition at line 178 of file main.c.

References k_ra8_board_led_red, and ra8_board_led_on().

◆ main()

void main ( void )

The application entry point Reset_Handler hands control to.

Returns void, not int. This is a freestanding image: there is no hosted C environment, no process and nothing to report an exit status to. ISO C fixes main at int only for a hosted implementation; for a freestanding one (C23 5.1.2.1) the startup function's name and type are implementation-defined, and this is that definition. Reset_Handler discards no value because there is none to discard, and if main ever does return, startup halts the CPU rather than resuming anything.

The firmware lane is compiled -ffreestanding (see cmake/ra8_add_app.cmake) and the flag and this signature travel together: without it both GCC and clang reject a non-int main (-Wmain / -Wmain-return-type). Do not remove one without the other.

That coupling is why the declaration sits behind __STDC_HOSTED__ == 0, which -ffreestanding sets and a hosted build does not. The guard is not defensive dressing: this header is reachable from host builds (the unit tests compile ra8_core natively), and an unguarded void main(void); makes every hosted translation unit that includes it fail with conflicting types for 'main' against its own ISO int main. The declaration therefore exists exactly where its contract does.

Hosted first-party code – everything under tests/ and tools/ – uses the ISO int main(...) contract instead, because it genuinely does run under an OS that reads the exit status. scripts/checks/check_entry_points.py holds each domain to its own contract (#707).

Declared here, once, for the same reason SystemInit is: every vector_table.c used to restate it as a local extern int32_t main(void);, sixteen copies that no compiler ever compared against the definition – and roughly thirty of them had silently drifted out of agreement with the main they called.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has configured the clock tree and VTOR.
Postcondition
Control does not return; the image runs until reset or halt.
Any value the application wanted to report has been logged, not returned.
Note
Not thread-safe; single-threaded startup context only.
Warning
Only valid while the translation unit is compiled -ffreestanding. A hosted build rejects this signature.
See also
SystemInit()
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + BSP audio then plays blocks.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the playback loop forever.
On any HAL init failure the function halts in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + GPT triple, runs sweep.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the sweep loop forever.
On any HAL init failure the function halts in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up clocks + UART + RMII pins, then ThreadX.

Precondition
Reset_Handler has copied .data and zeroed .bss.
Postcondition
On clean entry the kernel runs the worker thread once.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up clocks + UART, then enters ThreadX.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the kernel runs the worker thread forever.
On any HAL init failure the function halts in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up LED, console, SDHI pins, then ThreadX.

Precondition
Reset_Handler has copied .data + zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
CPUCLK0 is raised to the PLL1 target before the kernel starts.
On clean entry the SD card thread runs forever.
On any HAL init failure the function halts in __WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + USB-FS + UAC1, then enters the iso-IN feed loop forever.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the iso-IN feed loop forever.
On any HAL init failure the function halts in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
SystemInit set VTOR / FPU / priority grouping.

The application entry point Reset_Handler hands control to.

See file header.

Precondition
Boot init has completed.
The secure-boot library's BLXNS into NS image either failed or was skipped (the call site in ra8_trustzone_init is a no-op on host builds).
Postcondition
Diagnostic counter latched, CPU parked in a halt loop.
Function never returns.
Note
Single-threaded entry.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
On success g_eoh_chapters / g_eoh_crc hold the parsed results, the banner is emitted, and g_eoh_heartbeat advances once per frame.
On any failure g_eoh_err is non-zero and the CPU parks (no heartbeat).
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The chapters/ch0-CRC banner is emitted; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
On success the g_etoc_* result globals hold the parsed TOC values, the banner is emitted, and g_etoc_heartbeat advances once per frame.
On any failure g_etoc_err is non-zero and the CPU parks (no heartbeat).
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss; SystemInit set VTOR/FPU.
Postcondition
The shelf scans on the panel; taps open books, browse, and read.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The slab/arena/tile/vmem banner is emitted; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
On success the cache globals are latched and g_pc_heartbeat advances.
On any failure g_pc_err is non-zero and the CPU parks (no heartbeat).
Since
0.1.0

The application entry point Reset_Handler hands control to.

Profiles power modes once a second.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the profile + blink loop.
On any HAL hard error LED2 latches ON.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
The shared board boot files installed the vector table.
Postcondition
The demo has run once and its verdict banner is streaming steadily.
The CPU idles re-emitting the banner (or halts after a fatal init error).
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up the clocks, console, SPI, and SD card, then runs the shared ra8_io VFS round-trip over the SD-over-SPI block device. On success it prints the exact PASS banner the HIL runner and ra8_emulator smoke gate scrape for; on any failure it prints FAIL and parks the core.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On a clean run the CPU loops forever after the PASS banner.
On any failure the function prints FAIL and halts in WFI.
Note
Not thread-safe; this is the single-threaded app entry.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Initialises logging and the console, brings up the OSPI NOR volume, runs the erase-before-write round-trip, and prints a single PASS/FAIL verdict line over SCI8 before parking in an infinite loop.

Precondition
SystemInit configured VTOR / FPU / priority grouping.
The OSPI NOR array is present (modelled in ra8_emulator, real on silicon).
Postcondition
Exactly one PASS or FAIL verdict line has been queued on SCI8.
Control parks in an infinite loop; the function never returns.
Note
Single-threaded; runs to the park loop on the main stack.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The page-count + render-hash banner is emitted; the CPU loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The cal=OK / cal=SKIP result and the finger-free touchcal: ready sentinel are emitted; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The open=OK touch banner is emitted; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Both USB controllers' clocks and pins come up before the kernel so the workers only deal with stack bring-up.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR, FPU, priority grouping.
Postcondition
On clean entry the CPU stays in tx_kernel_enter forever.
On any HAL init failure the function halts in WFI.
Note
Single entry point; not re-entrant.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging and the clock tree, releases the Cortex-M33 (which then blinks LED1 via ra8_pcntr_set_output()), and idles. See the file header.

Precondition
SystemInit has completed core bring-up.
The M33 is held in reset by hardware until released here.
Postcondition
The M33 has been released and is blinking LED1.
This function never returns to its caller.
Note
Single-threaded; no RTOS on the M85 in this template.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
The application links ra8_c6link and ESP-hosted generated codecs.
No hardware validation is inferred from this function.
Postcondition
No c6link operation is attempted.
No network or storage state is modified.
Note
Single-threaded compile fixture.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, the clock tree, and the VCOM console, runs the cacheable-SRAM round-trip with the D-cache that SystemInit() enabled through ra8_cache_dcache_enable(), emits the matching PASS / FAIL banner over the console and ra8_log, then parks in WFI. Every byte the self-test touches runs with the L1 caches + MPU enabled by the shared boot (RA8_BOOT_ENABLE_CACHE_MPU + RA8_BOOT_CACHE_VIA_HAL).

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit enabled the MPU + I-cache + D-cache via the ra8_cache HAL.
Postcondition
Exactly one banner (PASS or FAIL) has been emitted.
The core is parked in WFI.
Note
Single-threaded; no RTOS and no IRQ sources in this template.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Publishes the mailbox, releases the Cortex-M33 into the emitter, yields until it signals done, validates the blob the M33 built, then logs the PASS/FAIL verdict and the chapter count read back from the blob. See the file header for the offload narrative.

Precondition
SystemInit has completed core bring-up.
The M33 is held inactive by hardware until released here.
Postcondition
The M33 has built a RABOOK1 blob and the M85 has validated it.
This function never returns to its caller.
Note
Single-threaded; no RTOS on the M85 in this example.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
On success the CPU heartbeats after epaper: PASS.
On any HAL error the console prints epaper: FAIL and the red LED latches on.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The chapters/toc/cover banner is emitted; CPU loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The reader loop runs forever, redrawing on each tap.
A page-1 banner is emitted once after the first render.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The cover-size / framebuffer-CRC banner is emitted; CPU loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The panel shows the reader screen and the input loop runs forever.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Publishes the mailbox, arms the IPC0 wake and configures the LPM block, releases the Cortex-M33 into the reader, waits for the first held page, logs the page-0 verdict, then runs the #150 mode-switch cycle – parking in low-power WFI and waking on the M33's page-turn pokes – before logging the handoff verdict and parking for good. See the file header for the narrative.

Precondition
SystemInit has completed core bring-up.
The M33 is held inactive by hardware until released here.
Postcondition
The M33 has rendered + re-rendered the held page and the M85 is parked.
This function never returns to its caller.
Note
Single-threaded; no RTOS on the M85 in this example.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The boot banner is emitted; the reader loop services taps forever.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up the timebase then measures forever.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the measure + blink loop forever.
On any HAL init failure the function halts in WFI.
Note
Never returns.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Arms the RIIC1 target and polls the dispatcher.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
The CPU stays in the dispatch poll loop forever.
On any fatal init error the CPU parks in riic_target_panic_halt.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On a clean run the PASS banner is printed and the CPU loops in WFI.
On any failure the function prints a FAIL line and halts.
Note
Not thread-safe; single-threaded app entry.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the read + print loop forever.
On any HAL hard error LED2 latches ON and the loop exits.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up the LIN commander then drives frames.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the LIN-frame + blink loop forever.
On any HAL init failure the function halts in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, "renders" page 0 into the shared mailbox, releases the Cortex-M33 into its hold loop, and parks the M85 in low-power WFI sleep. See the file header for the power-saving narrative.

Precondition
SystemInit has completed core bring-up.
The M33 is held inactive by hardware until released here.
Postcondition
The M33 owns the held page and the M85 is parked.
This function never returns to its caller.
Note
Single-threaded; no RTOS on the M85 in this example.
Since
0.1.0

The application entry point Reset_Handler hands control to.

The USB clock, pins, console, and the SD card all come up before the kernel so the worker only deals with USB stack bring-up.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR, FPU, priority grouping.
Postcondition
On clean entry the CPU stays in tx_kernel_enter forever.
On any HAL init failure the function halts in WFI.
Note
Single entry point; not re-entrant.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit configured VTOR / FPU.
Postcondition
On clean bring-up the CPU stays in the poll loop.
On any HAL init failure the function halts in WFI.
Note
Single entry point; not re-entrant.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler initialized static storage.
SystemInit configured VTOR, FPU, and priority grouping.
Postcondition
The startup banner is printed once.
Control enters ThreadX and never returns normally.
Note
The #707 freestanding contract is declared by ra8_boot_entry.h.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On a clean run the PASS banner is printed and the CPU heartbeats forever.
On any failure LED2 latches ON and the CPU parks.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, the clock tree, and the VCOM console, runs the three-step self-test (MPU enabled, canonical boot map, Device MMIO), emits the matching PASS / FAIL banner over the console and ra8_log, then parks in WFI.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit installed the boot map via ra8_mpu_apply_boot_map().
Postcondition
Exactly one banner (PASS or a step-specific FAIL) has been emitted.
The core is parked in WFI.
Note
Single-threaded; no RTOS and no IRQ sources in this template.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler initialised the C runtime; SystemInit ran.
The EK-RA8D2 J-Link OB VCOM console is attached for the banner.
Postcondition
The commit + rollback attempts have executed against extra-MRAM.
The verdict banner is emitted once per report cycle.
Note
Single entry point; not re-entrant.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Initialises logging + console, brings up the MRAM volume, runs the wear-levelling + power-cycle-survival flow, and prints a single PASS/FAIL verdict.

Precondition
SystemInit configured VTOR / FPU / priority grouping.
The extra-MRAM region is present (modelled in ra8_emulator, real on silicon).
Postcondition
Exactly one PASS or FAIL verdict line has been queued on SCI8.
Control parks in an infinite loop; the function never returns.
Note
Single-threaded; runs to the park loop on the main stack.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Initialises logging + console, brings up the MRAM volume, runs the program/erase round-trip, and prints a single PASS/FAIL verdict.

Precondition
SystemInit configured VTOR / FPU / priority grouping.
The extra-MRAM region is present (modelled in ra8_emulator, real on silicon).
Postcondition
Exactly one PASS or FAIL verdict line has been queued on SCI8.
Control parks in an infinite loop; the function never returns.
Note
Single-threaded; runs to the park loop on the main stack.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up the clocks, console, and SDHI bus pins, runs the native SD card identification, fills the payload, then runs the full ra8_io VFS round-trip over the native-SDHI block device. On success it prints the exact PASS banner the HIL runner and ra8_emulator smoke gate scrape for; on any failure it prints FAIL and parks the core.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On a clean run the CPU loops forever after the PASS banner.
On any failure the function prints FAIL and halts in WFI.
Note
Not thread-safe; this is the single-threaded app entry.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up the console and both stdio sinks, retargets the engine's stdio to the in-RAM capture sink, runs the two-backend swap, replays the RAM capture out of the UART, and prints a single PASS/FAIL verdict per abstraction before parking in an infinite loop.

Precondition
SystemInit configured VTOR / FPU / priority grouping.
The OSPI NOR array is present (modelled in ra8_emulator, real on silicon).
Postcondition
A PASS or FAIL verdict line has been queued on SCI8 for each abstraction.
Control parks in an infinite loop; the function never returns.
Note
Single-threaded; runs to the park loop on the main stack.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up the clocks, console, and SDHI bus pins, runs the native SD card identification, fills the payload, then writes + reads + compares one raw 512-byte block straight against ra8_sdcard. On success it prints the exact PASS banner; on any failure it prints FAIL and parks the core.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On a clean run the CPU loops forever after the PASS banner.
On any failure the function prints FAIL and halts in WFI.
Note
Not thread-safe; this is the single-threaded app entry.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The whoami PASS banner is emitted; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up clocks + UART + RMII + RSIP, then ThreadX.

Precondition
Reset_Handler has copied .data and zeroed .bss.
Postcondition
On clean entry the kernel runs the worker thread once.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, the FPU and the priority grouping.
Postcondition
The banner was printed exactly once.
Control passed to ThreadX and never came back.
Note
Everything after tx_kernel_enter happens on ThreadX; the panic-halt below is reached only if the kernel refuses to start.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, the FPU and the priority grouping.
Postcondition
The banner and the resolved pin map were printed exactly once.
Control passed to ThreadX and never came back.
Note
Everything after tx_kernel_enter happens on ThreadX; the panic-halt below is reached only if the kernel refuses to start.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, the FPU and priority grouping.
Postcondition
The probe ran exactly once and printed its verdict.
The CPU stays in a slow heartbeat loop afterwards.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, the FPU and the priority grouping.
Postcondition
The banner was printed exactly once.
Control passed to ThreadX and never came back.
Note
Everything after tx_kernel_enter runs on ThreadX; the panic-halt below is reached only if the kernel refuses to start.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Initializes and arms ADC_B, formats each successful channel sample without variadic I/O, emits the verdict, toggles LED1, and delays.

Precondition
Reset startup and SystemInit completed successfully.
The selected ADC channel matches the board analog connection.
Postcondition
Every PASS verdict follows a successful channel read.
Any read or LED failure leads to the terminal panic helper.
Note
Does not return during normal operation.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
On success the PASS banner is emitted; otherwise a FAIL line is.
The CPU parks in WFI (observable on ra8_emulator until its budget).
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, releases the Cortex-M33 (which then blinks LED1), and idles. See the file header for the teaching narrative.

Precondition
SystemInit has completed core bring-up.
The M33 is held in reset by hardware until released here.
Postcondition
The M33 has been released and is blinking LED1.
This function never returns to its caller.
Note
Single-threaded; no RTOS on the M85 in this template.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The IDCODE/checks PASS banner is emitted; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

See the file header for the full behaviour summary.

Precondition
SystemInit has enabled the caches + MPU (this build defines RA8_BOOT_ENABLE_CACHE_MPU).
The M33 is held in reset by hardware until released here.
Postcondition
The M33 has been released and the round-trip loop is running.
This function never returns to its caller.
Note
Single-threaded; no RTOS on the M85 in this template.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, the clock tree, and the VCOM console, runs the three-step self-test (cacheable SRAM, RO MRAM const, Device MMIO), emits the matching PASS / FAIL banner over the console and ra8_log, then parks in WFI. Every byte the self-test touches runs with the L1 caches and MPU enabled by the shared boot (RA8_BOOT_ENABLE_CACHE_MPU).

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit enabled the MPU + I-cache + D-cache (cache+MPU build).
Postcondition
Exactly one banner (PASS or a step-specific FAIL) has been emitted.
The core is parked in WFI.
Note
Single-threaded; no RTOS and no IRQ sources in this template.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR, FPU and priority grouping.
Postcondition
The verdict banner is on SCI8 and the CPU parks.
The result globals hold the outcome for SWD probing.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Lights HOCO + PLL, then runs a 1 Hz blink.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the toggle loop forever.
On any HAL init failure the function halts in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

See file header for behaviour summary.

Precondition
Boot init has completed.
CPU1 is held in reset.
Postcondition
CPU1 released and the ping-pong loop running.
Function never returns.
Note
Single-threaded entry.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR, FPU, priority grouping.
Postcondition
Control passes to the active app, or to the ThreadX-hosted DFU device.
On any HAL init failure the function halts in WFI.
Note
Single entry point; not re-entrant.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss; SystemInit ran.
The embedded image's first two words are a valid MSP + Thumb reset vector.
Postcondition
On success, control is at the image's reset vector in the SRAM run window.
On a failed run-target check, control parks in internal_dcr_panic_halt.
Note
Single entry point; not re-entrant.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR, FPU, priority grouping.
Postcondition
On clean entry the CPU stays in tx_kernel_enter forever.
On any HAL init failure the function halts in WFI.
Note
Single entry point; not re-entrant.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit enabled the MPU + caches via RA8_BOOT_ENABLE_CACHE_MPU.
Postcondition
Exactly one PASS/FAIL banner is emitted, then the core parks.
The core ends in WFI so ra8_emulator's idle-stop terminates the run.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Initializes the demo, executes one comparison per period, increments the exported match or mismatch counter, and toggles the matching LED.

Precondition
Reset startup and SystemInit completed successfully.
DOC and the status LEDs are not owned by another context.
Postcondition
Every iteration increments exactly one HIL result counter.
LED1 represents matches and LED2 represents failures or mismatches.
Note
Does not return during normal operation.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up the clock tree, MSTP, ISR/ELC, and the VCOM console, programs a software-triggered DTC block copy, runs it with the L1 caches + MPU enabled by the shared boot (RA8_BOOT_ENABLE_CACHE_MPU), emits the matching PASS / FAIL banner over the console and ra8_log, then parks in WFI.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit enabled the MPU + caches via RA8_BOOT_ENABLE_CACHE_MPU.
Postcondition
Exactly one PASS/FAIL banner is emitted, then the core parks.
The core ends in WFI so ra8_emulator's idle-stop terminates the run.
Note
Single-threaded; the completion IRQ is left masked and the result polled.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, zeros the shared control block, releases the Cortex-M33, waits for its boot signature, then yields while the M33 counts autonomously to k_bg_target_count. After the M33 sets done, the M85 reads the counter and logs the PASS/FAIL verdict.

Precondition
SystemInit has completed core bring-up.
The M33 is held in reset by hardware until released here.
Postcondition
The M33 has autonomously incremented the counter and set done.
This function never returns to its caller.
Note
Single-threaded; no RTOS on the M85 in this example.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, releases the Cortex-M33, confirms it booted, runs k_m85_demo_rounds narrated mailbox rounds, then drops into the idle heartbeat. See the file header for the teaching narrative.

Precondition
SystemInit has completed core bring-up.
The M33 is held in reset by hardware until released here.
Postcondition
The M33 has been released and the mailbox exchange is running.
This function never returns to its caller.
Note
Single-threaded; no RTOS on the M85 in this example.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Fires ELC software events once a second.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the trigger + blink loop.
On any HAL hard error LED2 latches ON.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The geometry-hash banner is emitted; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The framebuffer hash banner is emitted; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The bmp/gif framebuffer-CRC banner is emitted; CPU loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The hit-test / nav result banner is emitted; the CPU loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The nav-result banner is emitted; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The per-chapter page-count + render-hash banner is emitted; loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The svg-size / framebuffer-CRC banner is emitted; CPU loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On a clean run the CPU loops forever after the ALL PASS banner.
On any failure the function halts in WFI after a FAIL diagnostic.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The layer1=ok ... PASS banner is emitted on a programmed GLCDC, or FAIL glcdc on a bring-up failure; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Initializes the demo, tracks falling SW1 edges as counter deltas, and independently increments the exported liveness counter whenever successive GPT samples advance.

Precondition
Reset startup and SystemInit completed successfully.
The board wiring matches the EK-RA8D2 LED1 and SW1 definitions.
Postcondition
During operation, each detected edge toggles LED1.
A terminal control-flow escape parks the core in the panic helper.
Note
Does not return during normal operation.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Initializes the demo and GPT0, runs one bounded DMA request per iteration, updates the exported match/mismatch counter, and delays.

Precondition
Reset startup and SystemInit completed successfully.
GPT0 and the DMA allocator are not owned by another context.
Postcondition
Every iteration increments exactly one HIL result counter.
Allocated DMA channels are released by internal_run_one.
Note
Does not return during normal operation.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Initializes and arms GPT0 once, then starts, polls, records the exported pass/failure counters, toggles LED1 on completion, and delays before the next one-shot.

Precondition
Reset startup and SystemInit completed successfully.
GPT0 and LED1 are not owned by another execution context.
Postcondition
Each completed one-shot increments g_gpt_one_shot_match.
Each start or bounded-poll failure increments the mismatch counter.
Note
Does not return during normal operation.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up both controllers then scans each.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the scan + blink loop forever.
On any HAL hard error the CPU parks.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + IIC_B + console then probes.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the scan + blink loop forever.
On any HAL hard error LED2 latches ON and the loop exits.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The iic_b facade: up banner is emitted every period in the loop.
On any bring-up failure the CPU BKPT-halts before the loop.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Emits the boot banner, initializes the option-controlled IWDT, samples its counter, and on legal samples queues a refresh, clears status, toggles LED1, and emits the refresh banner.

Precondition
Reset startup and SystemInit completed successfully.
OFS0 contains the window policy represented by the demo constants.
Postcondition
Each reported refresh was requested only within the inclusive window.
Any HAL or output error leads to the terminal panic helper.
Note
Does not return during normal operation.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The query/commit banner is emitted; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Performs one Deep-Sleep cycle, emits the wake banner, then parks in a normal blink loop.

MC/DC:
Compound decision: enter_sleep != ok || any_sci_write != ok. Two atomic conditions x N+1 = 3 vectors – both-ok happy path, enter_sleep fails (covered by host test), sci_write fails (covered by host test).
Precondition
Reset_Handler / SystemInit completed normally.
LPM init has not yet been attempted.
Postcondition
On clean entry the chip emitted both banners and is parked in a normal blink loop, ready for the next bench flash.
On any HAL hard error LED1 latches OFF and the chip halts.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU and priority grouping.
Postcondition
The verdict banner is printed and remains the terminal UART line.
g_pdm_mic_result carries the validated capture result.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Initializes channel zero, formats and enqueues each counter line, toggles LED1, and delays before incrementing the next sample.

Precondition
Reset startup and SystemInit completed successfully.
J-Link may update only the consumer offset in the shared descriptor.
Postcondition
Each successful iteration advances the counter and toggles LED1.
Any producer or LED error leads to the terminal panic helper.
Note
Does not return during normal operation.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Bench-tests SDRAM and prints MB/s.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the bench + blink loop.
On read-back mismatch LED2 latches ON.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up SPI_B + loops a self-test pattern.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the loopback + blink loop.
On any HAL hard error LED2 latches ON.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Configures GPIO, then launches ThreadX.

Precondition
Reset_Handler has copied .data + zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
The two LED threads are running and SysTick is generating 1 ms ticks for the scheduler.
On any HAL init failure the function halts in __WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler completed .data/.bss init.
SystemInit set VTOR + FPU.
Postcondition
Two CANFD demo threads are running.

The application entry point Reset_Handler hands control to.

Brings up clocks + UART, then enters ThreadX.

Precondition
Reset_Handler has copied .data and zeroed .bss.
Postcondition
On clean entry the kernel runs the worker thread once.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + SCI8 then drops into the ThreadX scheduler.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On success the producer/consumer pair runs forever.
On any HAL bring-up failure the function halts in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler completed .data/.bss init.
Postcondition
MPU is enabled with the s_mpu_cfg partition table.
Worker thread is running and blinking LED1.

The application entry point Reset_Handler hands control to.

Brings up clocks + UART + RMII pins, then enters ThreadX.

Precondition
Reset_Handler has copied .data and zeroed .bss.
Postcondition
On clean entry the kernel runs the worker thread once.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Raises CPUCLK0, configures LED1, launches ThreadX.

Precondition
Reset_Handler has copied .data + zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
CPUCLK0 is at the PLL1 target before the kernel starts.
On any HAL init failure the function halts in __WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU loops forever after printing the result.
On any HAL init failure the function halts in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + SCI8 + LED1 then prints.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the print + blink loop forever.
On any HAL init failure the function halts in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up SCI8 + ISRs, prints, then echoes via IRQ.

Precondition
Reset_Handler has copied .data and zeroed .bss; SystemInit set VTOR/FPU.
Postcondition
On clean entry the CPU idles while the SCI ISRs echo received bytes.
On any HAL init failure the function halts in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Initializes and arms ULPT0, then polls its underflow bit. Each event emits the fixed wake banner, stops the channel to clear status, and starts the next interval with the same reload.

Precondition
Reset startup and SystemInit completed successfully.
The EK-RA8D2 console wiring matches the board definition.
Postcondition
Every reported wake corresponds to an observed underflow status bit.
Any HAL or output error leads to the terminal panic helper.
Note
Does not return during normal operation.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Both USB controllers' clocks and pins come up before the kernel so the two workers only deal with stack bring-up.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in tx_kernel_enter forever.
On any HAL init failure the function halts in WFI.
Note
Single entry point; not re-entrant.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The apps/CRC/flush banner is emitted; CPU loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The PASS banner is emitted and the panel shows the Library app; the loop polls SW1/SW2 to switch apps live, otherwise idling.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The PASS banner is emitted and the panel shows the composed chrome; the loop partial-flushes only the status band so the panel updates its clock live (the damage-tracked path), otherwise idling.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The PASS banner is emitted and the panel shows the composed tree; the loop partial-flushes only the status band so the panel updates its top band live (the damage-tracked path), otherwise idling.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The PASS banner is emitted and the panel shows the composed widget kit; the loop alternately taps a button and partial-flushes the body band so the panel updates a button live (the damage-tracked path).
Since
0.1.0

Definition at line 285 of file main.c.

References app_bringup_clocks(), app_bringup_display(), app_paint_bars(), display_clear(), display_flush(), display_full_rect(), k_app_frame_period_ms, k_app_powerup_ms, k_display_refresh_fast, k_display_refresh_init, k_display_refresh_quality, k_ra8_board_led_blue, ra8_board_led_toggle(), ra8_delay_ms(), s_caps, s_display, s_fb, and s_scroll_offset.

Variable Documentation

◆ k_app_display_cfg

const display_cfg_t k_app_display_cfg
static
Initial value:
= {
.framebuffer = s_framebuffer,
.framebuffer_bytes = sizeof(s_framebuffer),
.width_px = (uint16_t)k_app_fb_w,
.height_px = (uint16_t)k_app_fb_h,
.panel_timing = &s_ra8_panel_ek_ra8d2_timing,
}
static uint16_t s_framebuffer[(size_t) k_panel_height_px *(size_t) k_panel_width_px]
1024x600 RGB565 framebuffer in external SDRAM (GLCDC scans this).
Definition main.c:67
@ k_app_fb_h
Framebuffer height (pixels).
Definition main.c:65
@ k_app_fb_w
Framebuffer width (pixels).
Definition main.c:64
@ k_display_pixfmt_rgb565
16 bpp, 5/6/5 packed.
const display_backend_iface_t k_display_backend_lcd_ra8_glcdc
LCD backend vtable – pass its address through display_cfg_t.iface to drive the EK-RA8D2 panel.
static const ra8_glcdc_timing_t s_ra8_panel_ek_ra8d2_timing
EK-RA8D2 ER-TFT070-6 RGB timing for ra8_glcdc_init / the LCD backend.

Display PAL config – the one-line backend swap lives here.

To target the IT8951-compatible e-ink panel, change iface to &k_display_backend_eink_it8951 (from ra8_display_pal_eink.h). Everything else in this file – the paint loop, the heartbeat, the flush-on-frame – is identical regardless of backend.

Definition at line 129 of file main.c.

Referenced by app_bringup_display().

◆ s_caps

display_caps_t s_caps
static

Mutable copy of the backend caps; populated at boot.

Definition at line 143 of file main.c.

◆ s_display

display_handle_t* s_display = nullptr
static

PAL handle returned by display_init.

Definition at line 140 of file main.c.

◆ s_fb

display_fb_t s_fb
static

Mutable copy of the FB descriptor; populated at boot.

Definition at line 146 of file main.c.

◆ s_framebuffer

uint16_t s_framebuffer[(uint32_t) k_app_fb_w *(uint32_t) k_app_fb_h]
static

RGB565 framebuffer in SRAM, 64-byte AXI-burst aligned.

The PAL hands this pointer to the GLCDC HAL via display_init. Apps that target e-ink reuse this same RGB565 buffer – the backend converts to greyscale on flush.

Definition at line 116 of file main.c.

◆ s_palette

const uint16_t s_palette[k_app_bar_count]
static
Initial value:
= {
(uint16_t)k_app_color_red,
(uint16_t)k_app_color_yellow,
(uint16_t)k_app_color_green,
(uint16_t)k_app_color_cyan,
(uint16_t)k_app_color_blue,
}
@ k_app_color_red
App color red.
Definition main.c:83
@ k_app_color_cyan
App color cyan.
Definition main.c:86
@ k_app_color_yellow
App color yellow.
Definition main.c:84
@ k_app_color_blue
App color blue.
Definition main.c:87
@ k_app_color_green
App color green.
Definition main.c:85
@ k_app_color_magenta
App color magenta.
Definition main.c:88

Definition at line 155 of file main.c.

Referenced by app_paint_bars().

◆ s_scroll_offset

uint32_t s_scroll_offset = 0U
static

Scroll offset advanced every frame.

Definition at line 149 of file main.c.

Referenced by main().