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ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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GPT period-streaming DMA HIL demo for EK-RA8D2. More...
#include <stdint.h>#include "ra8_attributes.h"#include "ra8_board_ek_ra8d2.h"#include "ra8_boot_entry.h"#include "ra8_cgc.h"#include "ra8_dma.h"#include "ra8_err.h"#include "ra8_gpt.h"#include "ra8_isr.h"#include "ra8_time.h"Go to the source code of this file.
Enumerations | |
| enum | gpt_dma_demo_const_t : uint32_t { k_gpt_dma_demo_initial_period = 0x0000FFFFU , k_gpt_dma_demo_period_count = 4U , k_gpt_dma_demo_rearm_delay_ms = 10U } |
| Demo tunables. More... | |
| enum | gpt_dma_demo_chan_t : uint8_t { k_gpt_dma_demo_channel = 0U } |
| GPT channel. More... | |
Functions | |
| static void | internal_panic_halt (void) |
| Park the core after an unrecoverable GPT DMA demo failure. | |
| static void | internal_setup_or_halt (void) |
| Initialize clocks, SysTick, LED1, and the DMA allocator. | |
| static void | internal_on_complete (void *ctx) |
| DMA completion callback – raise the s_dma_done flag. | |
| static ra8_err_t | internal_arm_channel (void) |
| Init GPT0 as a saw-wave PWM with a stable initial period. | |
| static bool | internal_run_one (void) |
| Arm one DMA write of s_period_table into GPT0.GTPR. | |
| void | main (void) |
| Repeatedly stream the fixed period table into GPT0 through DMA. | |
Variables | |
| static const uint32_t | s_period_table [k_gpt_dma_demo_period_count] |
| Four 32-bit period values DMA streams into GPT0.GTPR. | |
| volatile uint32_t | g_gpt_dma_match = 0U |
| HIL liveness counter – bumped after each DMA-complete callback fires. | |
| volatile uint32_t | g_gpt_dma_mismatch = 0U |
| HIL failure counter – bumped when ra8_gpt_write_dma returned non-ok or the completion callback never fired inside the bounded wait. | |
| static volatile uint8_t | s_dma_done |
| Set to 1 inside the DMA completion callback. | |
GPT period-streaming DMA HIL demo for EK-RA8D2.
Exercises ra8_gpt_write_dma – the "sample streaming" DMA TX path that copies a buffer of 32-bit period values into the GPT's GTPR register via a DMAC channel. The CPU does not touch GTPR each tick; DMA pumps the preloaded period sequence.
The completion callback bumps g_gpt_dma_match once per DMA transfer. The main loop re-arms after each callback so the bench can scrape the counter advancing.
Bring-up sequence:
Definition in file main.c.
| enum gpt_dma_demo_chan_t : uint8_t |
| enum gpt_dma_demo_const_t : uint32_t |
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Init GPT0 as a saw-wave PWM with a stable initial period.
Programs channel zero for PCLKD/4 saw-wave PWM and starts it so the DMA stream has a live GTPR destination.
| k_ra8_ok | GPT0 accepted and started the configuration. |
| (other) | The HAL rejected or could not apply the configuration. |
Definition at line 187 of file main.c.
References k_gpt_dma_demo_channel, k_gpt_dma_demo_initial_period, k_ra8_gpt_mode_saw_pwm, k_ra8_gpt_ps_div_4, ra8_gpt_init(), and RA8_INTERNAL.
Referenced by main().
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DMA completion callback – raise the s_dma_done flag.
Publishes the volatile completion flag before issuing the optional visual LED toggle, keeping interrupt-context work bounded.
| [in] | ctx | Unused. |
Definition at line 164 of file main.c.
References k_ra8_board_led1, ra8_board_led_toggle(), RA8_INTERNAL, and s_dma_done.
Referenced by internal_run_one().
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Park the core after an unrecoverable GPT DMA demo failure.
Repeatedly executes WFI, preserving DMA and timer state for debug.
Definition at line 112 of file main.c.
References RA8_INTERNAL.
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Arm one DMA write of s_period_table into GPT0.GTPR.
Resets the completion flag, allocates and starts one bounded period transfer, waits briefly for the optional callback, then explicitly releases the channel because this app does not wire its DMA IRQ.
| true | The DMA request was accepted and its channel was released. |
| false | The DMA request failed before a channel could be used. |
< Wait iters.
Definition at line 218 of file main.c.
References internal_on_complete(), k_gpt_dma_demo_channel, k_gpt_dma_demo_period_count, k_ra8_ok, ra8_delay_ms(), ra8_dma_release(), ra8_gpt_write_dma(), RA8_INTERNAL, s_dma_done, and s_period_table.
Referenced by main().
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Initialize clocks, SysTick, LED1, and the DMA allocator.
Brings dependencies up in order and parks on the first HAL error.
Definition at line 129 of file main.c.
References internal_panic_halt(), k_ra8_board_led1, k_ra8_clock_id_cpuclk0, k_ra8_ok, ra8_board_led_init(), ra8_cgc_get_clock_hz(), ra8_cgc_init(), ra8_dma_init(), RA8_INTERNAL, and ra8_time_init().
| void main | ( | void | ) |
Repeatedly stream the fixed period table into GPT0 through DMA.
The application entry point Reset_Handler hands control to.
Initializes the demo and GPT0, runs one bounded DMA request per iteration, updates the exported match/mismatch counter, and delays.
Definition at line 264 of file main.c.
References g_gpt_dma_match, g_gpt_dma_mismatch, internal_arm_channel(), internal_panic_halt(), internal_run_one(), internal_setup_or_halt(), k_gpt_dma_demo_rearm_delay_ms, k_ra8_ok, ra8_delay_ms(), and ra8_isr_globals_enable().
| volatile uint32_t g_gpt_dma_match = 0U |
| volatile uint32_t g_gpt_dma_mismatch = 0U |
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Set to 1 inside the DMA completion callback.
Volatile so the main thread's spin-wait sees the update from the DMA-completion interrupt context.
Definition at line 100 of file main.c.
Referenced by internal_on_complete(), and internal_run_one().
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Four 32-bit period values DMA streams into GPT0.GTPR.
Must outlive the transfer; in .rodata so the chip's DMAC sees a stable physical address.
Definition at line 62 of file main.c.
Referenced by internal_run_one().