ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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main.c File Reference

Load a TTF/OTF font off an SD card and render text with reflow. More...

#include <stdint.h>
#include <string.h>
#include "literata_latin1.h"
#include "ra8_board_ek_ra8d2.h"
#include "ra8_boot_entry.h"
#include "ra8_cgc.h"
#include "ra8_display_pal.h"
#include "ra8_display_pal_lcd.h"
#include "ra8_err.h"
#include "ra8_gfx.h"
#include "ra8_isr.h"
#include "ra8_mstp.h"
#include "ra8_panel.h"
#include "ra8_panel_timing.h"
#include "ra8_sdfont.h"
#include "ra8_sdramc.h"
#include "ra8_time.h"
#include "reflow.h"
Include dependency graph for main.c:

Go to the source code of this file.

Enumerations

enum  sfr_fb_dim_t : uint16_t {
  k_sfr_fb_w = k_panel_width_px ,
  k_sfr_fb_h = k_panel_height_px
}
 Framebuffer dimensions, sourced from the BSP panel descriptor. More...
enum  sfr_fb_misc_t : uint16_t {
  k_sfr_settle_ms = 500U ,
  k_sfr_frame_ms = 100U
}
 Framebuffer + pacing byte-math constants. More...
enum  sfr_reflow_cfg_t : uint32_t {
  k_sfr_font_cap = 512U * 1024U ,
  k_sfr_font_px = 18U ,
  k_sfr_spi_chan = 0U ,
  k_sfr_spi_idle = 0xFFU ,
  k_sfr_paper_argb = 0xFFFFFFFFU ,
  k_sfr_ink_argb = 0xFF101010U ,
  k_sfr_link_argb = 0xFF2A52BEU ,
  k_sfr_paper_rgb565 = 0xFFFFU
}
 Reflow + font-load tunables. More...
enum  sfr_diag_fill_t : uint32_t {
  k_sfr_diag_argb_opaque = 0xFF000000U ,
  k_sfr_diag_lvl_base = 0x10U ,
  k_sfr_diag_lvl_step = 0x20U ,
  k_sfr_diag_lvl_mask = 0x0FU ,
  k_sfr_diag_shift_r = 16U ,
  k_sfr_diag_shift_g = 8U
}
 Constants for the stage-coded gray panic fill (diagnostic only). More...
enum  sfr_stage_t : uint32_t {
  k_sfr_stage_boot = 0U ,
  k_sfr_stage_panel_ok = 1U ,
  k_sfr_stage_card_ok = 2U ,
  k_sfr_stage_mount_ok = 3U ,
  k_sfr_stage_font_ok = 4U ,
  k_sfr_stage_layout_ok = 5U ,
  k_sfr_stage_render_ok = 6U ,
  k_sfr_stage_card_fail = 0x80U ,
  k_sfr_stage_mount_fail = 0x81U ,
  k_sfr_stage_font_fail = 0x82U ,
  k_sfr_stage_reflow_fail = 0x83U
}
 Diagnostic stage codes stamped to g_sfr_stage (J-Link / emulator). More...

Functions

 RA8_BOARD_PANEL_FRAMEBUFFER (s_framebuffer)
 RGB565 framebuffer in external SDRAM, AXI-burst aligned.
static void sfr_panic_halt (uint32_t stage)
 Halt forever with the red board LED on (fatal init error marker).
static void sfr_bringup_clocks (void)
 Clocks, MSTP, SysTick, LEDs, then enable IRQs.
static void sfr_bringup_panel (void)
 External SDRAM + GLCDC panel + ra8_gfx binding.
static void sfr_load_font_or_halt (void)
 Load FONT.OTF off the Pmod2 card (self-provisioning) into s_font_buf.
static void sfr_render_or_halt (void)
 Reflow the body XHTML with the SD font into the framebuffer.
void main (void)
 The application entry point Reset_Handler hands control to.

Variables

static const ra8_port_pin_t k_sfr_pin_sck = (ra8_port_pin_t)k_ra8_board_pmod2_spi_sck
 Pmod2 SPI pins (J25) – SCI0 Simple-SPI per HUM Table 20.13.
static const ra8_port_pin_t k_sfr_pin_cipo = (ra8_port_pin_t)k_ra8_board_pmod2_spi_cipo
static const ra8_port_pin_t k_sfr_pin_copi = (ra8_port_pin_t)k_ra8_board_pmod2_spi_copi
static const ra8_port_pin_t k_sfr_pin_cs = (ra8_port_pin_t)k_ra8_board_pmod2_spi_cs
static const char k_sfr_body []
 XHTML body the app reflows with the SD-loaded font.
static uint8_t s_font_buf [k_sfr_font_cap]
 Font blob read off the card – lives in SDRAM (hundreds of KiB).
static reflow_t s_engine
 Reflow engine (page / glyph / token pools live inside).
static const display_cfg_t k_sfr_display_cfg
 Display PAL config – LCD/GLCDC backend over the SDRAM buffer.
static display_handle_ts_display = nullptr
 PAL handle returned by display_init.
static display_fb_t s_fb
 Mutable copy of the FB descriptor; populated at boot.
static uint32_t s_pclka_hz = 0U
 Cached PCLKA rate (Hz) for the SPI clock shim.
volatile uint32_t g_sfr_stage = k_sfr_stage_boot
 Last stage reached (sfr_stage_t); read externally over SWD.
volatile uint32_t g_sfr_font_len = 0U
 Bytes of font read off the card.
volatile uint32_t g_sfr_pages = 0U
 Pages produced by reflow_layout_chapter.
volatile uint32_t g_sfr_ink = 0U
 Inked (non-paper) pixel count after render – liveness proof.
volatile uint32_t g_sfr_source = 0U
 Font provenance (ra8_sdfont_source_t): 0 = on-card, 1 = provisioned.
volatile uint32_t g_sfr_err = 0U
 Last ra8_err_t from ra8_sdfont_load (0 = k_ra8_ok), for SWD triage.
volatile uint32_t g_sfr_heartbeat = 0U
 Idle-loop heartbeat; advances only after a clean render (HIL gate).

Detailed Description

Load a TTF/OTF font off an SD card and render text with reflow.

Tag
[Ring 6 / APP] {World: S}

Proves the e-reader font-storage path end to end on real firmware: a font file lives on an SD card (FAT volume), the genuine ra8_sdmmc_spi driver reads it over SPI, ra8_fs serves it as a file, and reflow rasterises a paragraph of XHTML into the GLCDC framebuffer through ra8_gfx. The same pipeline is covered on host by apps/shared_libs/reflow/tests/src/test_ra8_sdmmc_card_reflow.c; this app promotes it to a ra8_emulator-runnable binary:

tools/mkfontimg/build/mkfontimg libs/ra8_fonts/Literata-Regular.ttf /tmp/font.img
just apps::build sd_font_render
tools/ra8_emulator/build/ra8_emulator \
examples/ek_ra8d2/hw_validated/hil/sd_font_render/build/sd_font_render.elf \
--sd /tmp/font.img --ppm /tmp/out.ppm

Flow:

  1. CGC + MSTP + SysTick + LEDs.
  2. External SDRAM + GLCDC panel (framebuffer at 0x68000000), ra8_gfx bound.
  3. ra8_sdfont_load brings up the Pmod2 SD card (J25 / SCI0 Simple-SPI), mounts the FAT volume, and reads FONT.OTF into an SDRAM buffer – self-provisioning the file from a baked Latin-1 font when the card is blank.
  4. reflow_init / layout_chapter / render_page -> framebuffer.
  5. Idle; GLCDC scans out the rendered page (ra8_emulator snapshots it).

Because the font self-provisions, any FAT-formatted microSD works – the card need not be pre-loaded with FONT.OTF. On the physical board this needs a Digilent PMOD MicroSD in J25; in ra8_emulator the --sd image stands in.

Since
0.1.0

Definition in file main.c.

Enumeration Type Documentation

◆ sfr_diag_fill_t

enum sfr_diag_fill_t : uint32_t

Constants for the stage-coded gray panic fill (diagnostic only).

Enumerator
k_sfr_diag_argb_opaque 

Opaque-alpha bits of an ARGB fill.

k_sfr_diag_lvl_base 

Darkest panic gray level.

k_sfr_diag_lvl_step 

Gray step per stage code.

k_sfr_diag_lvl_mask 

Low-nibble stage selector.

k_sfr_diag_shift_r 

Red byte position in ARGB.

k_sfr_diag_shift_g 

Green byte position in ARGB.

Definition at line 92 of file main.c.

◆ sfr_fb_dim_t

enum sfr_fb_dim_t : uint16_t

Framebuffer dimensions, sourced from the BSP panel descriptor.

Enumerator
k_sfr_fb_w 

Framebuffer width (pixels).

k_sfr_fb_h 

Framebuffer height (pixels).

Definition at line 68 of file main.c.

◆ sfr_fb_misc_t

enum sfr_fb_misc_t : uint16_t

Framebuffer + pacing byte-math constants.

Enumerator
k_sfr_settle_ms 

PLL / SDRAM / panel-POR settle.

k_sfr_frame_ms 

Idle heartbeat pacing (ms).

Definition at line 74 of file main.c.

◆ sfr_reflow_cfg_t

enum sfr_reflow_cfg_t : uint32_t

Reflow + font-load tunables.

Enumerator
k_sfr_font_cap 

Max font we will read off the card.

k_sfr_font_px 

Body font size in pixels.

k_sfr_spi_chan 

Pmod2 / J25 = SCI0 Simple-SPI.

k_sfr_spi_idle 

Idle byte clocked on read-only xfer.

k_sfr_paper_argb 

Page background the FB is cleared to.

k_sfr_ink_argb 

Body text colour (near-black ink).

k_sfr_link_argb 

Anchor text colour (cerulean).

k_sfr_paper_rgb565 

White paper in RGB565 (all bits set).

Definition at line 80 of file main.c.

◆ sfr_stage_t

enum sfr_stage_t : uint32_t

Diagnostic stage codes stamped to g_sfr_stage (J-Link / emulator).

Enumerator
k_sfr_stage_boot 

Pre-init.

k_sfr_stage_panel_ok 

SDRAM + GLCDC + ra8_gfx up.

k_sfr_stage_card_ok 

ra8_sdmmc_spi init succeeded.

k_sfr_stage_mount_ok 

ra8_fs mounted the FAT volume.

k_sfr_stage_font_ok 

Font read off the card.

k_sfr_stage_layout_ok 

reflow laid out the chapter.

k_sfr_stage_render_ok 

Page rasterised to the FB.

k_sfr_stage_card_fail 

SD bring-up failed.

k_sfr_stage_mount_fail 

FAT mount failed.

k_sfr_stage_font_fail 

Font open/read failed.

k_sfr_stage_reflow_fail 

Layout/render failed.

Definition at line 102 of file main.c.

Function Documentation

◆ main()

void main ( void )

The application entry point Reset_Handler hands control to.

Returns void, not int. This is a freestanding image: there is no hosted C environment, no process and nothing to report an exit status to. ISO C fixes main at int only for a hosted implementation; for a freestanding one (C23 5.1.2.1) the startup function's name and type are implementation-defined, and this is that definition. Reset_Handler discards no value because there is none to discard, and if main ever does return, startup halts the CPU rather than resuming anything.

The firmware lane is compiled -ffreestanding (see cmake/ra8_add_app.cmake) and the flag and this signature travel together: without it both GCC and clang reject a non-int main (-Wmain / -Wmain-return-type). Do not remove one without the other.

That coupling is why the declaration sits behind __STDC_HOSTED__ == 0, which -ffreestanding sets and a hosted build does not. The guard is not defensive dressing: this header is reachable from host builds (the unit tests compile ra8_core natively), and an unguarded void main(void); makes every hosted translation unit that includes it fail with conflicting types for 'main' against its own ISO int main. The declaration therefore exists exactly where its contract does.

Hosted first-party code – everything under tests/ and tools/ – uses the ISO int main(...) contract instead, because it genuinely does run under an OS that reads the exit status. scripts/checks/check_entry_points.py holds each domain to its own contract (#707).

Declared here, once, for the same reason SystemInit is: every vector_table.c used to restate it as a local extern int32_t main(void);, sixteen copies that no compiler ever compared against the definition – and roughly thirty of them had silently drifted out of agreement with the main they called.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has configured the clock tree and VTOR.
Postcondition
Control does not return; the image runs until reset or halt.
Any value the application wanted to report has been logged, not returned.
Note
Not thread-safe; single-threaded startup context only.
Warning
Only valid while the translation unit is compiled -ffreestanding. A hosted build rejects this signature.
See also
SystemInit()
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + BSP audio then plays blocks.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the playback loop forever.
On any HAL init failure the function halts in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + GPT triple, runs sweep.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the sweep loop forever.
On any HAL init failure the function halts in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up clocks + UART + RMII pins, then ThreadX.

Precondition
Reset_Handler has copied .data and zeroed .bss.
Postcondition
On clean entry the kernel runs the worker thread once.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up clocks + UART, then enters ThreadX.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the kernel runs the worker thread forever.
On any HAL init failure the function halts in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up LED, console, SDHI pins, then ThreadX.

Precondition
Reset_Handler has copied .data + zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
CPUCLK0 is raised to the PLL1 target before the kernel starts.
On clean entry the SD card thread runs forever.
On any HAL init failure the function halts in __WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + USB-FS + UAC1, then enters the iso-IN feed loop forever.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the iso-IN feed loop forever.
On any HAL init failure the function halts in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
SystemInit set VTOR / FPU / priority grouping.

The application entry point Reset_Handler hands control to.

See file header.

Precondition
Boot init has completed.
The secure-boot library's BLXNS into NS image either failed or was skipped (the call site in ra8_trustzone_init is a no-op on host builds).
Postcondition
Diagnostic counter latched, CPU parked in a halt loop.
Function never returns.
Note
Single-threaded entry.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
On success g_eoh_chapters / g_eoh_crc hold the parsed results, the banner is emitted, and g_eoh_heartbeat advances once per frame.
On any failure g_eoh_err is non-zero and the CPU parks (no heartbeat).
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The chapters/ch0-CRC banner is emitted; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
On success the g_etoc_* result globals hold the parsed TOC values, the banner is emitted, and g_etoc_heartbeat advances once per frame.
On any failure g_etoc_err is non-zero and the CPU parks (no heartbeat).
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss; SystemInit set VTOR/FPU.
Postcondition
The shelf scans on the panel; taps open books, browse, and read.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The slab/arena/tile/vmem banner is emitted; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
On success the cache globals are latched and g_pc_heartbeat advances.
On any failure g_pc_err is non-zero and the CPU parks (no heartbeat).
Since
0.1.0

The application entry point Reset_Handler hands control to.

Profiles power modes once a second.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the profile + blink loop.
On any HAL hard error LED2 latches ON.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
The shared board boot files installed the vector table.
Postcondition
The demo has run once and its verdict banner is streaming steadily.
The CPU idles re-emitting the banner (or halts after a fatal init error).
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up the clocks, console, SPI, and SD card, then runs the shared ra8_io VFS round-trip over the SD-over-SPI block device. On success it prints the exact PASS banner the HIL runner and ra8_emulator smoke gate scrape for; on any failure it prints FAIL and parks the core.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On a clean run the CPU loops forever after the PASS banner.
On any failure the function prints FAIL and halts in WFI.
Note
Not thread-safe; this is the single-threaded app entry.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Initialises logging and the console, brings up the OSPI NOR volume, runs the erase-before-write round-trip, and prints a single PASS/FAIL verdict line over SCI8 before parking in an infinite loop.

Precondition
SystemInit configured VTOR / FPU / priority grouping.
The OSPI NOR array is present (modelled in ra8_emulator, real on silicon).
Postcondition
Exactly one PASS or FAIL verdict line has been queued on SCI8.
Control parks in an infinite loop; the function never returns.
Note
Single-threaded; runs to the park loop on the main stack.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The page-count + render-hash banner is emitted; the CPU loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The cal=OK / cal=SKIP result and the finger-free touchcal: ready sentinel are emitted; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The open=OK touch banner is emitted; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Both USB controllers' clocks and pins come up before the kernel so the workers only deal with stack bring-up.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR, FPU, priority grouping.
Postcondition
On clean entry the CPU stays in tx_kernel_enter forever.
On any HAL init failure the function halts in WFI.
Note
Single entry point; not re-entrant.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging and the clock tree, releases the Cortex-M33 (which then blinks LED1 via ra8_pcntr_set_output()), and idles. See the file header.

Precondition
SystemInit has completed core bring-up.
The M33 is held in reset by hardware until released here.
Postcondition
The M33 has been released and is blinking LED1.
This function never returns to its caller.
Note
Single-threaded; no RTOS on the M85 in this template.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
The application links ra8_c6link and ESP-hosted generated codecs.
No hardware validation is inferred from this function.
Postcondition
No c6link operation is attempted.
No network or storage state is modified.
Note
Single-threaded compile fixture.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, the clock tree, and the VCOM console, runs the cacheable-SRAM round-trip with the D-cache that SystemInit() enabled through ra8_cache_dcache_enable(), emits the matching PASS / FAIL banner over the console and ra8_log, then parks in WFI. Every byte the self-test touches runs with the L1 caches + MPU enabled by the shared boot (RA8_BOOT_ENABLE_CACHE_MPU + RA8_BOOT_CACHE_VIA_HAL).

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit enabled the MPU + I-cache + D-cache via the ra8_cache HAL.
Postcondition
Exactly one banner (PASS or FAIL) has been emitted.
The core is parked in WFI.
Note
Single-threaded; no RTOS and no IRQ sources in this template.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Publishes the mailbox, releases the Cortex-M33 into the emitter, yields until it signals done, validates the blob the M33 built, then logs the PASS/FAIL verdict and the chapter count read back from the blob. See the file header for the offload narrative.

Precondition
SystemInit has completed core bring-up.
The M33 is held inactive by hardware until released here.
Postcondition
The M33 has built a RABOOK1 blob and the M85 has validated it.
This function never returns to its caller.
Note
Single-threaded; no RTOS on the M85 in this example.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
On success the CPU heartbeats after epaper: PASS.
On any HAL error the console prints epaper: FAIL and the red LED latches on.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The chapters/toc/cover banner is emitted; CPU loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The reader loop runs forever, redrawing on each tap.
A page-1 banner is emitted once after the first render.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The cover-size / framebuffer-CRC banner is emitted; CPU loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The panel shows the reader screen and the input loop runs forever.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Publishes the mailbox, arms the IPC0 wake and configures the LPM block, releases the Cortex-M33 into the reader, waits for the first held page, logs the page-0 verdict, then runs the #150 mode-switch cycle – parking in low-power WFI and waking on the M33's page-turn pokes – before logging the handoff verdict and parking for good. See the file header for the narrative.

Precondition
SystemInit has completed core bring-up.
The M33 is held inactive by hardware until released here.
Postcondition
The M33 has rendered + re-rendered the held page and the M85 is parked.
This function never returns to its caller.
Note
Single-threaded; no RTOS on the M85 in this example.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The boot banner is emitted; the reader loop services taps forever.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up the timebase then measures forever.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the measure + blink loop forever.
On any HAL init failure the function halts in WFI.
Note
Never returns.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Arms the RIIC1 target and polls the dispatcher.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
The CPU stays in the dispatch poll loop forever.
On any fatal init error the CPU parks in riic_target_panic_halt.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On a clean run the PASS banner is printed and the CPU loops in WFI.
On any failure the function prints a FAIL line and halts.
Note
Not thread-safe; single-threaded app entry.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the read + print loop forever.
On any HAL hard error LED2 latches ON and the loop exits.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up the LIN commander then drives frames.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the LIN-frame + blink loop forever.
On any HAL init failure the function halts in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, "renders" page 0 into the shared mailbox, releases the Cortex-M33 into its hold loop, and parks the M85 in low-power WFI sleep. See the file header for the power-saving narrative.

Precondition
SystemInit has completed core bring-up.
The M33 is held inactive by hardware until released here.
Postcondition
The M33 owns the held page and the M85 is parked.
This function never returns to its caller.
Note
Single-threaded; no RTOS on the M85 in this example.
Since
0.1.0

The application entry point Reset_Handler hands control to.

The USB clock, pins, console, and the SD card all come up before the kernel so the worker only deals with USB stack bring-up.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR, FPU, priority grouping.
Postcondition
On clean entry the CPU stays in tx_kernel_enter forever.
On any HAL init failure the function halts in WFI.
Note
Single entry point; not re-entrant.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit configured VTOR / FPU.
Postcondition
On clean bring-up the CPU stays in the poll loop.
On any HAL init failure the function halts in WFI.
Note
Single entry point; not re-entrant.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler initialized static storage.
SystemInit configured VTOR, FPU, and priority grouping.
Postcondition
The startup banner is printed once.
Control enters ThreadX and never returns normally.
Note
The #707 freestanding contract is declared by ra8_boot_entry.h.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On a clean run the PASS banner is printed and the CPU heartbeats forever.
On any failure LED2 latches ON and the CPU parks.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, the clock tree, and the VCOM console, runs the three-step self-test (MPU enabled, canonical boot map, Device MMIO), emits the matching PASS / FAIL banner over the console and ra8_log, then parks in WFI.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit installed the boot map via ra8_mpu_apply_boot_map().
Postcondition
Exactly one banner (PASS or a step-specific FAIL) has been emitted.
The core is parked in WFI.
Note
Single-threaded; no RTOS and no IRQ sources in this template.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler initialised the C runtime; SystemInit ran.
The EK-RA8D2 J-Link OB VCOM console is attached for the banner.
Postcondition
The commit + rollback attempts have executed against extra-MRAM.
The verdict banner is emitted once per report cycle.
Note
Single entry point; not re-entrant.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Initialises logging + console, brings up the MRAM volume, runs the wear-levelling + power-cycle-survival flow, and prints a single PASS/FAIL verdict.

Precondition
SystemInit configured VTOR / FPU / priority grouping.
The extra-MRAM region is present (modelled in ra8_emulator, real on silicon).
Postcondition
Exactly one PASS or FAIL verdict line has been queued on SCI8.
Control parks in an infinite loop; the function never returns.
Note
Single-threaded; runs to the park loop on the main stack.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Initialises logging + console, brings up the MRAM volume, runs the program/erase round-trip, and prints a single PASS/FAIL verdict.

Precondition
SystemInit configured VTOR / FPU / priority grouping.
The extra-MRAM region is present (modelled in ra8_emulator, real on silicon).
Postcondition
Exactly one PASS or FAIL verdict line has been queued on SCI8.
Control parks in an infinite loop; the function never returns.
Note
Single-threaded; runs to the park loop on the main stack.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up the clocks, console, and SDHI bus pins, runs the native SD card identification, fills the payload, then runs the full ra8_io VFS round-trip over the native-SDHI block device. On success it prints the exact PASS banner the HIL runner and ra8_emulator smoke gate scrape for; on any failure it prints FAIL and parks the core.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On a clean run the CPU loops forever after the PASS banner.
On any failure the function prints FAIL and halts in WFI.
Note
Not thread-safe; this is the single-threaded app entry.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up the console and both stdio sinks, retargets the engine's stdio to the in-RAM capture sink, runs the two-backend swap, replays the RAM capture out of the UART, and prints a single PASS/FAIL verdict per abstraction before parking in an infinite loop.

Precondition
SystemInit configured VTOR / FPU / priority grouping.
The OSPI NOR array is present (modelled in ra8_emulator, real on silicon).
Postcondition
A PASS or FAIL verdict line has been queued on SCI8 for each abstraction.
Control parks in an infinite loop; the function never returns.
Note
Single-threaded; runs to the park loop on the main stack.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up the clocks, console, and SDHI bus pins, runs the native SD card identification, fills the payload, then writes + reads + compares one raw 512-byte block straight against ra8_sdcard. On success it prints the exact PASS banner; on any failure it prints FAIL and parks the core.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On a clean run the CPU loops forever after the PASS banner.
On any failure the function prints FAIL and halts in WFI.
Note
Not thread-safe; this is the single-threaded app entry.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The whoami PASS banner is emitted; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up clocks + UART + RMII + RSIP, then ThreadX.

Precondition
Reset_Handler has copied .data and zeroed .bss.
Postcondition
On clean entry the kernel runs the worker thread once.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, the FPU and the priority grouping.
Postcondition
The banner was printed exactly once.
Control passed to ThreadX and never came back.
Note
Everything after tx_kernel_enter happens on ThreadX; the panic-halt below is reached only if the kernel refuses to start.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, the FPU and the priority grouping.
Postcondition
The banner and the resolved pin map were printed exactly once.
Control passed to ThreadX and never came back.
Note
Everything after tx_kernel_enter happens on ThreadX; the panic-halt below is reached only if the kernel refuses to start.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, the FPU and priority grouping.
Postcondition
The probe ran exactly once and printed its verdict.
The CPU stays in a slow heartbeat loop afterwards.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, the FPU and the priority grouping.
Postcondition
The banner was printed exactly once.
Control passed to ThreadX and never came back.
Note
Everything after tx_kernel_enter runs on ThreadX; the panic-halt below is reached only if the kernel refuses to start.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Initializes and arms ADC_B, formats each successful channel sample without variadic I/O, emits the verdict, toggles LED1, and delays.

Precondition
Reset startup and SystemInit completed successfully.
The selected ADC channel matches the board analog connection.
Postcondition
Every PASS verdict follows a successful channel read.
Any read or LED failure leads to the terminal panic helper.
Note
Does not return during normal operation.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
On success the PASS banner is emitted; otherwise a FAIL line is.
The CPU parks in WFI (observable on ra8_emulator until its budget).
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, releases the Cortex-M33 (which then blinks LED1), and idles. See the file header for the teaching narrative.

Precondition
SystemInit has completed core bring-up.
The M33 is held in reset by hardware until released here.
Postcondition
The M33 has been released and is blinking LED1.
This function never returns to its caller.
Note
Single-threaded; no RTOS on the M85 in this template.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The IDCODE/checks PASS banner is emitted; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

See the file header for the full behaviour summary.

Precondition
SystemInit has enabled the caches + MPU (this build defines RA8_BOOT_ENABLE_CACHE_MPU).
The M33 is held in reset by hardware until released here.
Postcondition
The M33 has been released and the round-trip loop is running.
This function never returns to its caller.
Note
Single-threaded; no RTOS on the M85 in this template.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, the clock tree, and the VCOM console, runs the three-step self-test (cacheable SRAM, RO MRAM const, Device MMIO), emits the matching PASS / FAIL banner over the console and ra8_log, then parks in WFI. Every byte the self-test touches runs with the L1 caches and MPU enabled by the shared boot (RA8_BOOT_ENABLE_CACHE_MPU).

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit enabled the MPU + I-cache + D-cache (cache+MPU build).
Postcondition
Exactly one banner (PASS or a step-specific FAIL) has been emitted.
The core is parked in WFI.
Note
Single-threaded; no RTOS and no IRQ sources in this template.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR, FPU and priority grouping.
Postcondition
The verdict banner is on SCI8 and the CPU parks.
The result globals hold the outcome for SWD probing.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Lights HOCO + PLL, then runs a 1 Hz blink.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the toggle loop forever.
On any HAL init failure the function halts in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

See file header for behaviour summary.

Precondition
Boot init has completed.
CPU1 is held in reset.
Postcondition
CPU1 released and the ping-pong loop running.
Function never returns.
Note
Single-threaded entry.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR, FPU, priority grouping.
Postcondition
Control passes to the active app, or to the ThreadX-hosted DFU device.
On any HAL init failure the function halts in WFI.
Note
Single entry point; not re-entrant.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss; SystemInit ran.
The embedded image's first two words are a valid MSP + Thumb reset vector.
Postcondition
On success, control is at the image's reset vector in the SRAM run window.
On a failed run-target check, control parks in internal_dcr_panic_halt.
Note
Single entry point; not re-entrant.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR, FPU, priority grouping.
Postcondition
On clean entry the CPU stays in tx_kernel_enter forever.
On any HAL init failure the function halts in WFI.
Note
Single entry point; not re-entrant.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit enabled the MPU + caches via RA8_BOOT_ENABLE_CACHE_MPU.
Postcondition
Exactly one PASS/FAIL banner is emitted, then the core parks.
The core ends in WFI so ra8_emulator's idle-stop terminates the run.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Initializes the demo, executes one comparison per period, increments the exported match or mismatch counter, and toggles the matching LED.

Precondition
Reset startup and SystemInit completed successfully.
DOC and the status LEDs are not owned by another context.
Postcondition
Every iteration increments exactly one HIL result counter.
LED1 represents matches and LED2 represents failures or mismatches.
Note
Does not return during normal operation.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up the clock tree, MSTP, ISR/ELC, and the VCOM console, programs a software-triggered DTC block copy, runs it with the L1 caches + MPU enabled by the shared boot (RA8_BOOT_ENABLE_CACHE_MPU), emits the matching PASS / FAIL banner over the console and ra8_log, then parks in WFI.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit enabled the MPU + caches via RA8_BOOT_ENABLE_CACHE_MPU.
Postcondition
Exactly one PASS/FAIL banner is emitted, then the core parks.
The core ends in WFI so ra8_emulator's idle-stop terminates the run.
Note
Single-threaded; the completion IRQ is left masked and the result polled.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, zeros the shared control block, releases the Cortex-M33, waits for its boot signature, then yields while the M33 counts autonomously to k_bg_target_count. After the M33 sets done, the M85 reads the counter and logs the PASS/FAIL verdict.

Precondition
SystemInit has completed core bring-up.
The M33 is held in reset by hardware until released here.
Postcondition
The M33 has autonomously incremented the counter and set done.
This function never returns to its caller.
Note
Single-threaded; no RTOS on the M85 in this example.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, releases the Cortex-M33, confirms it booted, runs k_m85_demo_rounds narrated mailbox rounds, then drops into the idle heartbeat. See the file header for the teaching narrative.

Precondition
SystemInit has completed core bring-up.
The M33 is held in reset by hardware until released here.
Postcondition
The M33 has been released and the mailbox exchange is running.
This function never returns to its caller.
Note
Single-threaded; no RTOS on the M85 in this example.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Fires ELC software events once a second.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the trigger + blink loop.
On any HAL hard error LED2 latches ON.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The geometry-hash banner is emitted; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The framebuffer hash banner is emitted; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The bmp/gif framebuffer-CRC banner is emitted; CPU loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The hit-test / nav result banner is emitted; the CPU loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The nav-result banner is emitted; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The per-chapter page-count + render-hash banner is emitted; loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The svg-size / framebuffer-CRC banner is emitted; CPU loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On a clean run the CPU loops forever after the ALL PASS banner.
On any failure the function halts in WFI after a FAIL diagnostic.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The layer1=ok ... PASS banner is emitted on a programmed GLCDC, or FAIL glcdc on a bring-up failure; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Initializes the demo, tracks falling SW1 edges as counter deltas, and independently increments the exported liveness counter whenever successive GPT samples advance.

Precondition
Reset startup and SystemInit completed successfully.
The board wiring matches the EK-RA8D2 LED1 and SW1 definitions.
Postcondition
During operation, each detected edge toggles LED1.
A terminal control-flow escape parks the core in the panic helper.
Note
Does not return during normal operation.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Initializes the demo and GPT0, runs one bounded DMA request per iteration, updates the exported match/mismatch counter, and delays.

Precondition
Reset startup and SystemInit completed successfully.
GPT0 and the DMA allocator are not owned by another context.
Postcondition
Every iteration increments exactly one HIL result counter.
Allocated DMA channels are released by internal_run_one.
Note
Does not return during normal operation.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Initializes and arms GPT0 once, then starts, polls, records the exported pass/failure counters, toggles LED1 on completion, and delays before the next one-shot.

Precondition
Reset startup and SystemInit completed successfully.
GPT0 and LED1 are not owned by another execution context.
Postcondition
Each completed one-shot increments g_gpt_one_shot_match.
Each start or bounded-poll failure increments the mismatch counter.
Note
Does not return during normal operation.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up both controllers then scans each.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the scan + blink loop forever.
On any HAL hard error the CPU parks.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + IIC_B + console then probes.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the scan + blink loop forever.
On any HAL hard error LED2 latches ON and the loop exits.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The iic_b facade: up banner is emitted every period in the loop.
On any bring-up failure the CPU BKPT-halts before the loop.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Emits the boot banner, initializes the option-controlled IWDT, samples its counter, and on legal samples queues a refresh, clears status, toggles LED1, and emits the refresh banner.

Precondition
Reset startup and SystemInit completed successfully.
OFS0 contains the window policy represented by the demo constants.
Postcondition
Each reported refresh was requested only within the inclusive window.
Any HAL or output error leads to the terminal panic helper.
Note
Does not return during normal operation.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The query/commit banner is emitted; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Performs one Deep-Sleep cycle, emits the wake banner, then parks in a normal blink loop.

MC/DC:
Compound decision: enter_sleep != ok || any_sci_write != ok. Two atomic conditions x N+1 = 3 vectors – both-ok happy path, enter_sleep fails (covered by host test), sci_write fails (covered by host test).
Precondition
Reset_Handler / SystemInit completed normally.
LPM init has not yet been attempted.
Postcondition
On clean entry the chip emitted both banners and is parked in a normal blink loop, ready for the next bench flash.
On any HAL hard error LED1 latches OFF and the chip halts.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU and priority grouping.
Postcondition
The verdict banner is printed and remains the terminal UART line.
g_pdm_mic_result carries the validated capture result.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Initializes channel zero, formats and enqueues each counter line, toggles LED1, and delays before incrementing the next sample.

Precondition
Reset startup and SystemInit completed successfully.
J-Link may update only the consumer offset in the shared descriptor.
Postcondition
Each successful iteration advances the counter and toggles LED1.
Any producer or LED error leads to the terminal panic helper.
Note
Does not return during normal operation.
Since
0.1.0

Definition at line 330 of file main.c.

References g_sfr_heartbeat, k_sfr_frame_ms, ra8_delay_ms(), sfr_bringup_clocks(), sfr_bringup_panel(), sfr_load_font_or_halt(), and sfr_render_or_halt().

◆ RA8_BOARD_PANEL_FRAMEBUFFER()

RA8_BOARD_PANEL_FRAMEBUFFER ( s_framebuffer )

RGB565 framebuffer in external SDRAM, AXI-burst aligned.

References s_framebuffer.

◆ sfr_bringup_clocks()

void sfr_bringup_clocks ( void )
static

◆ sfr_bringup_panel()

void sfr_bringup_panel ( void )
static

◆ sfr_load_font_or_halt()

void sfr_load_font_or_halt ( void )
static

Load FONT.OTF off the Pmod2 card (self-provisioning) into s_font_buf.

Delegates the Pmod2 SPI bring-up, FAT mount, and font read to ra8_sdfont_load, which writes the baked Latin-1 font to the card and reads it back when FONT.OTF is absent – so any FAT-formatted card just works. The raw ra8_err_t is stashed in g_sfr_err for SWD triage; on failure the panel is flooded a stage-coded gray and the app halts.

Definition at line 262 of file main.c.

References g_ra8_font_literata_latin1, g_ra8_font_literata_latin1_len, g_sfr_err, g_sfr_font_len, g_sfr_source, g_sfr_stage, k_ra8_ok, k_ra8_sdfont_source_card, k_sfr_font_cap, k_sfr_pin_cipo, k_sfr_pin_copi, k_sfr_pin_cs, k_sfr_pin_sck, k_sfr_spi_chan, k_sfr_stage_card_fail, k_sfr_stage_font_ok, ra8_sdfont_load(), s_font_buf, s_pclka_hz, and sfr_panic_halt().

Referenced by main().

◆ sfr_panic_halt()

void sfr_panic_halt ( uint32_t stage)
static

Halt forever with the red board LED on (fatal init error marker).

Also floods the framebuffer a stage-coded gray so a ra8_emulator --ppm snapshot (or a glance at the panel) reveals which bring-up stage failed without a debugger: low nibble of the stage code picks the level.

Definition at line 190 of file main.c.

References g_sfr_stage, k_ra8_board_led_red, k_sfr_diag_argb_opaque, k_sfr_diag_lvl_base, k_sfr_diag_lvl_mask, k_sfr_diag_lvl_step, k_sfr_diag_shift_g, k_sfr_diag_shift_r, ra8_board_led_on(), and ra8_gfx_clear().

Referenced by sfr_bringup_clocks(), sfr_bringup_panel(), sfr_load_font_or_halt(), and sfr_render_or_halt().

◆ sfr_render_or_halt()

Variable Documentation

◆ g_sfr_err

volatile uint32_t g_sfr_err = 0U

Last ra8_err_t from ra8_sdfont_load (0 = k_ra8_ok), for SWD triage.

Definition at line 177 of file main.c.

Referenced by sfr_load_font_or_halt().

◆ g_sfr_font_len

volatile uint32_t g_sfr_font_len = 0U

Bytes of font read off the card.

Definition at line 169 of file main.c.

Referenced by sfr_load_font_or_halt(), and sfr_render_or_halt().

◆ g_sfr_heartbeat

volatile uint32_t g_sfr_heartbeat = 0U

Idle-loop heartbeat; advances only after a clean render (HIL gate).

Definition at line 179 of file main.c.

Referenced by main().

◆ g_sfr_ink

volatile uint32_t g_sfr_ink = 0U

Inked (non-paper) pixel count after render – liveness proof.

Definition at line 173 of file main.c.

Referenced by sfr_render_or_halt().

◆ g_sfr_pages

volatile uint32_t g_sfr_pages = 0U

Pages produced by reflow_layout_chapter.

Definition at line 171 of file main.c.

Referenced by sfr_render_or_halt().

◆ g_sfr_source

volatile uint32_t g_sfr_source = 0U

Font provenance (ra8_sdfont_source_t): 0 = on-card, 1 = provisioned.

Definition at line 175 of file main.c.

Referenced by sfr_load_font_or_halt().

◆ g_sfr_stage

volatile uint32_t g_sfr_stage = k_sfr_stage_boot

Last stage reached (sfr_stage_t); read externally over SWD.

Definition at line 167 of file main.c.

Referenced by sfr_bringup_panel(), sfr_load_font_or_halt(), sfr_panic_halt(), and sfr_render_or_halt().

◆ k_sfr_body

const char k_sfr_body[]
static
Initial value:
= "<html><body><h1>SD font OK</h1>"
"<p>Read off the card.</p></body></html>"

XHTML body the app reflows with the SD-loaded font.

Deliberately short: every glyph is rasterised by stb_truetype in software, which is fast on the panel but slow under the ra8_emulator CPU emulator, so a compact line keeps the fake render time practical while still exercising the full SD-font -> ra8_fs -> reflow -> framebuffer path.

Definition at line 128 of file main.c.

Referenced by sfr_render_or_halt().

◆ k_sfr_display_cfg

const display_cfg_t k_sfr_display_cfg
static
Initial value:
= {
.framebuffer = s_framebuffer,
.framebuffer_bytes = sizeof(s_framebuffer),
.width_px = (uint16_t)k_sfr_fb_w,
.height_px = (uint16_t)k_sfr_fb_h,
.panel_timing = &s_ra8_panel_ek_ra8d2_timing,
}
static uint16_t s_framebuffer[(size_t) k_panel_height_px *(size_t) k_panel_width_px]
1024x600 RGB565 framebuffer in external SDRAM (GLCDC scans this).
Definition main.c:67
@ k_sfr_fb_w
Framebuffer width (pixels).
Definition main.c:69
@ k_sfr_fb_h
Framebuffer height (pixels).
Definition main.c:70
@ k_display_pixfmt_rgb565
16 bpp, 5/6/5 packed.
const display_backend_iface_t k_display_backend_lcd_ra8_glcdc
LCD backend vtable – pass its address through display_cfg_t.iface to drive the EK-RA8D2 panel.
static const ra8_glcdc_timing_t s_ra8_panel_ek_ra8d2_timing
EK-RA8D2 ER-TFT070-6 RGB timing for ra8_glcdc_init / the LCD backend.

Display PAL config – LCD/GLCDC backend over the SDRAM buffer.

Definition at line 145 of file main.c.

Referenced by sfr_bringup_panel().

◆ k_sfr_pin_cipo

Definition at line 118 of file main.c.

Referenced by sfr_load_font_or_halt().

◆ k_sfr_pin_copi

Definition at line 119 of file main.c.

Referenced by sfr_load_font_or_halt().

◆ k_sfr_pin_cs

Definition at line 120 of file main.c.

Referenced by sfr_load_font_or_halt().

◆ k_sfr_pin_sck

Pmod2 SPI pins (J25) – SCI0 Simple-SPI per HUM Table 20.13.

Definition at line 117 of file main.c.

Referenced by sfr_load_font_or_halt().

◆ s_display

display_handle_t* s_display = nullptr
static

PAL handle returned by display_init.

Definition at line 156 of file main.c.

◆ s_engine

reflow_t s_engine
static

Reflow engine (page / glyph / token pools live inside).

Definition at line 142 of file main.c.

◆ s_fb

display_fb_t s_fb
static

Mutable copy of the FB descriptor; populated at boot.

Definition at line 159 of file main.c.

◆ s_font_buf

uint8_t s_font_buf[k_sfr_font_cap]
static

Font blob read off the card – lives in SDRAM (hundreds of KiB).

Definition at line 139 of file main.c.

◆ s_pclka_hz

uint32_t s_pclka_hz = 0U
static

Cached PCLKA rate (Hz) for the SPI clock shim.

Definition at line 162 of file main.c.