ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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main.c
Go to the documentation of this file.
1
48
49#include <stdint.h>
50
51#include "ra8_attributes.h"
52#include "ra8_board_ek_ra8d2.h"
53#include "ra8_boot_entry.h"
54#include "ra8_cac.h"
55#include "ra8_cac_regs.h"
56#include "ra8_cgc.h"
57#include "ra8_check.h"
58#include "ra8_err.h"
59#include "ra8_isr.h"
60#include "ra8_mstp.h"
61#include "ra8_time.h"
62
64static const char* s_tag = "cac_demo";
65
67typedef enum : uint32_t {
68 k_cac_demo_baud = 115200U,
71
80typedef enum : uint32_t {
81 k_cac_demo_main_hz = 24000000U,
86
98typedef enum : uint8_t {
102
104static const uint8_t s_cac_demo_ok_msg[] = "cac: meas=ok ferr=0 ovf=0 ok=Y\r\n";
105static const uint8_t s_cac_demo_bad_msg[] = "cac: meas=TIMEOUT-or-err ok=N\r\n";
106
113volatile uint32_t g_cac_count = 0U;
114
121volatile uint32_t g_cac_ok = 0U;
122
129volatile uint32_t g_cac_status = 0U;
130
137volatile uint32_t g_cac_heartbeat = 0U;
138
150{
151 while (1) {
152 __asm__ volatile("wfi");
153 }
154}
155
169RA8_INTERNAL static uint32_t internal_expected(void)
170{
171 return ((uint32_t)k_cac_demo_main_hz * (uint32_t)k_cac_demo_ref_div) /
172 (uint32_t)k_cac_demo_loco_hz;
173}
174
187{
188 uint32_t cpuclk0_hz = 0U;
189
190 if (ra8_cgc_init() != k_ra8_ok) {
192 }
195 }
196 if (ra8_mstp_init() != k_ra8_ok) {
198 }
199 if (ra8_time_init(cpuclk0_hz) != k_ra8_ok) {
201 }
204 }
207 }
210 }
211}
212
235[[nodiscard]] RA8_INTERNAL static ra8_err_t internal_configure(void)
236{
237 const uint32_t expected = internal_expected();
238 const uint32_t tol = expected >> (uint32_t)k_cac_demo_tol_shift;
239 const uint16_t upper = (uint16_t)(expected + tol);
240 const uint16_t lower = (uint16_t)(expected - tol);
241
242 const ra8_err_t err = ra8_cac_init(upper, lower);
243 if (err != k_ra8_ok) {
244 return err;
245 }
246 /* HUM Ch 10.2.2 "CACR1 : CAC Control Register 1" p 422 -- target =
247 * main osc (FMCS=000), no division, rising edge. Valid while CFME=0. */
248 ra8_cac()->CACR1 = (uint8_t)k_cac_demo_cacr1_main;
249 /* HUM Ch 10.2.3 "CACR2 : CAC Control Register 2" p 423 -- internal
250 * reference = LOCO (RSCS=100) divided by 32 (RCDS=00), no filter. */
251 ra8_cac()->CACR2 = (uint8_t)k_cac_demo_cacr2_loco;
252 return k_ra8_ok;
253}
254
279[[nodiscard]] RA8_INTERNAL static ra8_err_t internal_sample(uint8_t* out_ok)
280{
281 RA8_CHECK_NULL_PTR(out_ok, s_tag, "out_ok must not be nullptr");
282
283 uint16_t count = 0U;
284 const ra8_err_t meas = ra8_cac_measure(&count);
285 const uint8_t meas_ok = (meas == k_ra8_ok) ? 1U : 0U;
286
287 uint8_t status = 0U;
288 const ra8_err_t serr = ra8_cac_get_status(&status);
289 if (serr != k_ra8_ok) {
290 return serr;
291 }
292 g_cac_status = (uint32_t)status;
293 if (meas_ok != 0U) {
294 g_cac_count = (uint32_t)count;
295 }
296 const uint8_t ferrf = ((status & (uint8_t)k_ra8_cac_status_ferrf) != 0U) ? 1U : 0U;
297 const uint8_t ovff = ((status & (uint8_t)k_ra8_cac_status_ovff) != 0U) ? 1U : 0U;
298 *out_ok = (meas_ok != 0U && ferrf == 0U && ovff == 0U) ? 1U : 0U;
299 return k_ra8_ok;
300}
301
302void main(void)
303{
305 /* Clear PRIMASK so SysTick can dispatch and ra8_delay_ms() uses the
306 * SysTick path (ra8_emulator does not advance DWT_CYCCNT). No NVIC sources
307 * are armed by this demo. */
309
310 if (internal_configure() != k_ra8_ok) {
312 }
313
314 while (1) {
315 uint8_t ok = 0U;
316 const ra8_err_t err = internal_sample(&ok);
317 const uint8_t good = (err == k_ra8_ok && ok != 0U) ? 1U : 0U;
318 g_cac_ok = (uint32_t)good;
319 if (good != 0U) {
321 (size_t)(sizeof(s_cac_demo_ok_msg) - 1U));
323 } else {
325 (size_t)(sizeof(s_cac_demo_bad_msg) - 1U));
327 }
330 }
332}
void main(void)
Secure fallback main entry point.
Definition main.c:37
static void internal_setup_or_halt(void)
Bring up clocks, MSTP, delay timing, and the board console.
Definition main.c:211
static void internal_panic_halt(void)
Park the core after an unrecoverable ADC demo failure.
Definition main.c:123
cac_demo_calc_t
Clock-pair arithmetic for the expected count + window.
Definition main.c:80
@ k_cac_demo_loco_hz
LOCO oscillator (CACLCLK).
Definition main.c:82
@ k_cac_demo_ref_div
CACR2.RCDS = 00 -> reference /32.
Definition main.c:83
@ k_cac_demo_main_hz
EK-RA8D2 main oscillator (CACMCLK).
Definition main.c:81
@ k_cac_demo_tol_shift
Window half-width = expected >> 4.
Definition main.c:84
volatile uint32_t g_cac_heartbeat
Bumps once per main-loop pass – liveness for headless probes.
Definition main.c:137
volatile uint32_t g_cac_status
Last CASTR snapshot (FERRF | MENDF | OVFF bits).
Definition main.c:129
static ra8_err_t internal_configure(void)
Programme CAC limits + the MAIN-vs-LOCO clock pair.
Definition main.c:235
static uint32_t internal_expected(void)
Calculate the expected MAIN-vs-LOCO/32 edge count.
Definition main.c:169
volatile uint32_t g_cac_ok
1 when the last measurement completed inside the window.
Definition main.c:121
volatile uint32_t g_cac_count
Raw CACNTBR count captured on the last successful measurement.
Definition main.c:113
static ra8_err_t internal_sample(uint8_t *out_ok)
Run one measurement and fold the result into the verdict.
Definition main.c:279
cac_demo_config_t
Compile-time settings.
Definition main.c:67
@ k_cac_demo_baud
SCI8 baud rate.
Definition main.c:68
@ k_cac_demo_period_ms
Delay between measurements.
Definition main.c:69
static const uint8_t s_cac_demo_bad_msg[]
Definition main.c:105
cac_demo_cacr_t
Direct CACR1 / CACR2 values selecting the MAIN-vs-LOCO clock pair.
Definition main.c:98
@ k_cac_demo_cacr1_main
Target = main osc, /1, rising.
Definition main.c:99
@ k_cac_demo_cacr2_loco
Reference = LOCO /32, internal.
Definition main.c:100
static const uint8_t s_cac_demo_ok_msg[]
Output line tags.
Definition main.c:104
static const char * s_tag
Logging / check tag.
Definition ra8_app.c:17
Annotation-attribute framework macros for ra8-firmware.
#define RA8_INTERNAL
Marker that a function is intended to be static (file-local).
Board-support layer for the Renesas EK-RA8D2 v1 evaluation kit.
ra8_err_t ra8_board_led_toggle(ra8_board_led_id_t led)
Toggle led's output state.
ra8_err_t ra8_board_led_init(ra8_board_led_id_t led)
Configure led as a digital output, initial level low (off).
@ k_ra8_board_led2
LED2, GREEN, P303 (jumper E26).
@ k_ra8_board_led1
LED1, BLUE, P600 (jumper E27).
ra8_err_t ra8_board_uart_console_write(const uint8_t *data, size_t len)
Polled blocking write to the J-Link OB VCOM console.
ra8_err_t ra8_board_uart_console_init(uint32_t baud)
Configure SCI8 + PD02/PD03 as the debug-console UART.
Boot entry points shared between a vector table and its startup code.
Clock Accuracy Check driver.
ra8_err_t ra8_cac_init(uint16_t upper, uint16_t lower)
Programme CAC with upper + lower bounds on measured cycles.
Definition ra8_cac.c:99
@ k_ra8_cac_status_ferrf
Frequency error (CASTR bit 0).
Definition ra8_cac.h:59
@ k_ra8_cac_status_ovff
Counter overflow (CASTR bit 2).
Definition ra8_cac.h:61
ra8_err_t ra8_cac_measure(uint16_t *out_count)
Kick off a CAC measurement and wait for completion.
Definition ra8_cac.c:125
ra8_err_t ra8_cac_get_status(uint8_t *out_mask)
Read the CASTR flag bits.
Definition ra8_cac.c:184
Clock Accuracy Check (CAC) register layout for the Renesas RA8D2.
static volatile r_cac_regs_t * ra8_cac(void)
Get pointer to the CAC block.
High-level Clock Generation Circuit driver.
ra8_err_t ra8_cgc_get_clock_hz(ra8_clock_id_t id, uint32_t *out_hz)
Query the current frequency of a clock-tree domain.
Definition ra8_cgc.c:132
@ k_ra8_clock_id_cpuclk0
Cortex-M85 CPUCLK0.
Definition ra8_cgc.h:70
ra8_err_t ra8_cgc_init(void)
Configure the clock tree to a safe default.
Definition ra8_cgc.c:727
Validation and Error-Checking Macros for ra8-firmware.
#define RA8_CHECK_NULL_PTR(ptr, tag, message)
Reject nullptr pointer, returning k_ra8_err_null_ptr.
Definition ra8_check.h:243
Error Code Definitions for ra8-firmware.
@ k_ra8_ok
Success – operation completed with all postconditions satisfied.
Definition ra8_err.h:119
ra8_err_codes_t ra8_err_t
Canonical error-return type used by every ra8-firmware API.
Definition ra8_err.h:546
NVIC + ICU IELSR allocator.
void ra8_isr_globals_enable(void)
Globally enable maskable interrupts (PRIMASK = 0).
Definition ra8_isr.c:439
Ref-counted Module Stop Control wrapper for the RA8D2.
ra8_err_t ra8_mstp_init(void)
Re-establish the ra8_mstp ref-count table from current hardware state.
Definition ra8_mstp.c:291
SysTick-based tick counter, delay and timestamp helpers.
ra8_err_t ra8_time_init(uint32_t cpu_hz)
Initialise SysTick for a 1 kHz tick interrupt.
Definition ra8_time.c:59
void ra8_delay_ms(uint32_t ms)
Busy-wait for at least ms milliseconds.
Definition ra8_time.c:129
volatile uint8_t CACR2
+0x02 Control 2.
volatile uint8_t CACR1
+0x01 Control 1.