ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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main.c File Reference

Clock Frequency Accuracy Measurement (CAC) demo for the EK-RA8D2. More...

#include <stdint.h>
#include "ra8_attributes.h"
#include "ra8_board_ek_ra8d2.h"
#include "ra8_boot_entry.h"
#include "ra8_cac.h"
#include "ra8_cac_regs.h"
#include "ra8_cgc.h"
#include "ra8_check.h"
#include "ra8_err.h"
#include "ra8_isr.h"
#include "ra8_mstp.h"
#include "ra8_time.h"
Include dependency graph for main.c:

Go to the source code of this file.

Enumerations

enum  cac_demo_config_t : uint32_t {
  k_cac_demo_baud = 115200U ,
  k_cac_demo_period_ms = 1000U
}
 Compile-time settings. More...
enum  cac_demo_calc_t : uint32_t {
  k_cac_demo_main_hz = 24000000U ,
  k_cac_demo_loco_hz = 32768U ,
  k_cac_demo_ref_div = 32U ,
  k_cac_demo_tol_shift = 4U
}
 Clock-pair arithmetic for the expected count + window. More...
enum  cac_demo_cacr_t : uint8_t {
  k_cac_demo_cacr1_main = 0x00U ,
  k_cac_demo_cacr2_loco = 0x09U
}
 Direct CACR1 / CACR2 values selecting the MAIN-vs-LOCO clock pair. More...

Functions

static void internal_panic_halt (void)
 Park forever after a fatal CAC initialization failure.
static uint32_t internal_expected (void)
 Calculate the expected MAIN-vs-LOCO/32 edge count.
static void internal_setup_or_halt (void)
 Bring CGC, SysTick, SCI8, LEDs, and MSTP up.
static ra8_err_t internal_configure (void)
 Programme CAC limits + the MAIN-vs-LOCO clock pair.
static ra8_err_t internal_sample (uint8_t *out_ok)
 Run one measurement and fold the result into the verdict.
void main (void)
 The application entry point Reset_Handler hands control to.

Variables

static const char * s_tag = "cac_demo"
 Diagnostic / log tag.
static const uint8_t s_cac_demo_ok_msg [] = "cac: meas=ok ferr=0 ovf=0 ok=Y\r\n"
 Output line tags.
static const uint8_t s_cac_demo_bad_msg [] = "cac: meas=TIMEOUT-or-err ok=N\r\n"
volatile uint32_t g_cac_count = 0U
 Raw CACNTBR count captured on the last successful measurement.
volatile uint32_t g_cac_ok = 0U
 1 when the last measurement completed inside the window.
volatile uint32_t g_cac_status = 0U
 Last CASTR snapshot (FERRF | MENDF | OVFF bits).
volatile uint32_t g_cac_heartbeat = 0U
 Bumps once per main-loop pass – liveness for headless probes.

Detailed Description

Clock Frequency Accuracy Measurement (CAC) demo for the EK-RA8D2.

Tag
[Ring 6 / APP] {World: S}

The CAC counts edges of a measurement target clock during one period of a divided reference clock and raises a frequency-error flag if the count falls outside a programmed window. This demo measures the 24 MHz main oscillator (CACMCLK) against the LOCO low-speed on-chip oscillator (CACLCLK) divided by 32, i.e. a 1024 Hz reference window:

expected count = f_MAIN / (f_LOCO / 32) = 24e6 / 1024 = 23437

The allowable window is set to that expected value +/- ~6 %, so a healthy 24 MHz crystal passes (FERRF clear) while a stopped or grossly detuned oscillator trips the frequency-error flag.

Bring-up: CGC + SysTick + SCI8 + LEDs. After ra8_cac_init programs the limits, the demo writes CACR1 (target = MAIN) and CACR2 (reference = LOCO /32, internal) directly, then once a second performs a measurement and reports "cac: meas=ok ferr=0 ovf=0 ok=Y\r\n" on the J-Link OB CDC channel. The raw count lands in g_cac_count for SWD probing.

LED1 toggles on a healthy measurement; LED2 toggles on timeout / error.

Bare EK-RA8D2 only – no shields or external transceivers. Requires the LOCO to be running (it is the default low-speed clock and feeds IWDT / RTC); if the LOCO is stopped the reference never ticks and the measurement times out.

Note
Headless-emulator status. tools/ra8_emulator models the CAC edge counter (board_periph_cac.c): a CACR0.CFME start latches CASTR.MENDF and returns a CACNTBR inside the programmed [CALLVR, CAULVR] window, so ra8_cac_measure completes with FERRF / OVFF clear and the banner reports ok=Y (the ra8_emulator_smoke.sh gate keys on it). Confirmed on a real EK-RA8D2 (2026-06-28): the real cross-clock edge count lands inside the +/-6% window and the HIL gate is green – the fake proves the driver start / poll / read-back sequence, silicon proves the real edge count. See README.md for details.
Since
0.1.0

Definition in file main.c.

Enumeration Type Documentation

◆ cac_demo_cacr_t

enum cac_demo_cacr_t : uint8_t

Direct CACR1 / CACR2 values selecting the MAIN-vs-LOCO clock pair.

ra8_cac_init leaves CACR1/CACR2 = 0; these must be written while CACR0.CFME = 0 (HUM Ch 10.2.2 p 421 / 10.2.3 p 422 notes).

  • CACR1 = 0x00: FMCS = 000 (target = main osc CACMCLK), TCSS = 00 (no target division), EDGES = 00 (rising), CACREFE = 0.
  • CACR2 = 0x09: RPS = 1 (internal reference), RSCS = 100 (reference = LOCO CACLCLK), RCDS = 00 (reference /32), DFS = 00 (no filter).
Enumerator
k_cac_demo_cacr1_main 

Target = main osc, /1, rising.

k_cac_demo_cacr2_loco 

Reference = LOCO /32, internal.

Definition at line 98 of file main.c.

◆ cac_demo_calc_t

enum cac_demo_calc_t : uint32_t

Clock-pair arithmetic for the expected count + window.

f_MAIN = 24 MHz main XTAL (HUM Ch 9 "CGC", USBCKCR note p 365); f_LOCO = 32768 Hz; the reference is LOCO divided by 32 (CACR2.RCDS = 00). expected = f_MAIN * 32 / f_LOCO. The window is +/- (expected >> 4) (~6.25 %).

Enumerator
k_cac_demo_main_hz 

EK-RA8D2 main oscillator (CACMCLK).

k_cac_demo_loco_hz 

LOCO oscillator (CACLCLK).

k_cac_demo_ref_div 

CACR2.RCDS = 00 -> reference /32.

k_cac_demo_tol_shift 

Window half-width = expected >> 4.

Definition at line 80 of file main.c.

◆ cac_demo_config_t

enum cac_demo_config_t : uint32_t

Compile-time settings.

Enumerator
k_cac_demo_baud 

SCI8 baud rate.

k_cac_demo_period_ms 

Delay between measurements.

Definition at line 67 of file main.c.

Function Documentation

◆ internal_configure()

ra8_err_t internal_configure ( void )
staticnodiscard

Programme CAC limits + the MAIN-vs-LOCO clock pair.

ra8_cac_init enables the CAC clock, clears CACR0.CFME, and loads the +/-6% window; the demo then selects the clock pair by writing CACR1 + CACR2 directly (the HAL keeps them at 0). Both writes are valid only while CFME = 0, which ra8_cac_init guarantees on return.

MC/DC:
Single decision err != k_ra8_ok – 2 vectors. No compound condition.
Returns
ra8_err_t from ra8_cac_init.
Return values
k_ra8_okCAC accepted the limits and clock pair was selected.
(other)CAC initialization failed before direct clock selection.
Precondition
CGC is up; IRQs masked or single-threaded init.
The fixed clock constants describe the active board clock tree.
Postcondition
On success CACR1/CACR2 select MAIN target + LOCO/32 reference.
On failure the initialization error is returned unchanged.
Note
Not thread-safe with concurrent CAC configuration.
Since
0.1.0

Definition at line 235 of file main.c.

References r_cac_regs_t::CACR1, r_cac_regs_t::CACR2, internal_expected(), k_cac_demo_cacr1_main, k_cac_demo_cacr2_loco, k_cac_demo_tol_shift, k_ra8_ok, ra8_cac(), ra8_cac_init(), and RA8_INTERNAL.

Referenced by main().

◆ internal_expected()

uint32_t internal_expected ( void )
static

Calculate the expected MAIN-vs-LOCO/32 edge count.

Applies the fixed target frequency and reference-divider ratio with unsigned integer arithmetic.

Returns
Nominal edge count at the configured frequencies.
Return values
0..UINT32_MAXDeterministic quotient from the compile-time constants.
Precondition
All frequency and divider constants are non-zero and in range.
The multiplication fits in 32 bits for this board configuration.
Postcondition
No hardware or application state is modified.
Repeated calls return the same value.
Note
Pure and reentrant.
Since
0.1.0

Definition at line 169 of file main.c.

References k_cac_demo_loco_hz, k_cac_demo_main_hz, k_cac_demo_ref_div, and RA8_INTERNAL.

Referenced by internal_configure().

◆ internal_panic_halt()

void internal_panic_halt ( void )
static

Park forever after a fatal CAC initialization failure.

Repeatedly executes WFI, preserving measurement state for debug.

Precondition
Called only from boot failure or the terminal foreground path.
The caller does not require recovery without reset.
Postcondition
The core stays in WFI until external intervention.
No further CAC measurement is started.
Note
Not thread-safe; this is a terminal single-threaded path.
Since
0.1.0

Definition at line 149 of file main.c.

References RA8_INTERNAL.

◆ internal_sample()

ra8_err_t internal_sample ( uint8_t * out_ok)
staticnodiscard

Run one measurement and fold the result into the verdict.

Parameters
[out]out_ok1 when the measurement completed inside the window.

Healthy iff ra8_cac_measure returned k_ra8_ok (MENDF inside the poll budget) AND neither the frequency-error (FERRF) nor the overflow (OVFF) status bit is set.

MC/DC:
Decision ok = meas_ok && !ferrf && !ovff (3 conditions). The host test supplies N+1 = 4 vectors, varying each condition independently.
Returns
ra8_err_tk_ra8_ok once the (bounded) attempt finishes, or the status-read error.
Return values
k_ra8_err_null_ptrout_ok was NULL.
Precondition
internal_configure succeeded.
out_ok points to writable caller-owned storage.
Postcondition
g_cac_count / g_cac_status updated; *out_ok is 0 or 1.
On a status-read error, the error is returned without a verdict write.
Note
Not thread-safe; it updates exported measurement state.
Since
0.1.0

Definition at line 279 of file main.c.

References g_cac_count, g_cac_status, k_ra8_cac_status_ferrf, k_ra8_cac_status_ovff, k_ra8_ok, ra8_cac_get_status(), ra8_cac_measure(), RA8_CHECK_NULL_PTR, RA8_INTERNAL, and s_tag.

Referenced by main().

◆ internal_setup_or_halt()

void internal_setup_or_halt ( void )
static

Bring CGC, SysTick, SCI8, LEDs, and MSTP up.

Initializes foreground-loop dependencies in order and parks on the first failed HAL operation.

Precondition
Reset startup initialized static storage and the vector table.
Called once before global interrupt enable.
Postcondition
On return, delays, console output, module clocks, and LEDs are ready.
CAC remains unconfigured until internal_configure runs.
Note
Not thread-safe; it owns global peripheral initialization.
Since
0.1.0

Definition at line 186 of file main.c.

References internal_panic_halt(), k_cac_demo_baud, k_ra8_board_led1, k_ra8_board_led2, k_ra8_clock_id_cpuclk0, k_ra8_ok, ra8_board_led_init(), ra8_board_uart_console_init(), ra8_cgc_get_clock_hz(), ra8_cgc_init(), RA8_INTERNAL, ra8_mstp_init(), and ra8_time_init().

◆ main()

void main ( void )

The application entry point Reset_Handler hands control to.

Returns void, not int. This is a freestanding image: there is no hosted C environment, no process and nothing to report an exit status to. ISO C fixes main at int only for a hosted implementation; for a freestanding one (C23 5.1.2.1) the startup function's name and type are implementation-defined, and this is that definition. Reset_Handler discards no value because there is none to discard, and if main ever does return, startup halts the CPU rather than resuming anything.

The firmware lane is compiled -ffreestanding (see cmake/ra8_add_app.cmake) and the flag and this signature travel together: without it both GCC and clang reject a non-int main (-Wmain / -Wmain-return-type). Do not remove one without the other.

That coupling is why the declaration sits behind __STDC_HOSTED__ == 0, which -ffreestanding sets and a hosted build does not. The guard is not defensive dressing: this header is reachable from host builds (the unit tests compile ra8_core natively), and an unguarded void main(void); makes every hosted translation unit that includes it fail with conflicting types for 'main' against its own ISO int main. The declaration therefore exists exactly where its contract does.

Hosted first-party code – everything under tests/ and tools/ – uses the ISO int main(...) contract instead, because it genuinely does run under an OS that reads the exit status. scripts/checks/check_entry_points.py holds each domain to its own contract (#707).

Declared here, once, for the same reason SystemInit is: every vector_table.c used to restate it as a local extern int32_t main(void);, sixteen copies that no compiler ever compared against the definition – and roughly thirty of them had silently drifted out of agreement with the main they called.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has configured the clock tree and VTOR.
Postcondition
Control does not return; the image runs until reset or halt.
Any value the application wanted to report has been logged, not returned.
Note
Not thread-safe; single-threaded startup context only.
Warning
Only valid while the translation unit is compiled -ffreestanding. A hosted build rejects this signature.
See also
SystemInit()
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + BSP audio then plays blocks.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the playback loop forever.
On any HAL init failure the function halts in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + GPT triple, runs sweep.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the sweep loop forever.
On any HAL init failure the function halts in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up clocks + UART + RMII pins, then ThreadX.

Precondition
Reset_Handler has copied .data and zeroed .bss.
Postcondition
On clean entry the kernel runs the worker thread once.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up clocks + UART, then enters ThreadX.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the kernel runs the worker thread forever.
On any HAL init failure the function halts in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up LED, console, SDHI pins, then ThreadX.

Precondition
Reset_Handler has copied .data + zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
CPUCLK0 is raised to the PLL1 target before the kernel starts.
On clean entry the SD card thread runs forever.
On any HAL init failure the function halts in __WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + USB-FS + UAC1, then enters the iso-IN feed loop forever.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the iso-IN feed loop forever.
On any HAL init failure the function halts in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
SystemInit set VTOR / FPU / priority grouping.

The application entry point Reset_Handler hands control to.

See file header.

Precondition
Boot init has completed.
The secure-boot library's BLXNS into NS image either failed or was skipped (the call site in ra8_trustzone_init is a no-op on host builds).
Postcondition
Diagnostic counter latched, CPU parked in a halt loop.
Function never returns.
Note
Single-threaded entry.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
On success g_eoh_chapters / g_eoh_crc hold the parsed results, the banner is emitted, and g_eoh_heartbeat advances once per frame.
On any failure g_eoh_err is non-zero and the CPU parks (no heartbeat).
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The chapters/ch0-CRC banner is emitted; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
On success the g_etoc_* result globals hold the parsed TOC values, the banner is emitted, and g_etoc_heartbeat advances once per frame.
On any failure g_etoc_err is non-zero and the CPU parks (no heartbeat).
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss; SystemInit set VTOR/FPU.
Postcondition
The shelf scans on the panel; taps open books, browse, and read.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The slab/arena/tile/vmem banner is emitted; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
On success the cache globals are latched and g_pc_heartbeat advances.
On any failure g_pc_err is non-zero and the CPU parks (no heartbeat).
Since
0.1.0

The application entry point Reset_Handler hands control to.

Profiles power modes once a second.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the profile + blink loop.
On any HAL hard error LED2 latches ON.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
The shared board boot files installed the vector table.
Postcondition
The demo has run once and its verdict banner is streaming steadily.
The CPU idles re-emitting the banner (or halts after a fatal init error).
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up the clocks, console, SPI, and SD card, then runs the shared ra8_io VFS round-trip over the SD-over-SPI block device. On success it prints the exact PASS banner the HIL runner and ra8_emulator smoke gate scrape for; on any failure it prints FAIL and parks the core.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On a clean run the CPU loops forever after the PASS banner.
On any failure the function prints FAIL and halts in WFI.
Note
Not thread-safe; this is the single-threaded app entry.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Initialises logging and the console, brings up the OSPI NOR volume, runs the erase-before-write round-trip, and prints a single PASS/FAIL verdict line over SCI8 before parking in an infinite loop.

Precondition
SystemInit configured VTOR / FPU / priority grouping.
The OSPI NOR array is present (modelled in ra8_emulator, real on silicon).
Postcondition
Exactly one PASS or FAIL verdict line has been queued on SCI8.
Control parks in an infinite loop; the function never returns.
Note
Single-threaded; runs to the park loop on the main stack.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The page-count + render-hash banner is emitted; the CPU loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The cal=OK / cal=SKIP result and the finger-free touchcal: ready sentinel are emitted; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The open=OK touch banner is emitted; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Both USB controllers' clocks and pins come up before the kernel so the workers only deal with stack bring-up.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR, FPU, priority grouping.
Postcondition
On clean entry the CPU stays in tx_kernel_enter forever.
On any HAL init failure the function halts in WFI.
Note
Single entry point; not re-entrant.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging and the clock tree, releases the Cortex-M33 (which then blinks LED1 via ra8_pcntr_set_output()), and idles. See the file header.

Precondition
SystemInit has completed core bring-up.
The M33 is held in reset by hardware until released here.
Postcondition
The M33 has been released and is blinking LED1.
This function never returns to its caller.
Note
Single-threaded; no RTOS on the M85 in this template.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
The application links ra8_c6link and ESP-hosted generated codecs.
No hardware validation is inferred from this function.
Postcondition
No c6link operation is attempted.
No network or storage state is modified.
Note
Single-threaded compile fixture.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, the clock tree, and the VCOM console, runs the cacheable-SRAM round-trip with the D-cache that SystemInit() enabled through ra8_cache_dcache_enable(), emits the matching PASS / FAIL banner over the console and ra8_log, then parks in WFI. Every byte the self-test touches runs with the L1 caches + MPU enabled by the shared boot (RA8_BOOT_ENABLE_CACHE_MPU + RA8_BOOT_CACHE_VIA_HAL).

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit enabled the MPU + I-cache + D-cache via the ra8_cache HAL.
Postcondition
Exactly one banner (PASS or FAIL) has been emitted.
The core is parked in WFI.
Note
Single-threaded; no RTOS and no IRQ sources in this template.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Publishes the mailbox, releases the Cortex-M33 into the emitter, yields until it signals done, validates the blob the M33 built, then logs the PASS/FAIL verdict and the chapter count read back from the blob. See the file header for the offload narrative.

Precondition
SystemInit has completed core bring-up.
The M33 is held inactive by hardware until released here.
Postcondition
The M33 has built a RABOOK1 blob and the M85 has validated it.
This function never returns to its caller.
Note
Single-threaded; no RTOS on the M85 in this example.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
On success the CPU heartbeats after epaper: PASS.
On any HAL error the console prints epaper: FAIL and the red LED latches on.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The chapters/toc/cover banner is emitted; CPU loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The reader loop runs forever, redrawing on each tap.
A page-1 banner is emitted once after the first render.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The cover-size / framebuffer-CRC banner is emitted; CPU loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The panel shows the reader screen and the input loop runs forever.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Publishes the mailbox, arms the IPC0 wake and configures the LPM block, releases the Cortex-M33 into the reader, waits for the first held page, logs the page-0 verdict, then runs the #150 mode-switch cycle – parking in low-power WFI and waking on the M33's page-turn pokes – before logging the handoff verdict and parking for good. See the file header for the narrative.

Precondition
SystemInit has completed core bring-up.
The M33 is held inactive by hardware until released here.
Postcondition
The M33 has rendered + re-rendered the held page and the M85 is parked.
This function never returns to its caller.
Note
Single-threaded; no RTOS on the M85 in this example.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The boot banner is emitted; the reader loop services taps forever.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up the timebase then measures forever.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the measure + blink loop forever.
On any HAL init failure the function halts in WFI.
Note
Never returns.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Arms the RIIC1 target and polls the dispatcher.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
The CPU stays in the dispatch poll loop forever.
On any fatal init error the CPU parks in riic_target_panic_halt.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On a clean run the PASS banner is printed and the CPU loops in WFI.
On any failure the function prints a FAIL line and halts.
Note
Not thread-safe; single-threaded app entry.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the read + print loop forever.
On any HAL hard error LED2 latches ON and the loop exits.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up the LIN commander then drives frames.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On clean entry the CPU stays in the LIN-frame + blink loop forever.
On any HAL init failure the function halts in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, "renders" page 0 into the shared mailbox, releases the Cortex-M33 into its hold loop, and parks the M85 in low-power WFI sleep. See the file header for the power-saving narrative.

Precondition
SystemInit has completed core bring-up.
The M33 is held inactive by hardware until released here.
Postcondition
The M33 owns the held page and the M85 is parked.
This function never returns to its caller.
Note
Single-threaded; no RTOS on the M85 in this example.
Since
0.1.0

The application entry point Reset_Handler hands control to.

The USB clock, pins, console, and the SD card all come up before the kernel so the worker only deals with USB stack bring-up.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR, FPU, priority grouping.
Postcondition
On clean entry the CPU stays in tx_kernel_enter forever.
On any HAL init failure the function halts in WFI.
Note
Single entry point; not re-entrant.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit configured VTOR / FPU.
Postcondition
On clean bring-up the CPU stays in the poll loop.
On any HAL init failure the function halts in WFI.
Note
Single entry point; not re-entrant.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler initialized static storage.
SystemInit configured VTOR, FPU, and priority grouping.
Postcondition
The startup banner is printed once.
Control enters ThreadX and never returns normally.
Note
The #707 freestanding contract is declared by ra8_boot_entry.h.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On a clean run the PASS banner is printed and the CPU heartbeats forever.
On any failure LED2 latches ON and the CPU parks.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, the clock tree, and the VCOM console, runs the three-step self-test (MPU enabled, canonical boot map, Device MMIO), emits the matching PASS / FAIL banner over the console and ra8_log, then parks in WFI.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit installed the boot map via ra8_mpu_apply_boot_map().
Postcondition
Exactly one banner (PASS or a step-specific FAIL) has been emitted.
The core is parked in WFI.
Note
Single-threaded; no RTOS and no IRQ sources in this template.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler initialised the C runtime; SystemInit ran.
The EK-RA8D2 J-Link OB VCOM console is attached for the banner.
Postcondition
The commit + rollback attempts have executed against extra-MRAM.
The verdict banner is emitted once per report cycle.
Note
Single entry point; not re-entrant.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Initialises logging + console, brings up the MRAM volume, runs the wear-levelling + power-cycle-survival flow, and prints a single PASS/FAIL verdict.

Precondition
SystemInit configured VTOR / FPU / priority grouping.
The extra-MRAM region is present (modelled in ra8_emulator, real on silicon).
Postcondition
Exactly one PASS or FAIL verdict line has been queued on SCI8.
Control parks in an infinite loop; the function never returns.
Note
Single-threaded; runs to the park loop on the main stack.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Initialises logging + console, brings up the MRAM volume, runs the program/erase round-trip, and prints a single PASS/FAIL verdict.

Precondition
SystemInit configured VTOR / FPU / priority grouping.
The extra-MRAM region is present (modelled in ra8_emulator, real on silicon).
Postcondition
Exactly one PASS or FAIL verdict line has been queued on SCI8.
Control parks in an infinite loop; the function never returns.
Note
Single-threaded; runs to the park loop on the main stack.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up the clocks, console, and SDHI bus pins, runs the native SD card identification, fills the payload, then runs the full ra8_io VFS round-trip over the native-SDHI block device. On success it prints the exact PASS banner the HIL runner and ra8_emulator smoke gate scrape for; on any failure it prints FAIL and parks the core.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On a clean run the CPU loops forever after the PASS banner.
On any failure the function prints FAIL and halts in WFI.
Note
Not thread-safe; this is the single-threaded app entry.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up the console and both stdio sinks, retargets the engine's stdio to the in-RAM capture sink, runs the two-backend swap, replays the RAM capture out of the UART, and prints a single PASS/FAIL verdict per abstraction before parking in an infinite loop.

Precondition
SystemInit configured VTOR / FPU / priority grouping.
The OSPI NOR array is present (modelled in ra8_emulator, real on silicon).
Postcondition
A PASS or FAIL verdict line has been queued on SCI8 for each abstraction.
Control parks in an infinite loop; the function never returns.
Note
Single-threaded; runs to the park loop on the main stack.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up the clocks, console, and SDHI bus pins, runs the native SD card identification, fills the payload, then writes + reads + compares one raw 512-byte block straight against ra8_sdcard. On success it prints the exact PASS banner; on any failure it prints FAIL and parks the core.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, FPU, and priority grouping.
Postcondition
On a clean run the CPU loops forever after the PASS banner.
On any failure the function prints FAIL and halts in WFI.
Note
Not thread-safe; this is the single-threaded app entry.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The whoami PASS banner is emitted; the CPU then loops in WFI.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up clocks + UART + RMII + RSIP, then ThreadX.

Precondition
Reset_Handler has copied .data and zeroed .bss.
Postcondition
On clean entry the kernel runs the worker thread once.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, the FPU and the priority grouping.
Postcondition
The banner was printed exactly once.
Control passed to ThreadX and never came back.
Note
Everything after tx_kernel_enter happens on ThreadX; the panic-halt below is reached only if the kernel refuses to start.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, the FPU and the priority grouping.
Postcondition
The banner and the resolved pin map were printed exactly once.
Control passed to ThreadX and never came back.
Note
Everything after tx_kernel_enter happens on ThreadX; the panic-halt below is reached only if the kernel refuses to start.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, the FPU and priority grouping.
Postcondition
The probe ran exactly once and printed its verdict.
The CPU stays in a slow heartbeat loop afterwards.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler has copied .data and zeroed .bss.
SystemInit has set VTOR, the FPU and the priority grouping.
Postcondition
The banner was printed exactly once.
Control passed to ThreadX and never came back.
Note
Everything after tx_kernel_enter runs on ThreadX; the panic-halt below is reached only if the kernel refuses to start.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Initializes and arms ADC_B, formats each successful channel sample without variadic I/O, emits the verdict, toggles LED1, and delays.

Precondition
Reset startup and SystemInit completed successfully.
The selected ADC channel matches the board analog connection.
Postcondition
Every PASS verdict follows a successful channel read.
Any read or LED failure leads to the terminal panic helper.
Note
Does not return during normal operation.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
On success the PASS banner is emitted; otherwise a FAIL line is.
The CPU parks in WFI (observable on ra8_emulator until its budget).
Since
0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, releases the Cortex-M33 (which then blinks LED1), and idles. See the file header for the teaching narrative.

Precondition
SystemInit has completed core bring-up.
The M33 is held in reset by hardware until released here.
Postcondition
The M33 has been released and is blinking LED1.
This function never returns to its caller.
Note
Single-threaded; no RTOS on the M85 in this template.
Since
0.1.0

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler copied .data and zeroed .bss.
SystemInit set VTOR / FPU / priority grouping.
Postcondition
The IDCODE/checks PASS banner is emitted; the CPU then loops in WFI.
Since
0.1.0

Definition at line 302 of file main.c.

References g_cac_heartbeat, g_cac_ok, internal_configure(), internal_panic_halt(), internal_sample(), internal_setup_or_halt(), k_cac_demo_period_ms, k_ra8_board_led1, k_ra8_board_led2, k_ra8_ok, ra8_board_led_toggle(), ra8_board_uart_console_write(), ra8_delay_ms(), ra8_isr_globals_enable(), s_cac_demo_bad_msg, and s_cac_demo_ok_msg.

Variable Documentation

◆ g_cac_count

volatile uint32_t g_cac_count = 0U

Raw CACNTBR count captured on the last successful measurement.

Note
Read externally only (HIL / board emulator).
Since
0.1.0

Definition at line 113 of file main.c.

Referenced by internal_sample().

◆ g_cac_heartbeat

volatile uint32_t g_cac_heartbeat = 0U

Bumps once per main-loop pass – liveness for headless probes.

Note
Read externally only.
Since
0.1.0

Definition at line 137 of file main.c.

Referenced by main().

◆ g_cac_ok

volatile uint32_t g_cac_ok = 0U

1 when the last measurement completed inside the window.

Note
Read externally only.
Since
0.1.0

Definition at line 121 of file main.c.

Referenced by main().

◆ g_cac_status

volatile uint32_t g_cac_status = 0U

Last CASTR snapshot (FERRF | MENDF | OVFF bits).

Note
Read externally only.
Since
0.1.0

Definition at line 129 of file main.c.

Referenced by internal_sample().

◆ s_cac_demo_bad_msg

const uint8_t s_cac_demo_bad_msg[] = "cac: meas=TIMEOUT-or-err ok=N\r\n"
static

Definition at line 105 of file main.c.

Referenced by main().

◆ s_cac_demo_ok_msg

const uint8_t s_cac_demo_ok_msg[] = "cac: meas=ok ferr=0 ovf=0 ok=Y\r\n"
static

Output line tags.

Definition at line 104 of file main.c.

Referenced by main().

◆ s_tag

const char* s_tag = "cac_demo"
static

Diagnostic / log tag.

Definition at line 64 of file main.c.