56typedef enum : uint32_t {
87static const uint8_t
k_msg_boot[] =
"smbus-demo: boot\r\n";
88static const uint8_t
k_msg_fail[] =
"smbus-demo: FAIL init\r\n";
89static const uint8_t
k_msg_open[] =
"smbus: FAIL open\r\n";
90static const uint8_t
k_msg_nak[] =
"smbus: NAK (no LSM6DSO)\r\n";
91static const uint8_t
k_msg_bad[] =
"smbus: mismatch\r\n";
97static void sd_print(
const uint8_t* msg, uint32_t len)
106 __asm__
volatile(
"bkpt #0");
108 __asm__
volatile(
"wfi");
117 const uint32_t lo = (uint32_t)value & (uint32_t)
k_sd_hex_mask;
135 uint32_t cpuclk0_hz = 0U;
196 uint32_t pclka_hz = 0U;
206 .pclka_hz = pclka_hz};
234 __asm__
volatile(
"wfi");
void main(void)
Secure fallback main entry point.
static const uint8_t k_msg_pre[]
static const uint8_t k_msg_ok[]
static const uint8_t k_msg_boot[]
static const uint8_t k_msg_open[]
static const uint8_t k_msg_fail[]
static const uint8_t k_msg_nak[]
static void sd_setup_or_halt(uint32_t *out_pclka_hz)
Bring up clocks/MSTP/time + the SCI8 console; halt on failure.
static const uint8_t k_msg_mid[]
static void sd_print(const uint8_t *msg, uint32_t len)
Emit a byte run on the SCI8 console.
static void sd_read_whoami_or_halt(uint8_t *out_a, uint8_t *out_b)
Read WHO_AM_I two ways over SMBus; halt on any failure.
static void sd_panic_halt(const uint8_t *msg, uint32_t len)
Print the fail banner and trap (ra8_emulator halts on the BKPT).
static const ra8_port_pin_t k_sd_pin_sda
MikroBUS SDA routed through the Pmod1 I2C side (SDA1).
static void sd_print_hex8(uint8_t value)
Print one byte as two upper-case hex digits.
static ra8_io_i2c_bus_t s_sd_bus
Bound I2C bus handle the SMBus layer's injected seam points at.
static const uint8_t k_msg_bad[]
static const ra8_port_pin_t k_sd_pin_scl
MikroBUS SCL routed through the Pmod1 I2C side (SCL1).
static ra8_err_t sd_pins_init(void)
Route the MikroBUS IIC SCL/SDA via PFS.
sd_consts_t
Console / bus / device knobs (no magic numbers).
@ k_sd_reg_whoami
WHO_AM_I register index.
@ k_sd_whoami_val
Expected WHO_AM_I value.
@ k_sd_hex_shift
Nibble shift for hex printing.
@ k_sd_dec_ten
Hex digit / decimal split.
@ k_sd_hex_mask
Low-nibble mask.
@ k_sd_uart_baud
Console baud.
@ k_sd_lsm_addr
LSM6DSO 7-bit address (SA0 high).
@ k_sd_bus_hz
IIC_B standard-mode bit rate.
Board-support layer for the Renesas EK-RA8D2 v1 evaluation kit.
@ k_ra8_board_mikrobus_iic_b_channel
RA8 board mikrobus iic b channel.
@ k_ra8_board_mikrobus_i2c_scl
J22.5 SCL (SW4-5 OFF) -> P512 SCL1.
@ k_ra8_board_mikrobus_i2c_sda
J22.6 SDA (SW4-5 OFF) -> P511 SDA1.
ra8_err_t ra8_board_uart_console_write(const uint8_t *data, size_t len)
Polled blocking write to the J-Link OB VCOM console.
ra8_err_t ra8_board_uart_console_init(uint32_t baud)
Configure SCI8 + PD02/PD03 as the debug-console UART.
Boot entry points shared between a vector table and its startup code.
High-level Clock Generation Circuit driver.
ra8_err_t ra8_cgc_get_clock_hz(ra8_clock_id_t id, uint32_t *out_hz)
Query the current frequency of a clock-tree domain.
@ k_ra8_clock_id_cpuclk0
Cortex-M85 CPUCLK0.
@ k_ra8_clock_id_pclka
PCLKA.
ra8_err_t ra8_cgc_init(void)
Configure the clock tree to a safe default.
Error Code Definitions for ra8-firmware.
@ k_ra8_err_hw_init_failed
Hardware peripheral failed to initialise.
@ k_ra8_ok
Success – operation completed with all postconditions satisfied.
ra8_err_codes_t ra8_err_t
Canonical error-return type used by every ra8-firmware API.
@ k_ra8_psel_iic
00111b: IIC / I3C controller-peripheral.
Injected I2C-bus seam consumed by Ring-3 I2C device drivers.
I3C Bus Interface driver – unified native-I3C + I2C-compat modes.
@ k_ra8_i3c_mode_i2c
Legacy I2C-compatibility controller.
ra8_err_t ra8_i3c_init(uint8_t channel, const ra8_i3c_cfg_t *cfg)
Initialise an I3C channel in the configured mode.
ra8_io I2C-bus facade – one controller-transfer vtable over thechip's two I2C implementations.
ra8_err_t ra8_io_i2c_bus_as_ops(const ra8_io_i2c_bus_t *bus, ra8_i2c_bus_ops_t *out)
Expose a bound bus through the Ring-3 seam ra8_i2c_bus_ops_t.
I3C I2C-compatibility backend binder for the ra8_io I2C-bus facade.
ra8_err_t ra8_io_i2c_bus_bind_i3c_compat(ra8_io_i2c_bus_t *bus, uint8_t channel)
Bind bus to I3C channel channel in I2C-compatibility mode.
NVIC + ICU IELSR allocator.
void ra8_isr_globals_enable(void)
Globally enable maskable interrupts (PRIMASK = 0).
Ref-counted Module Stop Control wrapper for the RA8D2.
ra8_err_t ra8_mstp_init(void)
Re-establish the ra8_mstp ref-count table from current hardware state.
ra8_port_pin_t
Packed (port << 8) | pin pin identifier.
High-level GPIO helpers on top of the PORT + PFS register layer.
ra8_err_t ra8_pfs_route_peripheral(ra8_port_pin_t pin, ra8_psel_t psel, const char *owner)
Route a pin to a non-IRQ peripheral function via PFS.PSEL.
SMBus 3.2 protocol layer over an injected I2C bus seam.
ra8_err_t ra8_smbus_init(const ra8_smbus_cfg_t *cfg)
Initialise the SMBus layer over the injected bus seam.
ra8_err_t ra8_smbus_send_byte(uint8_t target_7b, uint8_t data)
Send Byte transaction (SMBus 3.2 section 6.5.2).
ra8_err_t ra8_smbus_receive_byte(uint8_t target_7b, uint8_t *out_data)
Receive Byte transaction (SMBus 3.2 section 6.5.3).
ra8_err_t ra8_smbus_read_byte_data(uint8_t target_7b, uint8_t cmd, uint8_t *out_data)
Read Byte Data: register-indexed byte read (SMBus 3.2 sec 6.5.5).
SysTick-based tick counter, delay and timestamp helpers.
ra8_err_t ra8_time_init(uint32_t cpu_hz)
Initialise SysTick for a 1 kHz tick interrupt.
Caller-filled I2C controller-transfer seam (write / read / write-then-read).
Per-channel bring-up configuration for ra8_i3c_init.
Caller-allocated I2C-bus handle binding a backend to its context.
Configuration descriptor for ra8_smbus_init.