main.c

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#include <stdint.h>
 
#include "ra8_batt.h"
#include "ra8_board_ek_ra8d2.h"
#include "ra8_boot_entry.h"
#include "ra8_cgc.h"
#include "ra8_err.h"
#include "ra8_i2c_bus_ops.h"
#include "ra8_i3c.h"
#include "ra8_io_i2c_bus.h"
#include "ra8_io_i2c_bus_i3c_compat.h"
#include "ra8_isr.h"
#include "ra8_mstp.h"
#include "ra8_port_constants.h"
#include "ra8_port_utils.h"
#include "ra8_smbus.h"
#include "ra8_time.h"

typedef enum : uint32_t {
  k_bm_uart_baud = 115200U,
  k_bm_bus_hz = 100000U,
  k_bm_iic_chan = (uint32_t)k_ra8_board_mikrobus_iic_b_channel,
  k_bm_period_ms  = 1000U,
  k_bm_fg_addr    = 0x36U, 
  k_bm_reg_soc    = 0x04U, 
  k_bm_reg_crate  = 0x16U, 
  k_bm_sign_mask  = 0x80U, 
  k_bm_soc_max    = 100U,  
  k_bm_dec_ten    = 10U,   
  k_bm_dec_digits = 3U,    
} bm_consts_t;

static const ra8_port_pin_t k_bm_pin_scl = (ra8_port_pin_t)k_ra8_board_mikrobus_i2c_scl;
static const ra8_port_pin_t k_bm_pin_sda = (ra8_port_pin_t)k_ra8_board_mikrobus_i2c_sda;

static ra8_io_i2c_bus_t s_bm_bus;
 
static const uint8_t k_msg_boot[]     = "battery-monitor: boot\r\n";
static const uint8_t k_msg_fail[]     = "battery-monitor: FAIL init\r\n";
static const uint8_t k_msg_open[]     = "battery: FAIL open\r\n";
static const uint8_t k_msg_nak[]      = "battery: NAK (no fuel gauge)\r\n";
static const uint8_t k_msg_pre[]      = "battery: soc=";
static const uint8_t k_msg_pct[]      = "% chg=";
static const uint8_t k_msg_ok[]       = " PASS\r\n";
static const uint8_t k_msg_nag_low[]  = "battery: NAG LOW soc=";
static const uint8_t k_msg_nag_crit[] = "battery: NAG CRITICAL soc=";
static const uint8_t k_msg_nag_tail[] = "%\r\n";

volatile uint32_t g_bat_soc = 0U;

volatile uint32_t g_bat_chg = 0U;

volatile uint32_t g_bat_nag = 0U;

volatile uint32_t g_bat_heartbeat = 0U;

static void bm_print(const uint8_t* msg, uint32_t len)
{
  (void)ra8_board_uart_console_write(msg, (size_t)len);
}

static void bm_panic_halt(const uint8_t* msg, uint32_t len)
{
  bm_print(msg, len);
  __asm__ volatile("bkpt #0");
  while (1) {
    __asm__ volatile("wfi");
  }
}

static void bm_print_uint(uint32_t value)
{
  uint8_t  buf[k_bm_dec_digits];
  uint32_t n = 0U;
  if (value == 0U) {
    buf[n] = '0';
    n++;
  }
  while ((value > 0U) && (n < (uint32_t)k_bm_dec_digits)) {
    buf[n] = (uint8_t)('0' + (value % (uint32_t)k_bm_dec_ten));
    n++;
    value /= (uint32_t)k_bm_dec_ten;
  }
  for (uint32_t i = 0U; i < n; i++) {
    bm_print(&buf[n - 1U - i], 1U);
  }
}

static void bm_print_nag(ra8_batt_nag_t nag, uint8_t soc)
{
  if (nag == k_ra8_batt_nag_low) {
    bm_print(k_msg_nag_low, (uint32_t)sizeof(k_msg_nag_low) - 1U);
  } else if (nag == k_ra8_batt_nag_critical) {
    bm_print(k_msg_nag_crit, (uint32_t)sizeof(k_msg_nag_crit) - 1U);
  } else {
    return;
  }
  bm_print_uint((uint32_t)soc);
  bm_print(k_msg_nag_tail, (uint32_t)sizeof(k_msg_nag_tail) - 1U);
}

[[nodiscard]] static ra8_err_t bm_pins_init(void)
{
  if (ra8_pfs_route_peripheral(k_bm_pin_scl, k_ra8_psel_iic, "battery.scl1") != k_ra8_ok) {
    return k_ra8_err_hw_init_failed;
  }
  return ra8_pfs_route_peripheral(k_bm_pin_sda, k_ra8_psel_iic, "battery.sda1");
}

static void bm_setup_or_halt(uint32_t* out_pclka_hz)
{
  uint32_t cpuclk0_hz = 0U;
  if ((ra8_cgc_init() != k_ra8_ok) || (ra8_mstp_init() != k_ra8_ok)) {
    bm_panic_halt(k_msg_fail, (uint32_t)sizeof(k_msg_fail) - 1U);
  }
  if ((ra8_cgc_get_clock_hz(k_ra8_clock_id_cpuclk0, &cpuclk0_hz) != k_ra8_ok) ||
      (ra8_cgc_get_clock_hz(k_ra8_clock_id_pclka, out_pclka_hz) != k_ra8_ok)) {
    bm_panic_halt(k_msg_fail, (uint32_t)sizeof(k_msg_fail) - 1U);
  }
  if (ra8_time_init(cpuclk0_hz) != k_ra8_ok) {
    bm_panic_halt(k_msg_fail, (uint32_t)sizeof(k_msg_fail) - 1U);
  }
  if (bm_pins_init() != k_ra8_ok) {
    bm_panic_halt(k_msg_fail, (uint32_t)sizeof(k_msg_fail) - 1U);
  }
  if (ra8_board_uart_console_init((uint32_t)k_bm_uart_baud) != k_ra8_ok) {
    bm_panic_halt(k_msg_fail, (uint32_t)sizeof(k_msg_fail) - 1U);
  }
}

static void bm_read_or_halt(uint8_t* out_soc, uint8_t* out_chg)
{
  uint8_t soc = 0U;
  if (ra8_smbus_read_byte_data((uint8_t)k_bm_fg_addr, (uint8_t)k_bm_reg_soc, &soc) != k_ra8_ok) {
    bm_panic_halt(k_msg_nak, (uint32_t)sizeof(k_msg_nak) - 1U);
  }
  uint8_t crate_hi = 0U;
  if (ra8_smbus_read_byte_data((uint8_t)k_bm_fg_addr, (uint8_t)k_bm_reg_crate, &crate_hi) !=
      k_ra8_ok) {
    bm_panic_halt(k_msg_nak, (uint32_t)sizeof(k_msg_nak) - 1U);
  }
  *out_soc = (soc > (uint8_t)k_bm_soc_max) ? (uint8_t)k_bm_soc_max : soc;
  *out_chg = ((crate_hi & (uint8_t)k_bm_sign_mask) == 0U) ? 1U : 0U;
}
 
void main(void)
{
  uint32_t pclka_hz = 0U;
  bm_setup_or_halt(&pclka_hz);
  ra8_isr_globals_enable();
  bm_print(k_msg_boot, (uint32_t)sizeof(k_msg_boot) - 1U);
 
  /* App-owned bus bring-up: IIC_B in I2C-compat mode, bound through the
   * ra8_io facade into the SMBus layer's injected seam. A future board
   * revision that moves the bus onto a RIIC channel only swaps the bind. */
  const ra8_i3c_cfg_t iic_cfg = {.mode     = k_ra8_i3c_mode_i2c,
                                 .bus_hz   = (uint32_t)k_bm_bus_hz,
                                 .pclka_hz = pclka_hz};
  ra8_i2c_bus_ops_t   bus_ops = {};
  if (ra8_i3c_init((uint8_t)k_bm_iic_chan, &iic_cfg) != k_ra8_ok) {
    bm_panic_halt(k_msg_open, (uint32_t)sizeof(k_msg_open) - 1U);
  }
  if (ra8_io_i2c_bus_bind_i3c_compat(&s_bm_bus, (uint8_t)k_bm_iic_chan) != k_ra8_ok) {
    bm_panic_halt(k_msg_open, (uint32_t)sizeof(k_msg_open) - 1U);
  }
  if (ra8_io_i2c_bus_as_ops(&s_bm_bus, &bus_ops) != k_ra8_ok) {
    bm_panic_halt(k_msg_open, (uint32_t)sizeof(k_msg_open) - 1U);
  }
 
  const ra8_smbus_cfg_t cfg = {.bus = bus_ops, .pec_enabled = false};
  if (ra8_smbus_init(&cfg) != k_ra8_ok) {
    bm_panic_halt(k_msg_open, (uint32_t)sizeof(k_msg_open) - 1U);
  }
 
  ra8_batt_monitor_t nag_mon;
  if (ra8_batt_monitor_init(&nag_mon) != k_ra8_ok) {
    bm_panic_halt(k_msg_fail, (uint32_t)sizeof(k_msg_fail) - 1U);
  }
 
  while (1) {
    uint8_t soc = 0U;
    uint8_t chg = 0U;
    bm_read_or_halt(&soc, &chg);
    g_bat_soc = (uint32_t)soc;
    g_bat_chg = (uint32_t)chg;
 
    bm_print(k_msg_pre, (uint32_t)sizeof(k_msg_pre) - 1U);
    bm_print_uint((uint32_t)soc);
    bm_print(k_msg_pct, (uint32_t)sizeof(k_msg_pct) - 1U);
    bm_print((chg != 0U) ? (const uint8_t*)"Y" : (const uint8_t*)"N", 1U);
    bm_print(k_msg_ok, (uint32_t)sizeof(k_msg_ok) - 1U);
 
    /* Fold the reading into the nag policy: a one-shot LOW / CRITICAL line
     * prints on the descent into each band (edge-triggered, see ra8_batt). */
    ra8_batt_nag_t nag = k_ra8_batt_nag_none;
    if (ra8_batt_update(&nag_mon, soc, (chg != 0U), &nag) == k_ra8_ok) {
      g_bat_nag = (uint32_t)nag;
      bm_print_nag(nag, soc);
    }
 
    ++g_bat_heartbeat;
    ra8_delay_ms((uint32_t)k_bm_period_ms);
  }
  bm_panic_halt(k_msg_fail, (uint32_t)sizeof(k_msg_fail) - 1U);
}