ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
Loading...
Searching...
No Matches
r_etha_regs_t Struct Reference

Full ETHA per-port register window (HUM Ch 32, FSP R_ETHA0_Type). More...

#include <ra8_etha_regs.h>

Data Fields

volatile uint32_t EAMC
 +0x0000 Mode command.
volatile uint32_t EAMS
 +0x0004 Mode status.
volatile uint32_t reserved08
 +0x0008 Reserved.
volatile uint32_t reserved0C
 +0x000C Reserved.
volatile uint32_t EAIRC
 +0x0010 IPV remap (8x 3-bit fields).
volatile uint32_t EATDQSC
 +0x0014 TX desc queue security cfg.
volatile uint32_t EATDQC
 +0x0018 TX desc queue control.
volatile uint32_t EATDQAC
 +0x001C TX desc queue arbitration.
volatile uint32_t EATPEC
 +0x0020 TX preemption config (802.3br).
volatile uint32_t reserved24 [k_ra8_etha_rsv_words_eatpec_to_eatmfsc]
 +0x0024..0x003F Reserved.
volatile uint32_t EATMFSC [8]
 +0x0040..0x005F Per-class max frame.
volatile uint32_t EATDQDC [8]
 +0x0060..0x007F Per-class queue depth.
volatile uint32_t EATDQM [8]
 +0x0080..0x009F Per-class queue mon.
volatile uint32_t EATDQMLM [8]
 +0x00A0..0x00BF Per-class peak level.
volatile uint32_t reservedC0 [16]
 +0x00C0..0x00FF Reserved.
volatile uint32_t EACTQC
 +0x0100 Cut-through queue config.
volatile uint32_t EACTDQDC
 +0x0104 Cut-through queue depth.
volatile uint32_t EACTDQM
 +0x0108 Cut-through queue monitor.
volatile uint32_t EACTDQMLM
 +0x010C Cut-through max queue level.
volatile uint32_t reserved110 [8]
 +0x0110..0x012F Reserved.
volatile uint32_t EAVCC
 +0x0130 VLAN control configuration.
volatile uint32_t EAVTC
 +0x0134 VLAN tag (C+S) configuration.
volatile uint32_t EARTFC
 +0x0138 RX tag filter configuration.
volatile uint32_t reserved13C [k_ra8_etha_rsv_words_eartfc_to_eacaec]
 +0x013C..0x01FF Reserved.
volatile uint32_t EACAEC
 +0x0200 CBS admin enable.
volatile uint32_t EACC
 +0x0204 CBS configuration.
volatile uint32_t reserved208 [6]
 +0x0208..0x021F Reserved.
volatile uint32_t EACAIVC [8]
 +0x0220..0x023F CBS admin increment.
volatile uint32_t EACAULC [8]
 +0x0240..0x025F CBS admin upper lim.
volatile uint32_t EACOEM
 +0x0260 CBS oper enable monitor.
volatile uint32_t reserved264 [k_ra8_etha_rsv_words_eacoem_to_eacoivm]
 +0x0264..0x027F Reserved.
volatile uint32_t EACOIVM [8]
 +0x0280..0x029F CBS oper increment mon.
volatile uint32_t EACOULM [8]
 +0x02A0..0x02BF CBS oper upper limit.
volatile uint32_t EACGSM
 +0x02C0 CBS gate state monitor.
volatile uint32_t reserved2C4 [k_ra8_etha_rsv_words_eacgsm_to_eatasc]
 +0x02C4..0x02FF Reserved.
volatile uint32_t EATASC
 +0x0300 TAS configuration.
volatile uint32_t EATASIGSC
 +0x0304 TAS initial gate state cfg.
volatile uint32_t reserved308 [6]
 +0x0308..0x031F Reserved.
volatile uint32_t EATASENC [8]
 +0x0320..0x033F TAS entry-num cfg.
volatile uint32_t EATASCTENC
 +0x0340 TAS cut-through entry cfg.
volatile uint32_t reserved344 [k_ra8_etha_rsv_words_eatasctenc_gap]
 +0x0344..0x035F Reserved.
volatile uint32_t EATASENM [8]
 +0x0360..0x037F TAS entry-number mon.
volatile uint32_t EATASCTENM
 +0x0380 TAS cut-through entry mon.
volatile uint32_t reserved384 [k_ra8_etha_rsv_words_eatasctenm_gap]
 +0x0384..0x039F Reserved.
volatile uint32_t EATASCSTC0
 +0x03A0 TAS cycle start time cfg lo.
volatile uint32_t EATASCSTC1
 +0x03A4 TAS cycle start time cfg hi.
volatile uint32_t EATASCSTM0
 +0x03A8 TAS cycle start time mon lo.
volatile uint32_t EATASCSTM1
 +0x03AC TAS cycle start time mon hi.
volatile uint32_t EATASCTC
 +0x03B0 TAS cycle time configuration.
volatile uint32_t EATASCTM
 +0x03B4 TAS cycle time monitor.
volatile uint32_t reserved3B8 [2]
 +0x03B8..0x03BF Reserved.
volatile uint32_t EATASGL0
 +0x03C0 TAS gate learn 0.
volatile uint32_t EATASGL1
 +0x03C4 TAS gate learn 1.
volatile uint32_t EATASGLR
 +0x03C8 TAS gate learn result.
volatile uint32_t reserved3CC
 +0x03CC Reserved.
volatile uint32_t EATASGR
 +0x03D0 TAS gate read.
volatile uint32_t EATASGRR
 +0x03D4 TAS gate read result.
volatile uint32_t reserved3D8 [2]
 +0x03D8..0x03DF Reserved.
volatile uint32_t EATASHCC
 +0x03E0 TAS hardware calibration cfg.
volatile uint32_t EATASRIRM
 +0x03E4 TAS RAM-init register monitor.
volatile uint32_t EATASSM
 +0x03E8 TAS status monitor.
volatile uint32_t reserved3EC [k_ra8_etha_rsv_words_eatassm_to_eausm]
 +0x03EC..0x03FF Reserved.
volatile uint32_t EAUSMFSECN
 +0x0400 Switch min frame size err cnt.
volatile uint32_t EATFECN
 +0x0404 Tag filter error counter.
volatile uint32_t EAFSECN
 +0x0408 Frame size error counter.
volatile uint32_t EADQOECN
 +0x040C Queue overflow error counter.
volatile uint32_t EADQSECN
 +0x0410 Queue security error counter.
volatile uint32_t reserved414 [k_ra8_etha_rsv_words_eadqsecn_to_eaeis]
 +0x0414..0x04FF Reserved.
volatile uint32_t EAEIS0
 +0x0500 Error interrupt status 0.
volatile uint32_t EAEIE0
 +0x0504 Error interrupt enable 0.
volatile uint32_t EAEID0
 +0x0508 Error interrupt disable 0.
volatile uint32_t reserved50C
 +0x050C Reserved.
volatile uint32_t EAEIS1
 +0x0510 Error interrupt status 1.
volatile uint32_t EAEIE1
 +0x0514 Error interrupt enable 1.
volatile uint32_t EAEID1
 +0x0518 Error interrupt disable 1.
volatile uint32_t reserved51C
 +0x051C Reserved.
volatile uint32_t EAEIS2
 +0x0520 Error interrupt status 2.
volatile uint32_t EAEIE2
 +0x0524 Error interrupt enable 2.
volatile uint32_t EAEID2
 +0x0528 Error interrupt disable 2.

Detailed Description

Full ETHA per-port register window (HUM Ch 32, FSP R_ETHA0_Type).

Sized to 0x584 bytes to match the FSP CMSIS layout exactly. Reserved gaps are kept as reservedNN placeholders so structure offset arithmetic matches the chip.

cppcheck cannot see tests/ so it flags every field as unused; each member is accessed via ra8_etha(port) in libs/ra8_hal/src/ra8_etha.c.

Definition at line 415 of file ra8_etha_regs.h.

Field Documentation

◆ EACAEC

volatile uint32_t r_etha_regs_t::EACAEC

+0x0200 CBS admin enable.

Definition at line 442 of file ra8_etha_regs.h.

Referenced by ra8_etha_configure_cbs().

◆ EACAIVC

volatile uint32_t r_etha_regs_t::EACAIVC[8]

+0x0220..0x023F CBS admin increment.

Definition at line 445 of file ra8_etha_regs.h.

Referenced by ra8_etha_configure_cbs().

◆ EACAULC

volatile uint32_t r_etha_regs_t::EACAULC[8]

+0x0240..0x025F CBS admin upper lim.

Definition at line 446 of file ra8_etha_regs.h.

Referenced by ra8_etha_configure_cbs().

◆ EACC

volatile uint32_t r_etha_regs_t::EACC

+0x0204 CBS configuration.

Definition at line 443 of file ra8_etha_regs.h.

Referenced by ra8_etha_configure_cbs().

◆ EACGSM

volatile uint32_t r_etha_regs_t::EACGSM

+0x02C0 CBS gate state monitor.

Definition at line 452 of file ra8_etha_regs.h.

Referenced by ra8_etha_get_cbs_state().

◆ EACOEM

volatile uint32_t r_etha_regs_t::EACOEM

+0x0260 CBS oper enable monitor.

Definition at line 447 of file ra8_etha_regs.h.

Referenced by ra8_etha_get_cbs_state().

◆ EACOIVM

volatile uint32_t r_etha_regs_t::EACOIVM[8]

+0x0280..0x029F CBS oper increment mon.

Definition at line 450 of file ra8_etha_regs.h.

Referenced by ra8_etha_get_cbs_state().

◆ EACOULM

volatile uint32_t r_etha_regs_t::EACOULM[8]

+0x02A0..0x02BF CBS oper upper limit.

Definition at line 451 of file ra8_etha_regs.h.

Referenced by ra8_etha_get_cbs_state().

◆ EACTDQDC

volatile uint32_t r_etha_regs_t::EACTDQDC

+0x0104 Cut-through queue depth.

Definition at line 433 of file ra8_etha_regs.h.

Referenced by ra8_etha_configure_cut_through().

◆ EACTDQM

volatile uint32_t r_etha_regs_t::EACTDQM

+0x0108 Cut-through queue monitor.

Definition at line 434 of file ra8_etha_regs.h.

◆ EACTDQMLM

volatile uint32_t r_etha_regs_t::EACTDQMLM

+0x010C Cut-through max queue level.

Definition at line 435 of file ra8_etha_regs.h.

◆ EACTQC

volatile uint32_t r_etha_regs_t::EACTQC

+0x0100 Cut-through queue config.

Definition at line 432 of file ra8_etha_regs.h.

Referenced by ra8_etha_configure_cut_through().

◆ EADQOECN

volatile uint32_t r_etha_regs_t::EADQOECN

+0x040C Queue overflow error counter.

Definition at line 488 of file ra8_etha_regs.h.

Referenced by ra8_etha_clear_stats(), and ra8_etha_read_stats().

◆ EADQSECN

volatile uint32_t r_etha_regs_t::EADQSECN

+0x0410 Queue security error counter.

Definition at line 489 of file ra8_etha_regs.h.

Referenced by ra8_etha_clear_stats(), and ra8_etha_read_stats().

◆ EAEID0

volatile uint32_t r_etha_regs_t::EAEID0

+0x0508 Error interrupt disable 0.

Definition at line 494 of file ra8_etha_regs.h.

Referenced by ra8_etha_clear_status(), ra8_etha_dispatch(), and ra8_etha_init().

◆ EAEID1

volatile uint32_t r_etha_regs_t::EAEID1

+0x0518 Error interrupt disable 1.

Definition at line 498 of file ra8_etha_regs.h.

Referenced by ra8_etha_clear_status(), ra8_etha_dispatch(), and ra8_etha_init().

◆ EAEID2

volatile uint32_t r_etha_regs_t::EAEID2

+0x0528 Error interrupt disable 2.

Definition at line 502 of file ra8_etha_regs.h.

Referenced by ra8_etha_clear_status(), ra8_etha_dispatch(), and ra8_etha_init().

◆ EAEIE0

volatile uint32_t r_etha_regs_t::EAEIE0

+0x0504 Error interrupt enable 0.

Definition at line 493 of file ra8_etha_regs.h.

Referenced by ra8_etha_deinit(), ra8_etha_disable_irq(), ra8_etha_enable_irq(), and ra8_etha_init().

◆ EAEIE1

volatile uint32_t r_etha_regs_t::EAEIE1

+0x0514 Error interrupt enable 1.

Definition at line 497 of file ra8_etha_regs.h.

Referenced by ra8_etha_deinit(), ra8_etha_disable_irq(), ra8_etha_enable_irq(), and ra8_etha_init().

◆ EAEIE2

volatile uint32_t r_etha_regs_t::EAEIE2

+0x0524 Error interrupt enable 2.

Definition at line 501 of file ra8_etha_regs.h.

Referenced by ra8_etha_deinit(), ra8_etha_disable_irq(), ra8_etha_enable_irq(), and ra8_etha_init().

◆ EAEIS0

volatile uint32_t r_etha_regs_t::EAEIS0

+0x0500 Error interrupt status 0.

Definition at line 492 of file ra8_etha_regs.h.

Referenced by ra8_etha_clear_status(), ra8_etha_dispatch(), and ra8_etha_get_status().

◆ EAEIS1

volatile uint32_t r_etha_regs_t::EAEIS1

+0x0510 Error interrupt status 1.

Definition at line 496 of file ra8_etha_regs.h.

Referenced by ra8_etha_clear_status(), ra8_etha_dispatch(), and ra8_etha_get_status().

◆ EAEIS2

volatile uint32_t r_etha_regs_t::EAEIS2

+0x0520 Error interrupt status 2.

Definition at line 500 of file ra8_etha_regs.h.

Referenced by ra8_etha_clear_status(), ra8_etha_dispatch(), and ra8_etha_get_status().

◆ EAFSECN

volatile uint32_t r_etha_regs_t::EAFSECN

+0x0408 Frame size error counter.

Definition at line 487 of file ra8_etha_regs.h.

Referenced by ra8_etha_clear_stats(), and ra8_etha_read_stats().

◆ EAIRC

volatile uint32_t r_etha_regs_t::EAIRC

+0x0010 IPV remap (8x 3-bit fields).

Definition at line 420 of file ra8_etha_regs.h.

Referenced by ra8_etha_set_ipv_remap().

◆ EAMC

volatile uint32_t r_etha_regs_t::EAMC

+0x0000 Mode command.

Definition at line 416 of file ra8_etha_regs.h.

Referenced by internal_etha_to_operation(), ra8_etha_deinit(), ra8_etha_enter_stop(), ra8_etha_exit_stop(), ra8_etha_init(), ra8_etha_reset(), and ra8_etha_set_mode().

◆ EAMS

volatile uint32_t r_etha_regs_t::EAMS

+0x0004 Mode status.

Definition at line 417 of file ra8_etha_regs.h.

Referenced by internal_etha_to_operation(), internal_etha_wait_for_mode(), and ra8_etha_get_status().

◆ EARTFC

volatile uint32_t r_etha_regs_t::EARTFC

+0x0138 RX tag filter configuration.

Definition at line 439 of file ra8_etha_regs.h.

Referenced by ra8_etha_set_rx_tag_filter().

◆ EATASC

volatile uint32_t r_etha_regs_t::EATASC

+0x0300 TAS configuration.

Definition at line 455 of file ra8_etha_regs.h.

Referenced by ra8_etha_enable_tas(), and ra8_etha_set_tas_schedule().

◆ EATASCSTC0

volatile uint32_t r_etha_regs_t::EATASCSTC0

+0x03A0 TAS cycle start time cfg lo.

Definition at line 466 of file ra8_etha_regs.h.

Referenced by internal_tas_program_timing().

◆ EATASCSTC1

volatile uint32_t r_etha_regs_t::EATASCSTC1

+0x03A4 TAS cycle start time cfg hi.

Definition at line 467 of file ra8_etha_regs.h.

Referenced by internal_tas_program_timing().

◆ EATASCSTM0

volatile uint32_t r_etha_regs_t::EATASCSTM0

+0x03A8 TAS cycle start time mon lo.

Definition at line 468 of file ra8_etha_regs.h.

◆ EATASCSTM1

volatile uint32_t r_etha_regs_t::EATASCSTM1

+0x03AC TAS cycle start time mon hi.

Definition at line 469 of file ra8_etha_regs.h.

◆ EATASCTC

volatile uint32_t r_etha_regs_t::EATASCTC

+0x03B0 TAS cycle time configuration.

Definition at line 470 of file ra8_etha_regs.h.

Referenced by internal_tas_program_timing().

◆ EATASCTENC

volatile uint32_t r_etha_regs_t::EATASCTENC

+0x0340 TAS cut-through entry cfg.

Definition at line 459 of file ra8_etha_regs.h.

◆ EATASCTENM

volatile uint32_t r_etha_regs_t::EATASCTENM

+0x0380 TAS cut-through entry mon.

Definition at line 463 of file ra8_etha_regs.h.

◆ EATASCTM

volatile uint32_t r_etha_regs_t::EATASCTM

+0x03B4 TAS cycle time monitor.

Definition at line 471 of file ra8_etha_regs.h.

Referenced by ra8_etha_get_status().

◆ EATASENC

volatile uint32_t r_etha_regs_t::EATASENC[8]

+0x0320..0x033F TAS entry-num cfg.

Definition at line 458 of file ra8_etha_regs.h.

Referenced by internal_tas_program_timing().

◆ EATASENM

volatile uint32_t r_etha_regs_t::EATASENM[8]

+0x0360..0x037F TAS entry-number mon.

Definition at line 462 of file ra8_etha_regs.h.

◆ EATASGL0

volatile uint32_t r_etha_regs_t::EATASGL0

+0x03C0 TAS gate learn 0.

Definition at line 473 of file ra8_etha_regs.h.

Referenced by internal_tas_learn_entry().

◆ EATASGL1

volatile uint32_t r_etha_regs_t::EATASGL1

+0x03C4 TAS gate learn 1.

Definition at line 474 of file ra8_etha_regs.h.

Referenced by internal_tas_learn_entry().

◆ EATASGLR

volatile uint32_t r_etha_regs_t::EATASGLR

+0x03C8 TAS gate learn result.

Definition at line 475 of file ra8_etha_regs.h.

Referenced by internal_tas_learn_entry().

◆ EATASGR

volatile uint32_t r_etha_regs_t::EATASGR

+0x03D0 TAS gate read.

Definition at line 477 of file ra8_etha_regs.h.

Referenced by ra8_etha_read_tas_entry().

◆ EATASGRR

volatile uint32_t r_etha_regs_t::EATASGRR

+0x03D4 TAS gate read result.

Definition at line 478 of file ra8_etha_regs.h.

Referenced by ra8_etha_read_tas_entry().

◆ EATASHCC

volatile uint32_t r_etha_regs_t::EATASHCC

+0x03E0 TAS hardware calibration cfg.

Definition at line 480 of file ra8_etha_regs.h.

◆ EATASIGSC

volatile uint32_t r_etha_regs_t::EATASIGSC

+0x0304 TAS initial gate state cfg.

Definition at line 456 of file ra8_etha_regs.h.

Referenced by internal_tas_program_timing().

◆ EATASRIRM

volatile uint32_t r_etha_regs_t::EATASRIRM

+0x03E4 TAS RAM-init register monitor.

Definition at line 481 of file ra8_etha_regs.h.

Referenced by ra8_etha_tas_ram_reset().

◆ EATASSM

volatile uint32_t r_etha_regs_t::EATASSM

+0x03E8 TAS status monitor.

Definition at line 482 of file ra8_etha_regs.h.

◆ EATDQAC

volatile uint32_t r_etha_regs_t::EATDQAC

+0x001C TX desc queue arbitration.

Definition at line 423 of file ra8_etha_regs.h.

Referenced by ra8_etha_set_queue_arb().

◆ EATDQC

volatile uint32_t r_etha_regs_t::EATDQC

+0x0018 TX desc queue control.

Definition at line 422 of file ra8_etha_regs.h.

◆ EATDQDC

volatile uint32_t r_etha_regs_t::EATDQDC[8]

+0x0060..0x007F Per-class queue depth.

Definition at line 428 of file ra8_etha_regs.h.

Referenced by ra8_etha_descriptor_ring_init(), and ra8_etha_set_queue_depth().

◆ EATDQM

volatile uint32_t r_etha_regs_t::EATDQM[8]

+0x0080..0x009F Per-class queue mon.

Definition at line 429 of file ra8_etha_regs.h.

Referenced by ra8_etha_get_queue_level().

◆ EATDQMLM

volatile uint32_t r_etha_regs_t::EATDQMLM[8]

+0x00A0..0x00BF Per-class peak level.

Definition at line 430 of file ra8_etha_regs.h.

Referenced by ra8_etha_get_queue_level().

◆ EATDQSC

volatile uint32_t r_etha_regs_t::EATDQSC

+0x0014 TX desc queue security cfg.

Definition at line 421 of file ra8_etha_regs.h.

◆ EATFECN

volatile uint32_t r_etha_regs_t::EATFECN

+0x0404 Tag filter error counter.

Definition at line 486 of file ra8_etha_regs.h.

Referenced by ra8_etha_clear_stats(), and ra8_etha_read_stats().

◆ EATMFSC

volatile uint32_t r_etha_regs_t::EATMFSC[8]

+0x0040..0x005F Per-class max frame.

Definition at line 427 of file ra8_etha_regs.h.

Referenced by ra8_etha_set_max_frame_size().

◆ EATPEC

volatile uint32_t r_etha_regs_t::EATPEC

+0x0020 TX preemption config (802.3br).

Definition at line 424 of file ra8_etha_regs.h.

Referenced by ra8_etha_set_preemption().

◆ EAUSMFSECN

volatile uint32_t r_etha_regs_t::EAUSMFSECN

+0x0400 Switch min frame size err cnt.

Definition at line 485 of file ra8_etha_regs.h.

Referenced by ra8_etha_clear_stats(), and ra8_etha_read_stats().

◆ EAVCC

volatile uint32_t r_etha_regs_t::EAVCC

+0x0130 VLAN control configuration.

Definition at line 437 of file ra8_etha_regs.h.

Referenced by ra8_etha_set_vlan_mode().

◆ EAVTC

volatile uint32_t r_etha_regs_t::EAVTC

+0x0134 VLAN tag (C+S) configuration.

Definition at line 438 of file ra8_etha_regs.h.

Referenced by ra8_etha_set_vlan_tag().

◆ reserved08

volatile uint32_t r_etha_regs_t::reserved08

+0x0008 Reserved.

Definition at line 418 of file ra8_etha_regs.h.

◆ reserved0C

volatile uint32_t r_etha_regs_t::reserved0C

+0x000C Reserved.

Definition at line 419 of file ra8_etha_regs.h.

◆ reserved110

volatile uint32_t r_etha_regs_t::reserved110[8]

+0x0110..0x012F Reserved.

Definition at line 436 of file ra8_etha_regs.h.

◆ reserved13C

volatile uint32_t r_etha_regs_t::reserved13C[k_ra8_etha_rsv_words_eartfc_to_eacaec]

+0x013C..0x01FF Reserved.

Definition at line 441 of file ra8_etha_regs.h.

◆ reserved208

volatile uint32_t r_etha_regs_t::reserved208[6]

+0x0208..0x021F Reserved.

Definition at line 444 of file ra8_etha_regs.h.

◆ reserved24

volatile uint32_t r_etha_regs_t::reserved24[k_ra8_etha_rsv_words_eatpec_to_eatmfsc]

+0x0024..0x003F Reserved.

Definition at line 425 of file ra8_etha_regs.h.

◆ reserved264

volatile uint32_t r_etha_regs_t::reserved264[k_ra8_etha_rsv_words_eacoem_to_eacoivm]

+0x0264..0x027F Reserved.

Definition at line 448 of file ra8_etha_regs.h.

◆ reserved2C4

volatile uint32_t r_etha_regs_t::reserved2C4[k_ra8_etha_rsv_words_eacgsm_to_eatasc]

+0x02C4..0x02FF Reserved.

Definition at line 454 of file ra8_etha_regs.h.

◆ reserved308

volatile uint32_t r_etha_regs_t::reserved308[6]

+0x0308..0x031F Reserved.

Definition at line 457 of file ra8_etha_regs.h.

◆ reserved344

volatile uint32_t r_etha_regs_t::reserved344[k_ra8_etha_rsv_words_eatasctenc_gap]

+0x0344..0x035F Reserved.

Definition at line 461 of file ra8_etha_regs.h.

◆ reserved384

volatile uint32_t r_etha_regs_t::reserved384[k_ra8_etha_rsv_words_eatasctenm_gap]

+0x0384..0x039F Reserved.

Definition at line 465 of file ra8_etha_regs.h.

◆ reserved3B8

volatile uint32_t r_etha_regs_t::reserved3B8[2]

+0x03B8..0x03BF Reserved.

Definition at line 472 of file ra8_etha_regs.h.

◆ reserved3CC

volatile uint32_t r_etha_regs_t::reserved3CC

+0x03CC Reserved.

Definition at line 476 of file ra8_etha_regs.h.

◆ reserved3D8

volatile uint32_t r_etha_regs_t::reserved3D8[2]

+0x03D8..0x03DF Reserved.

Definition at line 479 of file ra8_etha_regs.h.

◆ reserved3EC

volatile uint32_t r_etha_regs_t::reserved3EC[k_ra8_etha_rsv_words_eatassm_to_eausm]

+0x03EC..0x03FF Reserved.

Definition at line 483 of file ra8_etha_regs.h.

◆ reserved414

volatile uint32_t r_etha_regs_t::reserved414[k_ra8_etha_rsv_words_eadqsecn_to_eaeis]

+0x0414..0x04FF Reserved.

Definition at line 491 of file ra8_etha_regs.h.

◆ reserved50C

volatile uint32_t r_etha_regs_t::reserved50C

+0x050C Reserved.

Definition at line 495 of file ra8_etha_regs.h.

◆ reserved51C

volatile uint32_t r_etha_regs_t::reserved51C

+0x051C Reserved.

Definition at line 499 of file ra8_etha_regs.h.

◆ reservedC0

volatile uint32_t r_etha_regs_t::reservedC0[16]

+0x00C0..0x00FF Reserved.

Definition at line 431 of file ra8_etha_regs.h.

The documentation for this struct was generated from the following file: