50static const char*
s_tag =
"ETH";
159typedef enum : uint32_t {
237 uint16_t anlpar = 0U;
415 out_status->
bmsr = bmsr;
444 if (out_status->
link_up == 0U) {
static const char * s_tag
Logging / check tag.
Annotation-attribute framework macros for ra8-firmware.
#define RA8_INTERNAL
Marker that a function is intended to be static (file-local).
Validation and Error-Checking Macros for ra8-firmware.
#define RA8_RETURN_ON_ERROR(err, tag, message)
Early return on error, propagating the code upward.
#define RA8_CHECK_NULL_PTR(ptr, tag, message)
Reject nullptr pointer, returning k_ra8_err_null_ptr.
Error Code Definitions for ra8-firmware.
@ k_ra8_err_not_initialized
Module not initialized – _init() not yet called successfully.
@ k_ra8_ok
Success – operation completed with all postconditions satisfied.
ra8_err_codes_t ra8_err_t
Canonical error-return type used by every ra8-firmware API.
ra8_rmac_port_t priv_ra8_eth_channel_to_port(uint8_t channel)
Map a logical channel index to an RMAC port identifier.
ra8_eth_state_t s_eth_state
Singleton NIC runtime state.
bool g_eth_mac_speed_resynced
Latch – true once ra8_eth_link_status has re-programmed MPIC.LSC / MPIC.PIPP to match the PHY's negot...
Ethernet Switch Module (ESWM) + frame TX/RX driver.
Cross-TU shared surface for the ra8_eth driver split.
volatile uint16_t g_ra8_eth_phy_bmsr_after_wait
BMSR snapshot AFTER the auto-neg wait.
@ k_ra8_eth_phy_bmsr_link_up
BMSR.LINK_STATUS bit 2.
@ k_ra8_eth_phy_bmcr_duplex
BMCR.DUPLEX_MODE bit 8.
@ k_ra8_eth_phy_anlpar_10h
ANLPAR bit 5: 10BASE-T.
@ k_ra8_eth_phy_addr_default
EK-RA8D2 PHY MDC address.
@ k_ra8_eth_phy_gbsr_1000h
GBSR bit 10: 1000BASE-T HD.
@ k_ra8_eth_phy_speed_100
100 Mbps.
@ k_ra8_eth_phy_reg_anlpar
ANLPAR (10/100 link partner).
@ k_ra8_eth_phy_bmcr_speed100
BMCR.SPEED_SELECT bit 13.
@ k_ra8_eth_phy_reg_bmcr
BMCR (basic mode control).
@ k_ra8_eth_phy_gbsr_1000f
GBSR bit 11: 1000BASE-T FD.
@ k_ra8_eth_phy_reg_gbsr
GBSR (1G link-partner ability).
@ k_ra8_eth_phy_reg_bmsr
BMSR (basic mode status).
@ k_ra8_eth_phy_speed_10
10 Mbps.
@ k_ra8_eth_phy_anlpar_10f
ANLPAR bit 6: 10BASE-T FD.
@ k_ra8_eth_phy_anlpar_100f
ANLPAR bit 8: 100BASE-TX FD.
@ k_ra8_eth_phy_anlpar_100h
ANLPAR bit 7: 100BASE-TX.
@ k_ra8_eth_phy_bmsr_an_done
BMSR.AUTONEG_COMPLETE bit 5.
static ra8_err_t internal_phy_read_link(ra8_rmac_port_t port, ra8_eth_link_t *out_status, uint16_t *out_bmcr)
Read PHY BMSR + BMCR over MDIO and populate out_status.
static void internal_pick_negotiated_speed(uint16_t anlpar, uint16_t gbsr, ra8_rmac_lsc_t *out_speed, ra8_rmac_duplex_t *out_duplex)
Compute the highest auto-negotiated speed + duplex from ANLPAR+GBSR.
static ra8_err_t internal_resync_mac_speed(ra8_rmac_port_t port, uint16_t bmcr)
Resync MPIC.LSC / MPIC.PIPP to match the PHY auto-neg result.
volatile uint16_t g_ra8_eth_anlpar
Last-read ANLPAR (PHY reg 5) snapshot for bench debugging.
ra8_err_t ra8_eth_link_status(ra8_eth_link_t *out_status)
Query the PHY link state via MIIM (RMAC MDIO Clause-22).
volatile uint32_t g_ra8_eth_resync_speed_lsc
Speed-LSC value the resync chose.
ra8_eth_an_poll_t
Bound on the AUTONEG_COMPLETE poll loop.
@ k_ra8_eth_an_poll_max_iters
80 * 50 ms = 4 s ceiling.
@ k_ra8_eth_an_poll_period_ms
RA8 Ethernet an poll period ms.
static void internal_wait_for_autoneg(ra8_rmac_port_t port)
Poll BMSR.AUTONEG_COMPLETE until it asserts or the budget runs out.
volatile uint32_t g_ra8_eth_resync_duplex
Duplex value the resync chose.
static ra8_err_t internal_program_mpic(ra8_rmac_port_t port, ra8_rmac_lsc_t speed, ra8_rmac_duplex_t duplex)
Drop ETHA to CONFIG, write MPIC, return to OPERATION.
volatile uint16_t g_ra8_eth_gbsr
Last-read GBSR (PHY reg 10) snapshot for bench debugging.
static ra8_err_t internal_query_negotiated_speed(ra8_rmac_port_t port, ra8_rmac_lsc_t *out_speed, ra8_rmac_duplex_t *out_duplex)
Read ANLPAR + GBSR and pick the negotiated speed/duplex.
Per-port Ethernet Agent (ETHA) driver – HUM Ch 32 (p 1627-1702).
ra8_err_t ra8_etha_set_mode(ra8_etha_port_t port, ra8_etha_opc_t mode)
Issue an explicit EAMC mode-change command.
ra8_etha_port_t
ETHA port index (m = 0, 1).
@ k_ra8_etha_port_0
ETHA port 0 (base 0x403C_A000).
@ k_ra8_etha_port_1
ETHA port 1 (base 0x403C_C000).
@ k_ra8_etha_opc_operation
Enter OPERATION mode.
@ k_ra8_etha_opc_config
Enter CONFIG mode.
@ k_ra8_etha_opc_disable
Enter DISABLE mode.
Lightweight Logging Interface for ra8-firmware.
#define ra8_log_info(tag, message)
RA8 log info.
Per-port Ethernet MAC (RMAC) driver – HUM Ch 33.
ra8_err_t ra8_rmac_set_link(ra8_rmac_port_t port, ra8_rmac_pis_t iface, ra8_rmac_lsc_t speed, ra8_rmac_duplex_t duplex)
Configure the link layer (interface, speed, duplex) atomically.
ra8_err_t ra8_rmac_mdio_c22_read(ra8_rmac_port_t port, uint8_t phy_addr, uint8_t reg_addr, uint16_t *out_value)
Trigger an MDIO Clause-22 register read on the off-chip PHY.
ra8_rmac_pis_t
Physical interface selector for MPIC.PIS[2:0].
@ k_ra8_rmac_pis_mii
MII (000b) – internal xMII for 10/100 Mbps.
@ k_ra8_rmac_pis_gmii
GMII (010b) – internal xMII for 1 Gbps.
ra8_rmac_lsc_t
Link-speed selector for MPIC.LSC[5:3] (HUM Ch 33.4).
@ k_ra8_rmac_lsc_1000mbit
1 Gbit/s.
@ k_ra8_rmac_lsc_100mbit
100 Mbit/s.
@ k_ra8_rmac_lsc_10mbit
10 Mbit/s.
ra8_rmac_port_t
RMAC port index (m = 0, 1).
@ k_ra8_rmac_port_0
RMAC port 0 (base 0x403C_B000).
ra8_rmac_duplex_t
Duplex selection (programmed via MPIC.PIPP / MPIC.PIP).
@ k_ra8_rmac_duplex_full
Full duplex.
@ k_ra8_rmac_duplex_half
Half duplex.
SysTick-based tick counter, delay and timestamp helpers.
void ra8_delay_ms(uint32_t ms)
Busy-wait for at least ms milliseconds.
uint16_t bmsr
Raw BMSR (PHY register 0x01) snapshot.
uint8_t full_duplex
1 if full duplex, 0 if half.
uint16_t speed_mbps
Negotiated PHY speed (10/100/1000).
uint8_t link_up
1 if BMSR.LINK_STATUS asserted, else 0.