CRC-32 hardware vs. More...

#include <stdint.h>
#include "ra8_board_ek_ra8d2.h"
#include "ra8_boot_entry.h"
#include "ra8_cgc.h"
#include "ra8_crc.h"
#include "ra8_crc_regs.h"
#include "ra8_err.h"
#include "ra8_isr.h"
#include "ra8_time.h"

Include dependency graph for main.c:

Enumerations
enum	crc_demo_config_t : uint32_t { k_crc_demo_baud = 115200U , k_crc_demo_period_ms = 1000U }
	Compile-time settings. More...
enum	crc_demo_sw_const_t : uint32_t { k_crc_demo_sw_poly_rev = 0xEDB88320UL , k_crc_demo_sw_init = 0xFFFFFFFFUL , k_crc_demo_sw_xor_out = 0xFFFFFFFFUL , k_crc_demo_byte_mask = 0xFFUL , k_crc_demo_lsb_mask = 0x1UL }
	Software CRC-32 polynomial + bit constants (reflected). More...
enum	crc_demo_byte_t : uint8_t { k_crc_demo_bits_per_byte = 8U , k_crc_demo_nibble_mask = 0x0FU , k_crc_demo_nibble_shift = 4U , k_crc_demo_alpha_thresh = 10U , k_crc_demo_payload_len = 16U , k_crc_demo_hex_per_word = 8U }
	Inner-loop bit count for the software CRC. More...

Functions
static void	crc_demo_panic_halt (void)
	Park the CPU forever after a fatal init failure.
static uint8_t	crc_demo_nibble_to_hex (uint8_t nibble)
	Convert the low nibble of n to its ASCII hex char.
static void	crc_demo_word_to_hex (uint32_t v, uint8_t *dst)
	Render a 32-bit value as 8 ASCII hex chars (big-endian).
static uint32_t	crc_demo_sw_crc32 (const uint8_t *data, uint32_t len)
	Software reference CRC-32 (IEEE 802.3, reflected).
static void	crc_demo_setup_or_halt (void)
	Bring CGC + SysTick + SCI8 + LEDs + CRC unit up.
static ra8_err_t	crc_demo_one_iter (uint8_t *out_match)
	One iteration: compute hw + sw CRC and emit the comparison line.
void	main (void)
	The application entry point Reset_Handler hands control to.

Variables
static const uint8_t	k_crc_demo_payload [k_crc_demo_payload_len]
	Fixed 16-byte test payload.
static const uint8_t	k_crc_demo_prefix [] = "crc: hw="
	Output line tags.
static const uint8_t	k_crc_demo_sw_tag [] = " sw="
static const uint8_t	k_crc_demo_ok_tag [] = " match=Y\r\n"
static const uint8_t	k_crc_demo_bad_tag [] = " match=N\r\n"
static const uint8_t	k_crc_demo_pass_msg [] = "crc: selftest PASS\r\n"
	Self-test verdict emitted only on a hw==sw match (success-only).

Detailed Description

CRC-32 hardware vs.

software cross-check demo for the EK-RA8D2

Tag: [Ring 6 / APP] {World: S}

Brings up CGC + SysTick + SCI8 + LED1 + the on-chip CRC unit (CRC-32 / IEEE 802.3 polynomial). Once a second computes the CRC over a fixed 16-byte test buffer two ways:

Through ra8_crc_compute (hardware CRC engine).
Through a tiny software reference implementation (bit-serial CRC-32 with the standard 0xEDB88320 reflected polynomial).

Emits "crc: hw=XXXXXXXX sw=XXXXXXXX match=Y\r\n" on the J-Link OB CDC channel and toggles LED1 on every match. On a match it also emits the fixed verdict line "crc: selftest PASS\r\n" (success-only – never printed on the match=N path), which the HIL scrape keys on. LED2 latches if the two ever diverge.

Bare EK-RA8D2 only – no shields or external transceiver.

Copyright: Copyright (c) 2026 Brighton Sikarskie SPDX-License-Identifier: MIT

Since: 0.1.0

Definition in file main.c.

Enumeration Type Documentation

◆ crc_demo_byte_t

enum crc_demo_byte_t : uint8_t

Inner-loop bit count for the software CRC.

Enumerator
k_crc_demo_bits_per_byte	CRC demo bits per byte.
k_crc_demo_nibble_mask	CRC demo nibble mask.
k_crc_demo_nibble_shift	CRC demo nibble shift.
k_crc_demo_alpha_thresh	CRC demo alpha thresh.
k_crc_demo_payload_len	CRC demo payload length.
k_crc_demo_hex_per_word	CRC demo hex per word.

Definition at line 58 of file main.c.

◆ crc_demo_config_t

enum crc_demo_config_t : uint32_t

Compile-time settings.

Enumerator
k_crc_demo_baud	CRC demo baud.
k_crc_demo_period_ms	CRC demo period ms.

Definition at line 43 of file main.c.

◆ crc_demo_sw_const_t

enum crc_demo_sw_const_t : uint32_t

Software CRC-32 polynomial + bit constants (reflected).

Enumerator
k_crc_demo_sw_poly_rev	CRC demo sw poly rev.
k_crc_demo_sw_init	CRC demo sw init.
k_crc_demo_sw_xor_out	CRC demo sw xor out.
k_crc_demo_byte_mask	CRC demo byte mask.
k_crc_demo_lsb_mask	CRC demo lsb mask.

Definition at line 49 of file main.c.

Function Documentation

◆ crc_demo_nibble_to_hex()

uint8_t crc_demo_nibble_to_hex ( uint8_t nibble )

static

Convert the low nibble of n to its ASCII hex char.

Parameters

[in] nibble Lower 4 bits used; upper 4 bits ignored.

Returns: Printable ASCII byte in '0'..'9' / 'a'..'f'.

Precondition: None.

Postcondition: Return value is always printable.

Since: 0.1.0

Definition at line 115 of file main.c.

References k_crc_demo_alpha_thresh, and k_crc_demo_nibble_mask.

Referenced by crc_demo_word_to_hex().

◆ crc_demo_one_iter()

ra8_err_t crc_demo_one_iter ( uint8_t * out_match )

staticnodiscard

One iteration: compute hw + sw CRC and emit the comparison line.

MC/DC:: Single atomic decision: ra8_crc_compute(...) != k_ra8_ok. One condition x 2 vectors – the steady-state success path plus the compute-failure branch (covered by the host integration test). The console writes are fire-and-forget so they add no decision.

Parameters

[out] out_match Receives 1 if hw == sw, 0 otherwise.

Returns: Error code from the CRC compute primitive.

Return values

k_ra8_ok	Comparison line emitted; *out_match valid.
k_ra8_err_hw_error	Hardware CRC compute failed.

Precondition: out_match non-NULL.

Postcondition: On success *out_match is 0 or 1.

Since: 0.1.0

Definition at line 233 of file main.c.

References crc_demo_sw_crc32(), crc_demo_word_to_hex(), k_crc_demo_bad_tag, k_crc_demo_hex_per_word, k_crc_demo_ok_tag, k_crc_demo_pass_msg, k_crc_demo_payload, k_crc_demo_payload_len, k_crc_demo_prefix, k_crc_demo_sw_tag, k_ra8_err_hw_error, k_ra8_ok, ra8_board_uart_console_write(), ra8_crc_compute(), and ra8_crc_reset().

Referenced by main().

◆ crc_demo_panic_halt()

void crc_demo_panic_halt ( void )

static

Park the CPU forever after a fatal init failure.

Definition at line 97 of file main.c.

Referenced by crc_demo_setup_or_halt(), and main().

◆ crc_demo_setup_or_halt()

void crc_demo_setup_or_halt ( void )

static

Bring CGC + SysTick + SCI8 + LEDs + CRC unit up.

Definition at line 187 of file main.c.

References crc_demo_panic_halt(), k_crc_demo_baud, k_ra8_board_led1, k_ra8_board_led2, k_ra8_clock_id_cpuclk0, k_ra8_crc_poly_32_ieee802_3, k_ra8_ok, ra8_board_led_init(), ra8_board_uart_console_init(), ra8_cgc_get_clock_hz(), ra8_cgc_init(), ra8_crc_init(), and ra8_time_init().

Referenced by main().

◆ crc_demo_sw_crc32()

uint32_t crc_demo_sw_crc32	(	const uint8_t *	data,
		uint32_t	len )

static

Software reference CRC-32 (IEEE 802.3, reflected).

Bit-serial Sarwate-style implementation; no lookup table so we keep the code review-able and avoid pulling in 1 KB of constants for a HIL test app. Matches the hardware CRC unit when the latter is configured for k_ra8_crc_poly_32_ieee802_3 with the standard preset / xor-out.

MC/DC:: Compound decision in the inner loop: (crc & 1U) != 0. One atomic condition x 2 vectors – both branches are exercised by any non-trivial input (host integration test covers this).

Parameters

[in]	data	Pointer to len bytes (non-NULL).
[in]	len	Byte count.

Returns: 32-bit CRC-32 result.

Precondition: data is non-NULL.

Postcondition: Return value matches the hardware engine for the same polynomial selector.

Since: 0.1.0

Definition at line 170 of file main.c.

References k_crc_demo_bits_per_byte, k_crc_demo_lsb_mask, k_crc_demo_sw_init, k_crc_demo_sw_poly_rev, and k_crc_demo_sw_xor_out.

Referenced by crc_demo_one_iter().

◆ crc_demo_word_to_hex()

void crc_demo_word_to_hex	(	uint32_t	v,
		uint8_t *	dst )

static

Render a 32-bit value as 8 ASCII hex chars (big-endian).

Parameters

[in]	v	Value to render.
[out]	dst	8-byte buffer that receives the hex characters.

Precondition: dst is non-NULL and has at least 8 bytes capacity.

Postcondition: dst[0..7] contains printable hex.

Since: 0.1.0

Definition at line 135 of file main.c.

References crc_demo_nibble_to_hex(), k_crc_demo_hex_per_word, k_crc_demo_nibble_mask, and k_crc_demo_nibble_shift.

Referenced by crc_demo_one_iter().

◆ main()

void main ( void )

The application entry point Reset_Handler hands control to.

Returns void, not int. This is a freestanding image: there is no hosted C environment, no process and nothing to report an exit status to. ISO C fixes main at int only for a hosted implementation; for a freestanding one (C23 5.1.2.1) the startup function's name and type are implementation-defined, and this is that definition. Reset_Handler discards no value because there is none to discard, and if main ever does return, startup halts the CPU rather than resuming anything.

The firmware lane is compiled -ffreestanding (see cmake/ra8_add_app.cmake) and the flag and this signature travel together: without it both GCC and clang reject a non-int main (-Wmain / -Wmain-return-type). Do not remove one without the other.

That coupling is why the declaration sits behind __STDC_HOSTED__ == 0, which -ffreestanding sets and a hosted build does not. The guard is not defensive dressing: this header is reachable from host builds (the unit tests compile ra8_core natively), and an unguarded void main(void); makes every hosted translation unit that includes it fail with conflicting types for 'main' against its own ISO int main. The declaration therefore exists exactly where its contract does.

Hosted first-party code – everything under tests/ and tools/ – uses the ISO int main(...) contract instead, because it genuinely does run under an OS that reads the exit status. scripts/checks/check_entry_points.py holds each domain to its own contract (#707).

Declared here, once, for the same reason SystemInit is: every vector_table.c used to restate it as a local extern int32_t main(void);, sixteen copies that no compiler ever compared against the definition – and roughly thirty of them had silently drifted out of agreement with the main they called.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has configured the clock tree and VTOR.

Postcondition: Control does not return; the image runs until reset or halt.; Any value the application wanted to report has been logged, not returned.

Note: Not thread-safe; single-threaded startup context only.

Warning: Only valid while the translation unit is compiled -ffreestanding. A hosted build rejects this signature.

See also: SystemInit()

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + BSP audio then plays blocks.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the playback loop forever.; On any HAL init failure the function halts in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + GPT triple, runs sweep.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the sweep loop forever.; On any HAL init failure the function halts in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up clocks + UART + RMII pins, then ThreadX.

Precondition: Reset_Handler has copied .data and zeroed .bss.

Postcondition: On clean entry the kernel runs the worker thread once.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up clocks + UART, then enters ThreadX.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the kernel runs the worker thread forever.; On any HAL init failure the function halts in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up LED, console, SDHI pins, then ThreadX.

Precondition: Reset_Handler has copied .data + zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: CPUCLK0 is raised to the PLL1 target before the kernel starts.; On clean entry the SD card thread runs forever.; On any HAL init failure the function halts in __WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + USB-FS + UAC1, then enters the iso-IN feed loop forever.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the iso-IN feed loop forever.; On any HAL init failure the function halts in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: SystemInit set VTOR / FPU / priority grouping.

The application entry point Reset_Handler hands control to.

See file header.

Precondition: Boot init has completed.; The secure-boot library's BLXNS into NS image either failed or was skipped (the call site in ra8_trustzone_init is a no-op on host builds).

Postcondition: Diagnostic counter latched, CPU parked in a halt loop.; Function never returns.

Note: Single-threaded entry.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: On success g_eoh_chapters / g_eoh_crc hold the parsed results, the banner is emitted, and g_eoh_heartbeat advances once per frame.; On any failure g_eoh_err is non-zero and the CPU parks (no heartbeat).

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The chapters/ch0-CRC banner is emitted; the CPU then loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: On success the g_etoc_* result globals hold the parsed TOC values, the banner is emitted, and g_etoc_heartbeat advances once per frame.; On any failure g_etoc_err is non-zero and the CPU parks (no heartbeat).

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss; SystemInit set VTOR/FPU.

Postcondition: The shelf scans on the panel; taps open books, browse, and read.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The slab/arena/tile/vmem banner is emitted; the CPU then loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: On success the cache globals are latched and g_pc_heartbeat advances.; On any failure g_pc_err is non-zero and the CPU parks (no heartbeat).

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Profiles power modes once a second.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the profile + blink loop.; On any HAL hard error LED2 latches ON.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler has copied .data and zeroed .bss.; The shared board boot files installed the vector table.

Postcondition: The demo has run once and its verdict banner is streaming steadily.; The CPU idles re-emitting the banner (or halts after a fatal init error).

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up the clocks, console, SPI, and SD card, then runs the shared ra8_io VFS round-trip over the SD-over-SPI block device. On success it prints the exact PASS banner the HIL runner and ra8_emulator smoke gate scrape for; on any failure it prints FAIL and parks the core.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On a clean run the CPU loops forever after the PASS banner.; On any failure the function prints FAIL and halts in WFI.

Note: Not thread-safe; this is the single-threaded app entry.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Initialises logging and the console, brings up the OSPI NOR volume, runs the erase-before-write round-trip, and prints a single PASS/FAIL verdict line over SCI8 before parking in an infinite loop.

Precondition: SystemInit configured VTOR / FPU / priority grouping.; The OSPI NOR array is present (modelled in ra8_emulator, real on silicon).

Postcondition: Exactly one PASS or FAIL verdict line has been queued on SCI8.; Control parks in an infinite loop; the function never returns.

Note: Single-threaded; runs to the park loop on the main stack.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The page-count + render-hash banner is emitted; the CPU loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The cal=OK / cal=SKIP result and the finger-free touchcal: ready sentinel are emitted; the CPU then loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The open=OK touch banner is emitted; the CPU then loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Both USB controllers' clocks and pins come up before the kernel so the workers only deal with stack bring-up.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR, FPU, priority grouping.

Postcondition: On clean entry the CPU stays in tx_kernel_enter forever.; On any HAL init failure the function halts in WFI.

Note: Single entry point; not re-entrant.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging and the clock tree, releases the Cortex-M33 (which then blinks LED1 via ra8_pcntr_set_output()), and idles. See the file header.

Precondition: SystemInit has completed core bring-up.; The M33 is held in reset by hardware until released here.

Postcondition: The M33 has been released and is blinking LED1.; This function never returns to its caller.

Note: Single-threaded; no RTOS on the M85 in this template.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: The application links ra8_c6link and ESP-hosted generated codecs.; No hardware validation is inferred from this function.

Postcondition: No c6link operation is attempted.; No network or storage state is modified.

Note: Single-threaded compile fixture.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, the clock tree, and the VCOM console, runs the cacheable-SRAM round-trip with the D-cache that SystemInit() enabled through ra8_cache_dcache_enable(), emits the matching PASS / FAIL banner over the console and ra8_log, then parks in WFI. Every byte the self-test touches runs with the L1 caches + MPU enabled by the shared boot (RA8_BOOT_ENABLE_CACHE_MPU + RA8_BOOT_CACHE_VIA_HAL).

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit enabled the MPU + I-cache + D-cache via the ra8_cache HAL.

Postcondition: Exactly one banner (PASS or FAIL) has been emitted.; The core is parked in WFI.

Note: Single-threaded; no RTOS and no IRQ sources in this template.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Publishes the mailbox, releases the Cortex-M33 into the emitter, yields until it signals done, validates the blob the M33 built, then logs the PASS/FAIL verdict and the chapter count read back from the blob. See the file header for the offload narrative.

Precondition: SystemInit has completed core bring-up.; The M33 is held inactive by hardware until released here.

Postcondition: The M33 has built a RABOOK1 blob and the M85 has validated it.; This function never returns to its caller.

Note: Single-threaded; no RTOS on the M85 in this example.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: On success the CPU heartbeats after epaper: PASS.; On any HAL error the console prints epaper: FAIL and the red LED latches on.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The chapters/toc/cover banner is emitted; CPU loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The reader loop runs forever, redrawing on each tap.; A page-1 banner is emitted once after the first render.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The cover-size / framebuffer-CRC banner is emitted; CPU loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The panel shows the reader screen and the input loop runs forever.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Publishes the mailbox, arms the IPC0 wake and configures the LPM block, releases the Cortex-M33 into the reader, waits for the first held page, logs the page-0 verdict, then runs the #150 mode-switch cycle – parking in low-power WFI and waking on the M33's page-turn pokes – before logging the handoff verdict and parking for good. See the file header for the narrative.

Precondition: SystemInit has completed core bring-up.; The M33 is held inactive by hardware until released here.

Postcondition: The M33 has rendered + re-rendered the held page and the M85 is parked.; This function never returns to its caller.

Note: Single-threaded; no RTOS on the M85 in this example.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The boot banner is emitted; the reader loop services taps forever.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up the timebase then measures forever.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the measure + blink loop forever.; On any HAL init failure the function halts in WFI.

Note: Never returns.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Arms the RIIC1 target and polls the dispatcher.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: The CPU stays in the dispatch poll loop forever.; On any fatal init error the CPU parks in riic_target_panic_halt.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On a clean run the PASS banner is printed and the CPU loops in WFI.; On any failure the function prints a FAIL line and halts.

Note: Not thread-safe; single-threaded app entry.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the read + print loop forever.; On any HAL hard error LED2 latches ON and the loop exits.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up the LIN commander then drives frames.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the LIN-frame + blink loop forever.; On any HAL init failure the function halts in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, "renders" page 0 into the shared mailbox, releases the Cortex-M33 into its hold loop, and parks the M85 in low-power WFI sleep. See the file header for the power-saving narrative.

Precondition: SystemInit has completed core bring-up.; The M33 is held inactive by hardware until released here.

Postcondition: The M33 owns the held page and the M85 is parked.; This function never returns to its caller.

Note: Single-threaded; no RTOS on the M85 in this example.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

The USB clock, pins, console, and the SD card all come up before the kernel so the worker only deals with USB stack bring-up.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR, FPU, priority grouping.

Postcondition: On clean entry the CPU stays in tx_kernel_enter forever.; On any HAL init failure the function halts in WFI.

Note: Single entry point; not re-entrant.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit configured VTOR / FPU.

Postcondition: On clean bring-up the CPU stays in the poll loop.; On any HAL init failure the function halts in WFI.

Note: Single entry point; not re-entrant.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler initialized static storage.; SystemInit configured VTOR, FPU, and priority grouping.

Postcondition: The startup banner is printed once.; Control enters ThreadX and never returns normally.

Note: The #707 freestanding contract is declared by ra8_boot_entry.h.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On a clean run the PASS banner is printed and the CPU heartbeats forever.; On any failure LED2 latches ON and the CPU parks.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, the clock tree, and the VCOM console, runs the three-step self-test (MPU enabled, canonical boot map, Device MMIO), emits the matching PASS / FAIL banner over the console and ra8_log, then parks in WFI.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit installed the boot map via ra8_mpu_apply_boot_map().

Postcondition: Exactly one banner (PASS or a step-specific FAIL) has been emitted.; The core is parked in WFI.

Note: Single-threaded; no RTOS and no IRQ sources in this template.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler initialised the C runtime; SystemInit ran.; The EK-RA8D2 J-Link OB VCOM console is attached for the banner.

Postcondition: The commit + rollback attempts have executed against extra-MRAM.; The verdict banner is emitted once per report cycle.

Note: Single entry point; not re-entrant.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Initialises logging + console, brings up the MRAM volume, runs the wear-levelling + power-cycle-survival flow, and prints a single PASS/FAIL verdict.

Precondition: SystemInit configured VTOR / FPU / priority grouping.; The extra-MRAM region is present (modelled in ra8_emulator, real on silicon).

Postcondition: Exactly one PASS or FAIL verdict line has been queued on SCI8.; Control parks in an infinite loop; the function never returns.

Note: Single-threaded; runs to the park loop on the main stack.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Initialises logging + console, brings up the MRAM volume, runs the program/erase round-trip, and prints a single PASS/FAIL verdict.

Precondition: SystemInit configured VTOR / FPU / priority grouping.; The extra-MRAM region is present (modelled in ra8_emulator, real on silicon).

Postcondition: Exactly one PASS or FAIL verdict line has been queued on SCI8.; Control parks in an infinite loop; the function never returns.

Note: Single-threaded; runs to the park loop on the main stack.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up the clocks, console, and SDHI bus pins, runs the native SD card identification, fills the payload, then runs the full ra8_io VFS round-trip over the native-SDHI block device. On success it prints the exact PASS banner the HIL runner and ra8_emulator smoke gate scrape for; on any failure it prints FAIL and parks the core.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On a clean run the CPU loops forever after the PASS banner.; On any failure the function prints FAIL and halts in WFI.

Note: Not thread-safe; this is the single-threaded app entry.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up the console and both stdio sinks, retargets the engine's stdio to the in-RAM capture sink, runs the two-backend swap, replays the RAM capture out of the UART, and prints a single PASS/FAIL verdict per abstraction before parking in an infinite loop.

Precondition: SystemInit configured VTOR / FPU / priority grouping.; The OSPI NOR array is present (modelled in ra8_emulator, real on silicon).

Postcondition: A PASS or FAIL verdict line has been queued on SCI8 for each abstraction.; Control parks in an infinite loop; the function never returns.

Note: Single-threaded; runs to the park loop on the main stack.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up the clocks, console, and SDHI bus pins, runs the native SD card identification, fills the payload, then writes + reads + compares one raw 512-byte block straight against ra8_sdcard. On success it prints the exact PASS banner; on any failure it prints FAIL and parks the core.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On a clean run the CPU loops forever after the PASS banner.; On any failure the function prints FAIL and halts in WFI.

Note: Not thread-safe; this is the single-threaded app entry.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The whoami PASS banner is emitted; the CPU then loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up clocks + UART + RMII + RSIP, then ThreadX.

Precondition: Reset_Handler has copied .data and zeroed .bss.

Postcondition: On clean entry the kernel runs the worker thread once.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, the FPU and the priority grouping.

Postcondition: The banner was printed exactly once.; Control passed to ThreadX and never came back.

Note: Everything after tx_kernel_enter happens on ThreadX; the panic-halt below is reached only if the kernel refuses to start.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, the FPU and the priority grouping.

Postcondition: The banner and the resolved pin map were printed exactly once.; Control passed to ThreadX and never came back.

Note: Everything after tx_kernel_enter happens on ThreadX; the panic-halt below is reached only if the kernel refuses to start.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, the FPU and priority grouping.

Postcondition: The probe ran exactly once and printed its verdict.; The CPU stays in a slow heartbeat loop afterwards.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, the FPU and the priority grouping.

Postcondition: The banner was printed exactly once.; Control passed to ThreadX and never came back.

Note: Everything after tx_kernel_enter runs on ThreadX; the panic-halt below is reached only if the kernel refuses to start.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Initializes and arms ADC_B, formats each successful channel sample without variadic I/O, emits the verdict, toggles LED1, and delays.

Precondition: Reset startup and SystemInit completed successfully.; The selected ADC channel matches the board analog connection.

Postcondition: Every PASS verdict follows a successful channel read.; Any read or LED failure leads to the terminal panic helper.

Note: Does not return during normal operation.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: On success the PASS banner is emitted; otherwise a FAIL line is.; The CPU parks in WFI (observable on ra8_emulator until its budget).

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, releases the Cortex-M33 (which then blinks LED1), and idles. See the file header for the teaching narrative.

Precondition: SystemInit has completed core bring-up.; The M33 is held in reset by hardware until released here.

Postcondition: The M33 has been released and is blinking LED1.; This function never returns to its caller.

Note: Single-threaded; no RTOS on the M85 in this template.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The IDCODE/checks PASS banner is emitted; the CPU then loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

See the file header for the full behaviour summary.

Precondition: SystemInit has enabled the caches + MPU (this build defines RA8_BOOT_ENABLE_CACHE_MPU).; The M33 is held in reset by hardware until released here.

Postcondition: The M33 has been released and the round-trip loop is running.; This function never returns to its caller.

Note: Single-threaded; no RTOS on the M85 in this template.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, the clock tree, and the VCOM console, runs the three-step self-test (cacheable SRAM, RO MRAM const, Device MMIO), emits the matching PASS / FAIL banner over the console and ra8_log, then parks in WFI. Every byte the self-test touches runs with the L1 caches and MPU enabled by the shared boot (RA8_BOOT_ENABLE_CACHE_MPU).

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit enabled the MPU + I-cache + D-cache (cache+MPU build).

Postcondition: Exactly one banner (PASS or a step-specific FAIL) has been emitted.; The core is parked in WFI.

Note: Single-threaded; no RTOS and no IRQ sources in this template.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR, FPU and priority grouping.

Postcondition: The verdict banner is on SCI8 and the CPU parks.; The result globals hold the outcome for SWD probing.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Lights HOCO + PLL, then runs a 1 Hz blink.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the toggle loop forever.; On any HAL init failure the function halts in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

See file header for behaviour summary.

Precondition: Boot init has completed.; CPU1 is held in reset.

Postcondition: CPU1 released and the ping-pong loop running.; Function never returns.

Note: Single-threaded entry.

Since: 0.1.0

Definition at line 262 of file main.c.

References crc_demo_one_iter(), crc_demo_panic_halt(), crc_demo_setup_or_halt(), k_crc_demo_period_ms, k_ra8_board_led1, k_ra8_board_led2, k_ra8_ok, ra8_board_led_toggle(), ra8_delay_ms(), and ra8_isr_globals_enable().

Variable Documentation

◆ k_crc_demo_bad_tag

const uint8_t k_crc_demo_bad_tag[] = " match=N\r\n"

static

Definition at line 91 of file main.c.

Referenced by crc_demo_one_iter().

◆ k_crc_demo_ok_tag

const uint8_t k_crc_demo_ok_tag[] = " match=Y\r\n"

static

Definition at line 90 of file main.c.

Referenced by crc_demo_one_iter().

◆ k_crc_demo_pass_msg

const uint8_t k_crc_demo_pass_msg[] = "crc: selftest PASS\r\n"

static

Self-test verdict emitted only on a hw==sw match (success-only).

Definition at line 94 of file main.c.

Referenced by crc_demo_one_iter().

◆ k_crc_demo_payload

const uint8_t k_crc_demo_payload[k_crc_demo_payload_len]

static

Initial value:

                                        = {
  0x00U,
  0x11U,
  0x22U,
  0x33U,
  0x44U,
  0x55U,
  0x66U,
  0x77U,
  0x88U,
  0x99U,
  0xAAU,
  0xBBU,
  0xCCU,
  0xDDU,
  0xEEU,
  0xFFU,
}

Fixed 16-byte test payload.

Definition at line 68 of file main.c.

Referenced by crc_demo_one_iter().

◆ k_crc_demo_prefix

const uint8_t k_crc_demo_prefix[] = "crc: hw="

static

Output line tags.

Definition at line 88 of file main.c.

Referenced by crc_demo_one_iter().

◆ k_crc_demo_sw_tag

const uint8_t k_crc_demo_sw_tag[] = " sw="

static

Definition at line 89 of file main.c.

Referenced by crc_demo_one_iter().

Enumerations

Functions

Variables

Detailed Description

Enumeration Type Documentation

◆ crc_demo_byte_t

◆ crc_demo_config_t

◆ crc_demo_sw_const_t

Function Documentation

◆ crc_demo_nibble_to_hex()

◆ crc_demo_one_iter()

◆ crc_demo_panic_halt()

◆ crc_demo_setup_or_halt()

◆ crc_demo_sw_crc32()

◆ crc_demo_word_to_hex()

◆ main()

Variable Documentation

◆ k_crc_demo_bad_tag

◆ k_crc_demo_ok_tag

◆ k_crc_demo_pass_msg

◆ k_crc_demo_payload

◆ k_crc_demo_prefix

◆ k_crc_demo_sw_tag