DTC (Data Transfer Controller) transfer-engine model for ra8_emulator. More...

#include <stdint.h>
#include <stdio.h>
#include "board_console.h"
#include "board_periph_block.h"
#include "emu_host_io_internal.h"

Include dependency graph for board_periph_dtc.c:

Data Structures
struct	dtc_state_t
	DTC control-register state plus an activation/byte tally. More...
struct	dtc_ti_t
	One Transfer Information block, decoded from emulated memory. More...

Enumerations
enum	dtc_console_t : uint32_t { k_dtc_console_line_cap = 48U }
	Console-tap line buffer capacity for a DTC transfer summary. More...
enum	dtc_geom_t : uint64_t { k_dtc_base = 0x4000AC00UL , k_dtc_span = 0x40UL , k_dtc_off_dtccr = 0x00UL , k_dtc_off_dtcvbr = 0x04UL , k_dtc_off_dtcst = 0x0CUL , k_dtc_off_dtcsts = 0x0EUL }
	DTC control-window geometry (ra8_dtc_regs.h, r_dtc_regs_t). More...
enum	elc_geom_t : uint64_t { k_elc_base = 0x40201000UL , k_elc_span = 0x100UL , k_elc_off_elsegr0 = 0x04UL }
	ELC ELSEGR-window geometry (ra8_elc_regs.h). More...
enum	elc_swevt_t : uint32_t { k_elc_swevt0_event = 0x0CCU , k_elc_elsegr_trigger = 0x41U }
	ELC software event 0 number and its ELSEGR trigger value. More...
enum	dtc_ti_off_t : uint32_t { k_ti_off_mr = 0U , k_ti_off_sar = 4U , k_ti_off_dar = 8U , k_ti_off_crb = 12U , k_ti_off_cra = 14U }
	DTC TI block field offsets (r_dtc_xfer_info_t, HUM Figure 18.4). More...
enum	dtc_mr_field_t : uint32_t { k_mr_mra_shift = 24U , k_mr_mrb_shift = 16U , k_mra_md_pos = 6U , k_mra_sz_pos = 4U , k_mra_sm_pos = 2U , k_mrb_dm_pos = 2U , k_mr_2bit_mask = 0x3U , k_mra_md_block = 0x2U , k_mr_addr_inc = 0x2U , k_mra_sz_byte = 0x0U , k_mra_sz_word = 0x2U , k_mra_sz_half = 0x1U , k_mr_byte_mask = 0xFFU }
	MR mode-word field extraction (MRA in the top byte, MRB next). More...
enum	dtc_count_t : uint32_t { k_dtc_block_cra_zero = 256U }
	DTC transfer-count encoding quirks (HUM 18.2.7). More...
enum	dtc_vt_geom_t : uint32_t { k_dtc_vt_entry_bytes = 4U , k_dtc_ti_addr_mask = 0xFFFFFFFEU , k_dtc_max_units = 0x10000U , k_dtc_ielsr_slots = 96U }
	Vector-table entry layout (DTCVBR + slot*4 -> TI start). More...
enum	dtc_order_t : uint32_t { k_dtc_block_order = 55U }
	Per-tick order slot for the DTC block (relative order only). More...

Functions
static RA8_INTERNAL uint32_t	internal_dtc_unit_bytes (uint32_t sz_code)
	Bytes per unit for an MRA.SZ code (defaults to byte width).
static RA8_INTERNAL uint32_t	internal_dtc_mem_read (uc_engine *uc, uint64_t addr, uint32_t bytes)
	Read a little-endian word of `bytes` from emulated memory.
static RA8_INTERNAL void	internal_dtc_decode_ti (uc_engine uc, uint32_t ti_addr, dtc_ti_t out)
	Read and decode the TI block at `ti_addr` into `out`.
static RA8_INTERNAL uint32_t	internal_dtc_unit_count (const dtc_ti_t *ti)
	Total unit count a descriptor moves, or 0 if it is out of range.
static RA8_INTERNAL void	internal_dtc_copy_units (uc_engine uc, const dtc_ti_t ti, uint32_t units, uint32_t unit)
	Copy `units` units of `unit` bytes from SAR to DAR.
static RA8_INTERNAL void	internal_dtc_run_transfer (uc_engine *uc, uint32_t ti_addr)
	Perform the SAR->DAR copy described by one TI block.
static RA8_INTERNAL void	internal_dtc_activate_swevt0 (uc_engine *uc)
	Run the DTC for ELC software event 0 if a DTCE slot links it.
static RA8_INTERNAL void	internal_dtc_reset (void)
	Reset the DTC model (and the ELC shadow) to power-on state.
static RA8_INTERNAL uint64_t	internal_dtc_read (uc_engine *uc, uint64_t addr, unsigned size)
	MMIO read inside the DTC control window.
static RA8_INTERNAL void	internal_dtc_write (uc_engine *uc, uint64_t addr, unsigned size, uint64_t value)
	MMIO write inside the DTC control window.
static RA8_INTERNAL uint64_t	internal_elc_read (uc_engine *uc, uint64_t addr, unsigned size)
	MMIO read inside the ELC window (transparent byte shadow).
static RA8_INTERNAL void	internal_elc_write (uc_engine *uc, uint64_t addr, unsigned size, uint64_t value)
	MMIO write inside the ELC window: byte shadow + ELSEGR0 trigger.
static RA8_INTERNAL void	internal_dtc_report (void)
	End-of-run DTC section: activations and bytes moved.
static RA8_INTERNAL void	internal_dtc_block_register (void)
	Register the DTC control + ELC ELSEGR windows before main runs.

Variables
static dtc_state_t	s_dtc
static uint8_t	s_elc [k_elc_span]
	ELC register-window shadow (ELCR / ELSEGR / ELSR).
static const board_periph_block_t	s_k_dtc_block
	DTC control-window descriptor (owns reset + report).
static const board_periph_block_t	s_k_elc_block
	ELC ELSEGR-window descriptor (the DTC activation trigger).

Detailed Description

DTC (Data Transfer Controller) transfer-engine model for ra8_emulator.

Models the RA8D2 DTC (ra8_dtc_regs.h, ra8_dtc.c) so an interrupt-activated descriptor-table transfer actually MOVES bytes in emulated memory, instead of the control window merely shadowing register writes. Against the sparse fallback / the old transparent DTC shadow, dtc_transfer_demo programmed a Transfer Information (TI) block and fired ELC software event 0 but the destination was never written, so the demo reported match=N. This block performs the copy on the activation event, flipping that to match=Y.

Unlike the DMAC (software-triggered by a register write inside its own window), the DTC is activated by an interrupt request: an IELSR slot with its DTCE bit set, linked to the firing event, activates the controller. The demo routes ELC software event 0 (ELC_SWEVT0 = 0x0CC) to such a slot and fires it with the three-step ELSEGR0 write sequence. This model therefore owns two register windows:

DTC control window (0x4000AC00): tracks DTCVBR (the vector-table base, +0x04) so an activation can find the per-slot TI pointer; DTCCR / DTCST / DTCSTS read back as written so the driver bring-up succeeds.
ELC ELSEGR window (0x40201000): watches ELSEGR0 (+0x04). The third write of the unlock / arm / trigger sequence (value 0x41, SEG=1) fires software event 0 -> this model runs the DTC.

Activation walks the copy:

Resolve the IELSR slot linked to the event with DTCE set, via board_periph_icu_dtc_slot (the core owns the IELSR table).
Read the 4-byte vector-table entry at DTCVBR + slot*4 (its low bit is the privilege attribution, masked off) to get the 16-byte-aligned TI.
Read the TI block (MR / SAR / DAR / CRB / CRA) from emulated memory.
Decode MRA.SZ for the unit width (byte / 16-bit / 32-bit) and MRA.SM / MRB.DM for the source / destination address-increment modes, then copy CRA * CRB units (block mode CRA = block size, CRB = block count; normal mode CRB = 0 -> CRA units) from SAR to DAR with uc_mem_read / uc_mem_write, advancing each address by the unit size when its mode is "increment".
Re-raise the linked event through the core's ICU -> NVIC path so the transfer-complete interrupt the firmware waits on is delivered.

The transfer is synchronous (performed inside the ELSEGR trigger write), so a firmware poll on the destination settling falls straight through.

Copyright: Copyright (c) 2026 Brighton Sikarskie SPDX-License-Identifier: MIT

Since: 0.1.0

Definition in file board_periph_dtc.c.

Enumeration Type Documentation

◆ dtc_console_t

enum dtc_console_t : uint32_t

Console-tap line buffer capacity for a DTC transfer summary.

Enumerator
k_dtc_console_line_cap	Max chars in a "DTC .. units" line.

Definition at line 59 of file board_periph_dtc.c.

◆ dtc_count_t

enum dtc_count_t : uint32_t

DTC transfer-count encoding quirks (HUM 18.2.7).

Enumerator
k_dtc_block_cra_zero	Block mode CRA = 0 encodes a 256-unit block.

Definition at line 113 of file board_periph_dtc.c.

◆ dtc_geom_t

enum dtc_geom_t : uint64_t

DTC control-window geometry (ra8_dtc_regs.h, r_dtc_regs_t).

Enumerator
k_dtc_base	DTC control-register base.
k_dtc_span	Covers DTCCR..DTCSQE comfortably.
k_dtc_off_dtccr	DTCCR control (8b).
k_dtc_off_dtcvbr	DTCVBR vector base (32b).
k_dtc_off_dtcst	DTCST module start (8b).
k_dtc_off_dtcsts	DTCSTS status (16b).

Definition at line 64 of file board_periph_dtc.c.

◆ dtc_mr_field_t

enum dtc_mr_field_t : uint32_t

MR mode-word field extraction (MRA in the top byte, MRB next).

Enumerator
k_mr_mra_shift	MRA occupies MR[31:24].
k_mr_mrb_shift	MRB occupies MR[23:16].
k_mra_md_pos	MRA.MD[7:6] transfer mode.
k_mra_sz_pos	MRA.SZ[5:4] unit width.
k_mra_sm_pos	MRA.SM[3:2] source-address mode.
k_mrb_dm_pos	MRB.DM[3:2] dest-address mode.
k_mr_2bit_mask	Two-bit field mask.
k_mra_md_block	MD = 10b: block transfer.
k_mr_addr_inc	SM / DM = 10b: increment the address.
k_mra_sz_byte	SZ = 00b: 8-bit unit.
k_mra_sz_word	SZ = 10b: 32-bit unit.
k_mra_sz_half	SZ = 01b: 16-bit unit.
k_mr_byte_mask	Eight-bit field mask (one MRA/MRB byte).

Definition at line 96 of file board_periph_dtc.c.

◆ dtc_order_t

enum dtc_order_t : uint32_t

Per-tick order slot for the DTC block (relative order only).

Enumerator
k_dtc_block_order	Just after the DMAC block; report order.

Definition at line 126 of file board_periph_dtc.c.

◆ dtc_ti_off_t

enum dtc_ti_off_t : uint32_t

DTC TI block field offsets (r_dtc_xfer_info_t, HUM Figure 18.4).

Enumerator
k_ti_off_mr	MR mode word ([31:24] MRA, [23:16] MRB).
k_ti_off_sar	SAR source address.
k_ti_off_dar	DAR destination address.
k_ti_off_crb	CRB block count (16b).
k_ti_off_cra	CRA transfer count (16b).

Definition at line 87 of file board_periph_dtc.c.

◆ dtc_vt_geom_t

enum dtc_vt_geom_t : uint32_t

Vector-table entry layout (DTCVBR + slot*4 -> TI start).

Enumerator
k_dtc_vt_entry_bytes	One 4-byte pointer per IELSR slot.
k_dtc_ti_addr_mask	Strip bit0 (privilege attribute).
k_dtc_max_units	Sanity cap on a single activation.
k_dtc_ielsr_slots	Number of IELSR slots (0..95).

Definition at line 118 of file board_periph_dtc.c.

◆ elc_geom_t

enum elc_geom_t : uint64_t

ELC ELSEGR-window geometry (ra8_elc_regs.h).

Enumerator
k_elc_base	R_ELC base.
k_elc_span	Covers ELCR / ELSEGR[0..3] / ELSR.
k_elc_off_elsegr0	ELSEGR0 software-event gen (8b).

Definition at line 74 of file board_periph_dtc.c.

◆ elc_swevt_t

enum elc_swevt_t : uint32_t

ELC software event 0 number and its ELSEGR trigger value.

Enumerator
k_elc_swevt0_event	ELC_SWEVT0 event (HUM Table 19.3).
k_elc_elsegr_trigger	WE=1, SEG=1: fires the software event.

Definition at line 81 of file board_periph_dtc.c.

Function Documentation

◆ internal_dtc_activate_swevt0()

RA8_INTERNAL void internal_dtc_activate_swevt0 ( uc_engine * uc )

static

Run the DTC for ELC software event 0 if a DTCE slot links it.

Run the dtc for elc software event 0 if a dtce slot links it; this step is contained within the board periph DTC model and uses bounded caller or module-owned storage.

Parameters

[in,out] uc Unicorn engine whose emulated state is read or updated.

Precondition: Arguments satisfy the ranges documented for DTC activate swevt0.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph DTC model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 352 of file board_periph_dtc.c.

References board_periph_icu_dtc_slot(), internal_dtc_mem_read(), internal_dtc_run_transfer(), k_dtc_ielsr_slots, k_dtc_ti_addr_mask, k_dtc_vt_entry_bytes, k_elc_swevt0_event, RA8_INTERNAL, and s_dtc.

Referenced by internal_elc_write().

◆ internal_dtc_block_register()

RA8_INTERNAL void internal_dtc_block_register ( void )

static

Register the DTC control + ELC ELSEGR windows before main runs.

Definition at line 552 of file board_periph_dtc.c.

References board_periph_register_block(), RA8_INTERNAL, s_k_dtc_block, and s_k_elc_block.

◆ internal_dtc_copy_units()

RA8_INTERNAL void internal_dtc_copy_units	(	uc_engine *	uc,
		const dtc_ti_t *	ti,
		uint32_t	units,
		uint32_t	unit )

static

Copy units units of unit bytes from SAR to DAR.

Each address advances by the unit size when its MRA.SM / MRB.DM mode is "increment", and stays put otherwise – which is how a fixed-address peripheral register reads or writes the whole run.

Parameters

[in]	uc	Unicorn engine holding the emulated memory.
[in]	ti	Decoded descriptor supplying the addresses and modes.
[in]	units	Unit count to move (bounded by internal_dtc_unit_count).
[in]	unit	Unit width in bytes (1, 2 or 4).

Precondition: uc and ti are non-null.; unit is 1, 2 or 4, so the scratch buffer cannot overrun.

Postcondition: units units have been written at the destination.; ti is unmodified.

Note: Not thread-safe.

Since: 0.1.0

Definition at line 297 of file board_periph_dtc.c.

References dtc_ti_t::dar, dtc_ti_t::dm, emu_mem_read(), emu_mem_write(), k_mr_addr_inc, dtc_ti_t::sar, and dtc_ti_t::sm.

Referenced by internal_dtc_run_transfer().

◆ internal_dtc_decode_ti()

RA8_INTERNAL void internal_dtc_decode_ti	(	uc_engine *	uc,
		uint32_t	ti_addr,
		dtc_ti_t *	out )

static

Read and decode the TI block at ti_addr into out.

Parameters

[in]	uc	Unicorn engine holding the emulated memory.
[in]	ti_addr	16-byte-aligned address of the TI block.
[out]	out	Receives the decoded descriptor.

Precondition: uc and out are non-null.; ti_addr is mapped in the emulated address space.

Postcondition: Every field of out is written.; Emulated memory is unchanged (reads only).

Note: Not thread-safe.

Read and decode the ti block at ti_addr into out; this step is contained within the board periph DTC model and uses bounded caller or module-owned storage.

Since: 0.1.0

Definition at line 228 of file board_periph_dtc.c.

References dtc_ti_t::cra, dtc_ti_t::crb, dtc_ti_t::dar, dtc_ti_t::dm, internal_dtc_mem_read(), k_mr_2bit_mask, k_mr_byte_mask, k_mr_mra_shift, k_mr_mrb_shift, k_mra_md_pos, k_mra_sm_pos, k_mra_sz_pos, k_mrb_dm_pos, k_ti_off_cra, k_ti_off_crb, k_ti_off_dar, k_ti_off_mr, k_ti_off_sar, dtc_ti_t::md, RA8_INTERNAL, dtc_ti_t::sar, dtc_ti_t::sm, and dtc_ti_t::sz.

Referenced by internal_dtc_run_transfer().

◆ internal_dtc_mem_read()

RA8_INTERNAL uint32_t internal_dtc_mem_read	(	uc_engine *	uc,
		uint64_t	addr,
		uint32_t	bytes )

static

Read a little-endian word of bytes from emulated memory.

Read a little-endian word of bytes from emulated memory; this step is contained within the board periph DTC model and uses bounded caller or module-owned storage.

Parameters

[in,out]	uc	Unicorn engine whose emulated state is read or updated.
[in]	addr	Guest address involved in the operation.
[in]	bytes	Byte storage transferred by the operation.

Returns: The DTC mem read result produced by the board periph DTC model.

Return values

value The operation-specific DTC mem read value.

Precondition: Arguments satisfy the ranges documented for DTC mem read.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph DTC model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 187 of file board_periph_dtc.c.

References emu_mem_read(), and RA8_INTERNAL.

Referenced by internal_dtc_activate_swevt0(), and internal_dtc_decode_ti().

◆ internal_dtc_read()

RA8_INTERNAL uint64_t internal_dtc_read	(	uc_engine *	uc,
		uint64_t	addr,
		unsigned	size )

static

MMIO read inside the DTC control window.

MMIO read inside the dtc control window; this step is contained within the board periph DTC model and uses bounded caller or module-owned storage.

Parameters

[in,out]	uc	Unicorn engine whose emulated state is read or updated.
[in]	addr	Guest address involved in the operation.
[in]	size	Size of the requested region or access in bytes.

Returns: The DTC read result produced by the board periph DTC model.

Return values

value The operation-specific DTC read value.

Precondition: Arguments satisfy the ranges documented for DTC read.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph DTC model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 406 of file board_periph_dtc.c.

References k_dtc_base, k_dtc_off_dtccr, k_dtc_off_dtcst, k_dtc_off_dtcsts, k_dtc_off_dtcvbr, RA8_INTERNAL, and s_dtc.

◆ internal_dtc_report()

RA8_INTERNAL void internal_dtc_report ( void )

static

End-of-run DTC section: activations and bytes moved.

End-of-run dtc section: activations and bytes moved; this step is contained within the board periph DTC model and uses bounded caller or module-owned storage.

Precondition: Arguments satisfy the ranges documented for DTC report.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph DTC model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 514 of file board_periph_dtc.c.

References priv_emu_io_errf(), RA8_INTERNAL, and s_dtc.

◆ internal_dtc_reset()

RA8_INTERNAL void internal_dtc_reset ( void )

static

Reset the DTC model (and the ELC shadow) to power-on state.

Reset the dtc model (and the elc shadow) to power-on state; this step is contained within the board periph DTC model and uses bounded caller or module-owned storage.

Precondition: Arguments satisfy the ranges documented for DTC reset.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph DTC model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 385 of file board_periph_dtc.c.

References k_elc_span, RA8_INTERNAL, s_dtc, and s_elc.

◆ internal_dtc_run_transfer()

RA8_INTERNAL void internal_dtc_run_transfer	(	uc_engine *	uc,
		uint32_t	ti_addr )

static

Perform the SAR->DAR copy described by one TI block.

Perform the sar->dar copy described by one ti block; this step is contained within the board periph DTC model and uses bounded caller or module-owned storage.

Parameters

[in,out]	uc	Unicorn engine whose emulated state is read or updated.
[in]	ti_addr	Address of the ti region.

Precondition: Arguments satisfy the ranges documented for DTC run transfer.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph DTC model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 322 of file board_periph_dtc.c.

References board_console_push(), internal_dtc_copy_units(), internal_dtc_decode_ti(), internal_dtc_unit_bytes(), internal_dtc_unit_count(), k_board_console_ch_dma, k_dtc_console_line_cap, RA8_INTERNAL, s_dtc, and dtc_ti_t::sz.

Referenced by internal_dtc_activate_swevt0().

◆ internal_dtc_unit_bytes()

RA8_INTERNAL uint32_t internal_dtc_unit_bytes ( uint32_t sz_code )

static

Bytes per unit for an MRA.SZ code (defaults to byte width).

Bytes per unit for an mra.sz code (defaults to byte width); this step is contained within the board periph DTC model and uses bounded caller or module-owned storage.

Parameters

[in] sz_code Sz code input used by the operation.

Returns: The DTC unit bytes result produced by the board periph DTC model.

Return values

value The operation-specific DTC unit bytes value.

Precondition: Arguments satisfy the ranges documented for DTC unit bytes.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph DTC model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 163 of file board_periph_dtc.c.

References k_mra_sz_half, k_mra_sz_word, and RA8_INTERNAL.

Referenced by internal_dtc_run_transfer().

◆ internal_dtc_unit_count()

RA8_INTERNAL uint32_t internal_dtc_unit_count ( const dtc_ti_t * ti )

static

Total unit count a descriptor moves, or 0 if it is out of range.

CRA = 0 in block mode encodes a 256-unit block (HUM 18.2.7); otherwise CRA is the unit count. Block mode multiplies that by the CRB block count (CRB = 0 meaning one block). A zero or implausibly large result is reported as 0 so the caller declines the transfer rather than looping on a corrupt descriptor.

Parameters

[in] ti Decoded descriptor.

Returns: Unit count in [1, k_dtc_max_units], or 0 when out of range.

Return values

0	The descriptor asks for no units, or more than the model allows.

Precondition: ti is non-null and fully decoded.; ti->md holds a two-bit MRA.MD code.

Postcondition: The return value is 0 or a bounded loop count.; ti is unmodified.

Note: Not thread-safe with respect to ti.

Since: 0.1.0

Definition at line 263 of file board_periph_dtc.c.

References dtc_ti_t::cra, dtc_ti_t::crb, k_dtc_block_cra_zero, k_dtc_max_units, k_mra_md_block, dtc_ti_t::md, and RA8_INTERNAL.

Referenced by internal_dtc_run_transfer().

◆ internal_dtc_write()

RA8_INTERNAL void internal_dtc_write	(	uc_engine *	uc,
		uint64_t	addr,
		unsigned	size,
		uint64_t	value )

static

MMIO write inside the DTC control window.

MMIO write inside the dtc control window; this step is contained within the board periph DTC model and uses bounded caller or module-owned storage.

Parameters

[in,out]	uc	Unicorn engine whose emulated state is read or updated.
[in]	addr	Guest address involved in the operation.
[in]	size	Size of the requested region or access in bytes.
[in]	value	Register or payload value involved in the operation.

Precondition: Arguments satisfy the ranges documented for DTC write.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph DTC model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 439 of file board_periph_dtc.c.

References k_dtc_base, k_dtc_off_dtccr, k_dtc_off_dtcst, k_dtc_off_dtcsts, k_dtc_off_dtcvbr, and s_dtc.

◆ internal_elc_read()

RA8_INTERNAL uint64_t internal_elc_read	(	uc_engine *	uc,
		uint64_t	addr,
		unsigned	size )

static

MMIO read inside the ELC window (transparent byte shadow).

MMIO read inside the elc window (transparent byte shadow); this step is contained within the board periph DTC model and uses bounded caller or module-owned storage.

Parameters

[in,out]	uc	Unicorn engine whose emulated state is read or updated.
[in]	addr	Guest address involved in the operation.
[in]	size	Size of the requested region or access in bytes.

Returns: The elc read result produced by the board periph DTC model.

Return values

value The operation-specific elc read value.

Precondition: Arguments satisfy the ranges documented for elc read.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph DTC model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 468 of file board_periph_dtc.c.

References k_elc_base, k_elc_span, RA8_INTERNAL, and s_elc.

◆ internal_elc_write()

RA8_INTERNAL void internal_elc_write	(	uc_engine *	uc,
		uint64_t	addr,
		unsigned	size,
		uint64_t	value )

static

MMIO write inside the ELC window: byte shadow + ELSEGR0 trigger.

MMIO write inside the elc window: byte shadow + elsegr0 trigger; this step is contained within the board periph DTC model and uses bounded caller or module-owned storage.

Parameters

[in,out]	uc	Unicorn engine whose emulated state is read or updated.
[in]	addr	Guest address involved in the operation.
[in]	size	Size of the requested region or access in bytes.
[in]	value	Register or payload value involved in the operation.

Precondition: Arguments satisfy the ranges documented for elc write.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph DTC model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 492 of file board_periph_dtc.c.

References internal_dtc_activate_swevt0(), k_elc_base, k_elc_elsegr_trigger, k_elc_off_elsegr0, k_elc_span, and s_elc.

Variable Documentation

◆ s_dtc

dtc_state_t s_dtc

static

Definition at line 140 of file board_periph_dtc.c.

Referenced by internal_dtc_activate_swevt0(), internal_dtc_read(), internal_dtc_report(), internal_dtc_reset(), internal_dtc_run_transfer(), and internal_dtc_write().

◆ s_elc

uint8_t s_elc[k_elc_span]

static

ELC register-window shadow (ELCR / ELSEGR / ELSR).

The DTC model owns the ELC window only to observe the ELSEGR0 software-event trigger; every ELC register otherwise reads back exactly as written so the ELC driver bring-up (e.g. elc_event_demo reading ELCR.ELCON through ra8_elc_is_enabled, or its ELSR link writes) behaves as before.

Definition at line 150 of file board_periph_dtc.c.

Referenced by internal_dtc_reset(), internal_elc_read(), and internal_elc_write().

◆ s_k_dtc_block

const board_periph_block_t s_k_dtc_block

static

Initial value:

                                                = {
  .base   = (uint64_t)k_dtc_base,
  .span   = (uint64_t)k_dtc_span,
  .order  = (uint32_t)k_dtc_block_order,
  .read   = internal_dtc_read,
  .write  = internal_dtc_write,
  .tick   = nullptr,
  .reset  = internal_dtc_reset,
  .report = internal_dtc_report,
  .name   = "DTC",
}

DTC control-window descriptor (owns reset + report).

Definition at line 526 of file board_periph_dtc.c.

Referenced by internal_dtc_block_register().

◆ s_k_elc_block

const board_periph_block_t s_k_elc_block

static

Initial value:

                                                = {
  .base   = (uint64_t)k_elc_base,
  .span   = (uint64_t)k_elc_span,
  .order  = (uint32_t)k_dtc_block_order,
  .read   = internal_elc_read,
  .write  = internal_elc_write,
  .tick   = nullptr,
  .reset  = nullptr,
  .report = nullptr,
  .name   = "ELC/DTC-trig",
}

ELC ELSEGR-window descriptor (the DTC activation trigger).

Definition at line 539 of file board_periph_dtc.c.

Referenced by internal_dtc_block_register().

Data Structures

Enumerations

Functions

Variables

Detailed Description

Enumeration Type Documentation

◆ dtc_console_t

◆ dtc_count_t

◆ dtc_geom_t

◆ dtc_mr_field_t

◆ dtc_order_t

◆ dtc_ti_off_t

◆ dtc_vt_geom_t

◆ elc_geom_t

◆ elc_swevt_t

Function Documentation

◆ internal_dtc_activate_swevt0()

◆ internal_dtc_block_register()

◆ internal_dtc_copy_units()

◆ internal_dtc_decode_ti()

◆ internal_dtc_mem_read()

◆ internal_dtc_read()

◆ internal_dtc_report()

◆ internal_dtc_reset()

◆ internal_dtc_run_transfer()

◆ internal_dtc_unit_bytes()

◆ internal_dtc_unit_count()

◆ internal_dtc_write()

◆ internal_elc_read()

◆ internal_elc_write()

Variable Documentation

◆ s_dtc

◆ s_elc

◆ s_k_dtc_block

◆ s_k_elc_block