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ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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Module-private link seam shared between the MIPI D-PHY drivertranslation units. More...
Go to the source code of this file.
Functions | |
| void | priv_mipi_phy_write_timing (const ra8_mipi_phy_timing_t *t) |
| Write the six DPHYTIMx registers from the timing block. | |
| uint32_t | priv_mipi_phy_compute_freq (const ra8_mipi_phy_pll_t *pll, uint8_t mosc_mhz) |
| Compute the PLL output frequency for a (mosc, pll) tuple. | |
Module-private link seam shared between the MIPI D-PHY driver
translation units.
The MIPI D-PHY driver is implemented across more than one translation unit so that no single file exceeds the scripts/checks/check_file_size.py cap. The lifecycle / power / mode / lane / status / IRQ path lives in ra8_mipi_phy.c; the bulky HUM Tables 64.2 (DSI) / 64.3 (CSI) timing matrix, its lookup walker, the PLL-frequency arithmetic helper, and the ra8_mipi_phy_select_timing surface live in ra8_mipi_phy_timing.c. Two helper functions are called across the two TUs and are declared here.
This header is private to the MIPI D-PHY driver only – no other module includes it. It exports:
Read-only constants (the log tag) and the file-scope mutable driver state are intentionally NOT shared: each is confined to the single TU that uses it.
Definition in file ra8_mipi_phy_internal.h.
| uint32_t priv_mipi_phy_compute_freq | ( | const ra8_mipi_phy_pll_t * | pll, |
| uint8_t | mosc_mhz ) |
Compute the PLL output frequency for a (mosc, pll) tuple.
Defined in ra8_mipi_phy_timing.c and shared with ra8_mipi_phy_validate_pll_band in ra8_mipi_phy.c. Implements the HUM Ch 64.2.2 p 3823 relation f = fMAIN * I * (NF + N) * P using hundredths fixed-point arithmetic.
| [in] | pll | PLL coefficient block (IDIV / NFMUL / PMUL / NMUL). |
| [in] | mosc_mhz | Main-oscillator frequency in MHz. |
| 0 | The composed divisor product was zero. |
| other | Computed PLL output frequency in MHz. |
Definition at line 880 of file ra8_mipi_phy_timing.c.
References ra8_mipi_phy_pll_t::idiv, k_mipi_nf_x100_33, k_mipi_nf_x100_50, k_mipi_nf_x100_66, k_mipi_pll_percent_scale, ra8_mipi_phy_pll_t::nfmul, ra8_mipi_phy_pll_t::nmul_int, and ra8_mipi_phy_pll_t::pmul.
Referenced by ra8_mipi_phy_validate_pll_band().
| void priv_mipi_phy_write_timing | ( | const ra8_mipi_phy_timing_t * | t | ) |
Write the six DPHYTIMx registers from the timing block.
Defined in ra8_mipi_phy.c and shared with the table-driven ra8_mipi_phy_select_timing in ra8_mipi_phy_timing.c. Programs DPHYTIM1..DPHYTIM6 (HUM Ch 64.2.8 - 64.2.13 p 3827-3830) from the caller-supplied timing snapshot.
| [in] | t | Timing block whose fields are packed into DPHYTIM1..6. |
Write the six DPHYTIMx registers from the timing block.
Definition at line 248 of file ra8_mipi_phy.c.
References k_ra8_mipi_phy_off_tim1, k_ra8_mipi_phy_off_tim2, k_ra8_mipi_phy_off_tim3, k_ra8_mipi_phy_off_tim4, k_ra8_mipi_phy_off_tim5, k_ra8_mipi_phy_off_tim6, k_ra8_mipi_phy_tim1_tinit_mask, k_ra8_mipi_phy_tim6_tlpx_mask, k_ra8_mipi_phy_tim_byte_mask, k_ra8_mipi_phy_tim_shift_b0, k_ra8_mipi_phy_tim_shift_b1, k_ra8_mipi_phy_tim_shift_b2, k_ra8_mipi_phy_tim_shift_b3, ra8_mipi_phy_reg32(), ra8_mipi_phy_timing_t::tclkmiss, ra8_mipi_phy_timing_t::tclkpost, ra8_mipi_phy_timing_t::tclkpre, ra8_mipi_phy_timing_t::tclkprep, ra8_mipi_phy_timing_t::tclksett, ra8_mipi_phy_timing_t::tclktrl, ra8_mipi_phy_timing_t::tclkzero, ra8_mipi_phy_timing_t::thsexit, ra8_mipi_phy_timing_t::thsprep, ra8_mipi_phy_timing_t::thssett, ra8_mipi_phy_timing_t::thstrl, ra8_mipi_phy_timing_t::thszero, ra8_mipi_phy_timing_t::tinit, and ra8_mipi_phy_timing_t::tlpx.
Referenced by ra8_mipi_phy_init(), and ra8_mipi_phy_select_timing().