46static const char*
s_tag =
"CANFD";
59typedef enum : uint32_t {
103 uint32_t bitrate_bps,
104 uint32_t prescaler_max,
108 if ((bitrate_bps == 0U) || (clock_hz == 0U)) {
112 const uint32_t denom = bitrate_bps * tq;
113 if ((clock_hz % denom) != 0U) {
116 const uint32_t prescaler = clock_hz / denom;
117 if (prescaler > prescaler_max) {
121 const uint32_t tseg1 = ((tq - 1U) * 3U) / 4U;
122 const uint32_t tseg2 = (tq - 1U) - tseg1;
161 return brp_field | tseg1_field | tseg2_field | sjw_field;
193 return brp_field | tseg1_field | tseg2_field | sjw_field;
201 uint32_t pclka_hz = 0U;
230 if ((data_bitrate_bps != 0U) && (data_bitrate_bps > bitrate_bps)) {
277 if (data_bitrate == 0U) {
280 uint32_t pclka_hz = 0U;
static const char * s_tag
Logging / check tag.
Annotation-attribute framework macros for ra8-firmware.
#define RA8_INTERNAL
Marker that a function is intended to be static (file-local).
ra8_err_t priv_ra8_canfd_internal_set_channel_mode(volatile r_canfd_t *reg, ra8_chmdc_mode_t mode)
Drive CFDC[0].CTR.CHMDC and wait for the matching status bit.
CANFD Lite driver (bit-timing, TX, RX, error state).
CANFD controller register layout for the Renesas RA8D2.
@ k_ra8_chmdc_operation
Bus operation mode.
@ k_ra8_chmdc_reset
Reset mode.
@ k_ra8_cncfg_mask_ntseg2
[31:25] 7-bit TSEG2 field.
@ k_ra8_cncfg_mask_ntseg1
[24:17] 8-bit TSEG1 field.
@ k_ra8_cncfg_mask_nsjw
[16:10] 7-bit SJW field.
@ k_ra8_cncfg_mask_nbrp
[9:0] 10-bit prescaler field.
@ k_ra8_canfd_sjw_max
Nominal SJW cap.
@ k_ra8_canfd_prescaler_max
Largest valid nominal prescaler.
@ k_ra8_canfd_data_prescaler_max
Largest valid data prescaler (8-bit).
@ k_ra8_cncfg_shift_ntseg1
RA8 cncfg shift ntseg1.
@ k_ra8_cncfg_shift_nsjw
RA8 cncfg shift nsjw.
@ k_ra8_cncfg_shift_ntseg2
RA8 cncfg shift ntseg2.
@ k_ra8_cncfg_shift_nbrp
RA8 cncfg shift nbrp.
static volatile r_canfd_t * ra8_canfd(uint8_t channel)
Get pointer to CANFD instance N (0..1).
@ k_ra8_dcfg_shift_dbrp
RA8 dcfg shift dbrp.
@ k_ra8_dcfg_shift_dtseg1
RA8 dcfg shift dtseg1.
@ k_ra8_dcfg_shift_dtseg2
RA8 dcfg shift dtseg2.
@ k_ra8_dcfg_shift_dsjw
RA8 dcfg shift dsjw.
@ k_ra8_dcfg_mask_dbrp
[7:0] 8-bit DBRP.
@ k_ra8_dcfg_mask_dtseg1
[12:8] 5-bit DTSEG1.
@ k_ra8_dcfg_mask_dsjw
[27:24] 4-bit DSJW.
@ k_ra8_dcfg_mask_dtseg2
[19:16] 4-bit DTSEG2.
static uint32_t internal_pack_ncfg(const ra8_canfd_timing_t *t)
Pack a resolved timing triple into the CFDC[0].NCFG layout.
static uint32_t internal_pack_dcfg(const ra8_canfd_timing_t *t)
Pack a resolved timing triple into the CFDC2[0].DCFG layout.
ra8_err_t ra8_canfd_set_bitrate(uint8_t channel, uint32_t bitrate_bps, uint32_t data_bitrate_bps)
Programme nominal (and optional data) bit-timing registers.
ra8_err_t ra8_canfd_set_brs(uint8_t channel, uint32_t fast_bitrate)
Configure the CAN-FD bit-rate-switch (BRS) data-phase rate.
ra8_canfd_timing_search_t
Quanta-search window owned by the bit-timing solver.
@ k_ra8_canfd_tq_search_hi
Largest time-quanta count tried.
@ k_ra8_canfd_tq_search_lo
Smallest time-quanta count tried.
static ra8_err_t internal_solve_timing(uint32_t clock_hz, uint32_t bitrate_bps, uint32_t prescaler_max, ra8_canfd_timing_t *out)
Walk candidate TQ-per-bit counts until one yields an integer prescaler.
static ra8_err_t internal_program_data_phase(volatile r_canfd_t *reg, uint32_t data_bitrate)
Re-derive the data-phase timing triple and pack it into DCFG.
High-level Clock Generation Circuit driver.
ra8_err_t ra8_cgc_get_clock_hz(ra8_clock_id_t id, uint32_t *out_hz)
Query the current frequency of a clock-tree domain.
@ k_ra8_clock_id_pclka
PCLKA.
Validation and Error-Checking Macros for ra8-firmware.
#define RA8_CHECK_NULL_PTR(ptr, tag, message)
Reject nullptr pointer, returning k_ra8_err_null_ptr.
Error Code Definitions for ra8-firmware.
@ k_ra8_err_invalid_arg
Invalid function argument.
@ k_ra8_ok
Success – operation completed with all postconditions satisfied.
ra8_err_codes_t ra8_err_t
Canonical error-return type used by every ra8-firmware API.
Cross-translation-unit private helpers shared inside ra8_hal.
Lightweight Logging Interface for ra8-firmware.
#define ra8_log_info_val(tag, message, value)
RA8 log info val.
volatile uint32_t DCFG
+0x000 Data Bitrate Config.
volatile uint32_t NCFG
+0x000 Nominal Bitrate Config.
r_canfd_cfdc_t CFDC[1]
CFDC register.
r_canfd_cfdc2_t CFDC2[1]
CFDC2 register (offset 0x100 (0x20)).
Resolved nominal / data phase bit-timing fields.
uint32_t sjw
Sync jump width (pre-subtract-1).
uint32_t tseg2
Phase segment 2 (pre-subtract-1).
uint32_t prescaler
Prescaler integer (pre-subtract-1).
uint32_t tseg1
Phase segment 1 (pre-subtract-1).