CANFD bit-timing solver + bitrate / BRS configuration (split from ra8_canfd.c). More...

#include <stdint.h>
#include "ra8_attributes.h"
#include "ra8_canfd.h"
#include "ra8_canfd_regs.h"
#include "ra8_cgc.h"
#include "ra8_check.h"
#include "ra8_err.h"
#include "ra8_hal_internal.h"
#include "ra8_log.h"

Include dependency graph for ra8_canfd_timing.c:

Data Structures
struct	ra8_canfd_timing_t
	Resolved nominal / data phase bit-timing fields. More...

Enumerations
enum	ra8_canfd_timing_search_t : uint32_t { k_ra8_canfd_tq_search_lo = 8U , k_ra8_canfd_tq_search_hi = 25U }
	Quanta-search window owned by the bit-timing solver. More...

Functions
static ra8_err_t	internal_solve_timing (uint32_t clock_hz, uint32_t bitrate_bps, uint32_t prescaler_max, ra8_canfd_timing_t *out)
	Walk candidate TQ-per-bit counts until one yields an integer prescaler.
static uint32_t	internal_pack_ncfg (const ra8_canfd_timing_t *t)
	Pack a resolved timing triple into the CFDC[0].NCFG layout.
static uint32_t	internal_pack_dcfg (const ra8_canfd_timing_t *t)
	Pack a resolved timing triple into the CFDC2[0].DCFG layout.
ra8_err_t	ra8_canfd_set_bitrate (uint8_t channel, uint32_t bitrate_bps, uint32_t data_bitrate_bps)
	Programme nominal (and optional data) bit-timing registers.
static ra8_err_t	internal_program_data_phase (volatile r_canfd_t *reg, uint32_t data_bitrate)
	Re-derive the data-phase timing triple and pack it into DCFG.
ra8_err_t	ra8_canfd_set_brs (uint8_t channel, uint32_t fast_bitrate)
	Configure the CAN-FD bit-rate-switch (BRS) data-phase rate.

Variables
static const char *	s_tag = "CANFD"

Detailed Description

CANFD bit-timing solver + bitrate / BRS configuration (split from ra8_canfd.c).

Tag: [Ring 3 / HAL] {World: NS}

Bit-timing half of the RA8D2 CANFD driver, split out of ra8_canfd.c purely to satisfy the per-file size cap. This translation unit owns the nominal / data-phase timing solver and the public configuration calls that consume it:

Walk candidate time-quanta-per-bit counts until one yields an integer prescaler, then resolve TSEG1 / TSEG2 / SJW at a 75% sample point.
Pack the resolved triple into the CFDC[0].NCFG (nominal) and CFDC2[0].DCFG (data) register layouts.
ra8_canfd_set_bitrate (nominal + optional data phase) and ra8_canfd_set_brs (data-phase-only) drive the channel through CH_RESET to land the edits, using the promoted priv_ra8_canfd_internal_set_channel_mode helper whose definition stays in ra8_canfd.c beside the rest of the mode machinery.

Every register access carries a HUM Ch 41 "CAN with Flexible Data-rate (CANFD)" citation (pages 2702..2867, chapter map row 41) or an FSP r_canfd.c line citation when the bit semantics come from the reference driver.

Copyright: Copyright (c) 2026 Brighton Sikarskie SPDX-License-Identifier: MIT

Since: 0.1.0

Definition in file ra8_canfd_timing.c.

Enumeration Type Documentation

◆ ra8_canfd_timing_search_t

enum ra8_canfd_timing_search_t : uint32_t

Quanta-search window owned by the bit-timing solver.

Private copy of the matching constants in ra8_canfd.c; this TU only needs the time-quanta-per-bit search bounds. k_ra8_canfd_tq_search_lo / k_ra8_canfd_tq_search_hi are read-only compile-time constants, so each translation unit keeps its own copy rather than promoting them to external linkage.

Enumerator
k_ra8_canfd_tq_search_lo	Smallest time-quanta count tried.
k_ra8_canfd_tq_search_hi	Largest time-quanta count tried.

Definition at line 59 of file ra8_canfd_timing.c.

Function Documentation

◆ internal_pack_dcfg()

uint32_t internal_pack_dcfg ( const ra8_canfd_timing_t * t )

static

Pack a resolved timing triple into the CFDC2[0].DCFG layout.

FSP r_canfd.c line ~432: DBRP/DSJW/DTSEG1/DTSEG2 with NARROWER fields (8/4/5/4 bits) and DIFFERENT shifts (0/24/8/16).

Parameters

[in] t See header declaration for direction and constraints.

Returns: ra8_err_t error code (or void if the signature returns void).

Return values

k_ra8_ok	Success path.
k_ra8_err_invalid_arg	Caller violated a precondition.

Precondition: Driver state has been initialized by the matching *_init.; Caller has validated all pointer parameters.

Postcondition: Side effects are limited to those documented in the header.; No global state is modified on the error path.

Note: Thread safety: see the header declaration.

Since: 0.1.0

Definition at line 183 of file ra8_canfd_timing.c.

References k_ra8_dcfg_mask_dbrp, k_ra8_dcfg_mask_dsjw, k_ra8_dcfg_mask_dtseg1, k_ra8_dcfg_mask_dtseg2, k_ra8_dcfg_shift_dbrp, k_ra8_dcfg_shift_dsjw, k_ra8_dcfg_shift_dtseg1, k_ra8_dcfg_shift_dtseg2, ra8_canfd_timing_t::prescaler, ra8_canfd_timing_t::sjw, ra8_canfd_timing_t::tseg1, and ra8_canfd_timing_t::tseg2.

Referenced by internal_program_data_phase(), and ra8_canfd_set_bitrate().

◆ internal_pack_ncfg()

uint32_t internal_pack_ncfg ( const ra8_canfd_timing_t * t )

static

Pack a resolved timing triple into the CFDC[0].NCFG layout.

FSP r_canfd.c line ~422: NBRP/NSJW/NTSEG1/NTSEG2 each minus 1.

Parameters

[in] t See header declaration for direction and constraints.

Returns: ra8_err_t error code (or void if the signature returns void).

Return values

k_ra8_ok	Success path.
k_ra8_err_invalid_arg	Caller violated a precondition.

Precondition: Driver state has been initialized by the matching *_init.; Caller has validated all pointer parameters.

Postcondition: Side effects are limited to those documented in the header.; No global state is modified on the error path.

Note: Thread safety: see the header declaration.

Since: 0.1.0

Definition at line 151 of file ra8_canfd_timing.c.

References k_ra8_cncfg_mask_nbrp, k_ra8_cncfg_mask_nsjw, k_ra8_cncfg_mask_ntseg1, k_ra8_cncfg_mask_ntseg2, k_ra8_cncfg_shift_nbrp, k_ra8_cncfg_shift_nsjw, k_ra8_cncfg_shift_ntseg1, k_ra8_cncfg_shift_ntseg2, ra8_canfd_timing_t::prescaler, ra8_canfd_timing_t::sjw, ra8_canfd_timing_t::tseg1, and ra8_canfd_timing_t::tseg2.

Referenced by ra8_canfd_set_bitrate().

◆ internal_program_data_phase()

ra8_err_t internal_program_data_phase	(	volatile r_canfd_t *	reg,
		uint32_t	data_bitrate )

static

Re-derive the data-phase timing triple and pack it into DCFG.

Helper for ra8_canfd_set_brs: solves for an integer prescaler against PCLKA for the requested data_bitrate, then writes the FSP-aligned DCFG layout. HUM Ch 41 "CFDCnDCFG" pp 2702-2867.

Parameters

[in]	reg	See header declaration for direction and constraints.
[in]	data_bitrate	See header declaration for direction and constraints.

Returns: ra8_err_t error code (or void if the signature returns void).

Return values

k_ra8_ok	Success path.
k_ra8_err_invalid_arg	Caller violated a precondition.

Precondition: Driver state has been initialized by the matching *_init.; Caller has validated all pointer parameters.

Postcondition: Side effects are limited to those documented in the header.; No global state is modified on the error path.

Note: Thread safety: see the header declaration.

Since: 0.1.0

Definition at line 275 of file ra8_canfd_timing.c.

References r_canfd_t::CFDC2, r_canfd_cfdc2_t::DCFG, internal_pack_dcfg(), internal_solve_timing(), k_ra8_canfd_data_prescaler_max, k_ra8_clock_id_pclka, k_ra8_err_invalid_arg, k_ra8_ok, and ra8_cgc_get_clock_hz().

Referenced by ra8_canfd_set_brs().

◆ internal_solve_timing()

ra8_err_t internal_solve_timing	(	uint32_t	clock_hz,
		uint32_t	bitrate_bps,
		uint32_t	prescaler_max,
		ra8_canfd_timing_t *	out )

static

Walk candidate TQ-per-bit counts until one yields an integer prescaler.

See the matching header declaration for the full contract; this site adds no behaviour beyond what the public API documents.

Parameters

[in]	clock_hz	See header declaration for direction and constraints.
[in]	bitrate_bps	See header declaration for direction and constraints.
[in]	prescaler_max	See header declaration for direction and constraints.
[in]	out	See header declaration for direction and constraints.

Returns: ra8_err_t error code (or void if the signature returns void).

Return values

k_ra8_ok	Success path.
k_ra8_err_invalid_arg	Caller violated a precondition.

Precondition: Driver state has been initialized by the matching *_init.; Caller has validated all pointer parameters.

Postcondition: Side effects are limited to those documented in the header.; No global state is modified on the error path.

Note: Thread safety: see the header declaration.

Since: 0.1.0

Definition at line 102 of file ra8_canfd_timing.c.

References k_ra8_canfd_sjw_max, k_ra8_canfd_tq_search_hi, k_ra8_canfd_tq_search_lo, k_ra8_err_invalid_arg, k_ra8_ok, ra8_canfd_timing_t::prescaler, ra8_canfd_timing_t::sjw, ra8_canfd_timing_t::tseg1, and ra8_canfd_timing_t::tseg2.

Referenced by internal_program_data_phase(), and ra8_canfd_set_bitrate().

◆ ra8_canfd_set_bitrate()

ra8_err_t ra8_canfd_set_bitrate	(	uint8_t	channel,
		uint32_t	bitrate_bps,
		uint32_t	data_bitrate_bps )

nodiscard

Programme nominal (and optional data) bit-timing registers.

Uses PCLKA as the CAN source clock (HUM default). Targets a 75% sample point (TSEG1=15, TSEG2=4, SJW=min(4,TSEG2)) and rejects any bit rate that does not resolve to an integer prescaler in 1..256.

Parameters

[in]	channel	Channel index (0..1).
[in]	bitrate_bps	Nominal-phase bit rate in bits per second.
[in]	data_bitrate_bps	Data-phase bit rate (for CAN-FD). Set to bitrate_bps (or 0) for classic-only.

Returns: k_ra8_err_null_ptr if channel out of range.; k_ra8_err_invalid_arg if either bit rate is zero or does not resolve to a valid prescaler / timing triple.; k_ra8_ok on success.

Since: 0.1.0

Definition at line 196 of file ra8_canfd_timing.c.

References r_canfd_t::CFDC, r_canfd_t::CFDC2, r_canfd_cfdc2_t::DCFG, internal_pack_dcfg(), internal_pack_ncfg(), internal_solve_timing(), k_ra8_canfd_data_prescaler_max, k_ra8_canfd_prescaler_max, k_ra8_chmdc_operation, k_ra8_chmdc_reset, k_ra8_clock_id_pclka, k_ra8_ok, r_canfd_cfdc_t::NCFG, priv_ra8_canfd_internal_set_channel_mode(), ra8_canfd(), ra8_cgc_get_clock_hz(), RA8_CHECK_NULL_PTR, ra8_log_info_val, and s_tag.

Referenced by internal_can_demo_setup_or_halt(), internal_canfd_demo_setup_or_halt(), internal_canfd_filter_setup_or_halt(), and main().

◆ ra8_canfd_set_brs()

ra8_err_t ra8_canfd_set_brs	(	uint8_t	channel,
		uint32_t	fast_bitrate )

nodiscard

Configure the CAN-FD bit-rate-switch (BRS) data-phase rate.

Re-runs the data-phase timing solver against PCLKA and updates CFDC2[0].DCFG so that subsequent BRS frames sent on channel use fast_bitrate during the payload phase. See HUM Ch 41 "CFDCnDCFG" pp 2702-2867.

Parameters

[in]	channel	Channel index (0..1).
[in]	fast_bitrate	Data-phase bit rate in bits per second.

Returns: ra8_err_t outcome.

Return values

k_ra8_ok	DCFG updated.
k_ra8_err_null_ptr	`channel` out of range.
k_ra8_err_invalid_arg	`fast_bitrate` is zero or unsolvable.

Precondition: ra8_canfd_init succeeded for channel.; PCLKA frequency is reachable via ra8_cgc_get_clock_hz.

Postcondition: CFDC2[0].DCFG reflects the new fast-phase timing triple.; Subsequent BRS frames switch to fast_bitrate after BRS bit.

Note: Not thread-safe.

Since: 0.1.0

Definition at line 296 of file ra8_canfd_timing.c.

References internal_program_data_phase(), ra8_canfd(), RA8_CHECK_NULL_PTR, and s_tag.

Variable Documentation

◆ s_tag

const char* s_tag = "CANFD"

static

Definition at line 46 of file ra8_canfd_timing.c.

Data Structures

Enumerations

Functions

Variables

Detailed Description

Enumeration Type Documentation

◆ ra8_canfd_timing_search_t

Function Documentation

◆ internal_pack_dcfg()

◆ internal_pack_ncfg()

◆ internal_program_data_phase()

◆ internal_solve_timing()

◆ ra8_canfd_set_bitrate()

◆ ra8_canfd_set_brs()

Variable Documentation

◆ s_tag