DOTF (Decryption On The Fly) bring-up + AES self-test demo (EK-RA8D2). More...

#include <stdint.h>
#include "ra8_attributes.h"
#include "ra8_board_ek_ra8d2.h"
#include "ra8_boot_entry.h"
#include "ra8_cgc.h"
#include "ra8_check.h"
#include "ra8_dotf.h"
#include "ra8_err.h"
#include "ra8_isr.h"
#include "ra8_mstp.h"
#include "ra8_time.h"

Include dependency graph for main.c:

Enumerations
enum	dotf_demo_config_t : uint32_t { k_dotf_demo_baud = 115200U , k_dotf_demo_period_ms = 1000U }
	Compile-time settings. More...
enum	dotf_demo_chan_t : uint8_t { k_dotf_demo_ch0 = 0U , k_dotf_demo_ch1 = 1U }
	DOTF channels exercised by the demo. More...
enum	dotf_demo_sentinel_t : uint32_t { k_dotf_demo_err_unset = 0xFFFFFFFFU }
	Sentinel for "ra8_dotf_init has not run yet" in g_dotf_init_err. More...

Functions
static void	internal_dotf_demo_panic_halt (void)
	Park the processor after an unrecoverable DOTF demo failure.
static void	internal_dotf_demo_setup_or_halt (void)
	Bring CGC, SysTick, SCI8, LEDs, and MSTP up.
static uint8_t	internal_dotf_demo_verdict (ra8_err_t st0_err, ra8_err_t st1_err, ra8_err_t status_err)
	Verdict: both channels' self-test + status calls succeeded.
static ra8_err_t	internal_dotf_demo_sample (uint8_t *out_ok)
	Self-test both channels and read REG00 back; fold into the verdict.
void	main (void)
	The application entry point Reset_Handler hands control to.

Variables
static const char *	s_tag = "dotf_demo"
	Diagnostic / log tag.
static const uint8_t	s_dotf_demo_ok_msg [] = "dotf: ch0/1 init=ok selftest=run ok=Y\r\n"
	Output line tags.
static const uint8_t	s_dotf_demo_bad_msg [] = "dotf: selftest=FAIL ok=N\r\n"
volatile uint32_t	g_dotf_ok = 0U
	1 when both channels' self-test + status calls returned k_ra8_ok.
volatile uint32_t	g_dotf_init_err = (uint32_t)k_dotf_demo_err_unset
	ra8_err_t from ra8_dotf_init (0 == k_ra8_ok).
volatile uint32_t	g_dotf_reg00 = 0U
	Last REG00 snapshot from ra8_dotf_get_status(ch0).
volatile uint32_t	g_dotf_st0_snap = 0U
	Channel-0 self-test REG00 snapshot (opaque on host / off-target).
volatile uint32_t	g_dotf_st1_snap = 0U
	Channel-1 self-test REG00 snapshot (opaque on host / off-target).
volatile uint32_t	g_dotf_heartbeat = 0U
	Bumps once per main-loop pass – liveness for headless probes.

Detailed Description

DOTF (Decryption On The Fly) bring-up + AES self-test demo (EK-RA8D2).

Tag: [Ring 6 / APP] {World: S}

The RA8D2 DOTF block (HUM Ch 45 p 3048..3050) transparently decrypts read traffic on the AXI side of the OSPI / xSPI controller using an AES core in CTR mode, so encrypted code in external flash can execute in place. The block also exposes a built-in AES self-test (HUM Ch 45.1 p 3048, "Supports self-test function"), triggered by REG00 bit 20.

This demo exercises the safe, key-free half of the driver only:

ra8_dotf_init – clock-ungate both channels (MSTPB16/17, shared with OSPI0/1) and reset REG00 to its bypass value. Neither channel is armed.
ra8_dotf_run_self_test on channels 0 and 1 – set REG00 bit 20, poll for it to clear (bounded), and snapshot REG00. The host / off-target result is opaque diagnostic data (the AES pass/fail timing only exists on silicon), so the verdict gates on the calls succeeding, not on the snapshot value.
ra8_dotf_get_status – read REG00 back for the bench probe.

What this demo deliberately does NOT do: install a key, stage an IV, program a conversion region, or ra8_dotf_enable a channel. Arming the AES core over a live XiP window would fault the next instruction fetch (HUM Ch 45 warning), and key handling needs an ra8_rsip-wrapped key. None of that is touched here – both channels stay in transparent bypass, so the demo writes no keys, IV, region, OTP, option-setting, or flash. It is a read-mostly bring-up probe with no persistent side effects.

Bring-up: CGC + SysTick + SCI8 + LEDs + MSTP. Once a second: "dotf: ch0/1 init=ok selftest=run ok=Y\r\n". The raw REG00 snapshots go to g_dotf_reg00 / g_dotf_st0_snap / g_dotf_st1_snap for on-silicon probing. LED1 toggles while healthy; LED2 toggles on a fault.

Bare EK-RA8D2 only – no shields or external transceivers.

Note: Headless-emulator status. tools/ra8_emulator does not model the DOTF APB window (0x4026_8800 / 0x4026_8900), so REG00 reads are not a real AES core – the bring-up + self-test calls return k_ra8_ok and the demo reports ok=Y, but the genuine AES BIST result + the in-place decryption path only exist on silicon. The demo therefore lives in hw_pending/. See README.md for the bench plan.

Copyright: Copyright (c) 2026 Brighton Sikarskie SPDX-License-Identifier: MIT

Since: 0.1.0

Definition in file main.c.

Enumeration Type Documentation

◆ dotf_demo_chan_t

enum dotf_demo_chan_t : uint8_t

DOTF channels exercised by the demo.

Enumerator
k_dotf_demo_ch0	DOTF0 (paired with XSPI0).
k_dotf_demo_ch1	DOTF1 (paired with XSPI1).

Definition at line 76 of file main.c.

◆ dotf_demo_config_t

enum dotf_demo_config_t : uint32_t

Compile-time settings.

Enumerator
k_dotf_demo_baud	Console baud rate.
k_dotf_demo_period_ms	Delay between self-tests.

Definition at line 70 of file main.c.

◆ dotf_demo_sentinel_t

enum dotf_demo_sentinel_t : uint32_t

Sentinel for "ra8_dotf_init has not run yet" in g_dotf_init_err.

Enumerator
k_dotf_demo_err_unset	Distinct from any ra8_err_t code.

Definition at line 82 of file main.c.

Function Documentation

◆ internal_dotf_demo_panic_halt()

void internal_dotf_demo_panic_halt ( void )

static

Park the processor after an unrecoverable DOTF demo failure.

Retains channel status snapshots, LEDs, and console diagnostics in a permanent wait-for-interrupt loop for debugger inspection.

Returns: None.

Precondition: The caller has determined DOTF self-test cannot continue.; Any relevant status snapshot or failure banner has been recorded.

Postcondition: The function never returns to its caller.; No later DOTF sample or heartbeat update occurs.

Note: Fatal-path helper for this single-core image only.

Since: 0.1.0

Definition at line 154 of file main.c.

References RA8_INTERNAL.

Referenced by internal_dotf_demo_setup_or_halt(), and main().

◆ internal_dotf_demo_sample()

ra8_err_t internal_dotf_demo_sample ( uint8_t * out_ok )

staticnodiscard

Self-test both channels and read REG00 back; fold into the verdict.

Parameters

[out] out_ok 1 when both self-test calls AND the status read returned k_ra8_ok. The opaque REG00 snapshots are reported via globals, not gated (ra8_emulator does not model the AES core).

Returns: ra8_err_t – the first non-ok status from the three sub-calls, or k_ra8_ok when all succeeded.

Return values

k_ra8_err_null_ptr out_ok was NULL.

MC/DC:: The compound verdict is delegated to internal_dotf_demo_verdict (host-tested, 4 vectors). This wrapper is a sequence of guarded calls.

Precondition: ra8_dotf_init succeeded.

Postcondition: g_dotf_st0_snap / g_dotf_st1_snap / g_dotf_reg00 updated.

Since: 0.1.0

Definition at line 249 of file main.c.

References g_dotf_reg00, g_dotf_st0_snap, g_dotf_st1_snap, internal_dotf_demo_verdict(), k_dotf_demo_ch0, k_dotf_demo_ch1, k_ra8_ok, RA8_CHECK_NULL_PTR, ra8_dotf_get_status(), ra8_dotf_run_self_test(), RA8_INTERNAL, and s_tag.

Referenced by main().

◆ internal_dotf_demo_setup_or_halt()

void internal_dotf_demo_setup_or_halt ( void )

static

Bring CGC, SysTick, SCI8, LEDs, and MSTP up.

Initializes clock and module-stop services, starts the millisecond time base, opens the UART console, and claims both status LEDs. Any failed dependency enters the permanent panic halt.

Returns: None.

Precondition: Reset-time initialization configured the core and C runtime.; The board console and LED1/LED2 are available to this image.

Postcondition: On success timing, module-stop, console, and LED services are ready.; On failure the function never returns to its caller.

Note: Single-shot boot helper; it is not reentrant.

Since: 0.1.0

Definition at line 178 of file main.c.

References internal_dotf_demo_panic_halt(), k_dotf_demo_baud, k_ra8_board_led1, k_ra8_board_led2, k_ra8_clock_id_cpuclk0, k_ra8_ok, ra8_board_led_init(), ra8_board_uart_console_init(), ra8_cgc_get_clock_hz(), ra8_cgc_init(), RA8_INTERNAL, ra8_mstp_init(), and ra8_time_init().

Referenced by main().

◆ internal_dotf_demo_verdict()

uint8_t internal_dotf_demo_verdict	(	ra8_err_t	st0_err,
		ra8_err_t	st1_err,
		ra8_err_t	status_err )

staticnodiscard

Verdict: both channels' self-test + status calls succeeded.

Parameters

[in]	st0_err	ra8_err_t from ra8_dotf_run_self_test(ch0).
[in]	st1_err	ra8_err_t from ra8_dotf_run_self_test(ch1).
[in]	status_err	ra8_err_t from ra8_dotf_get_status(ch0).

Returns: 1 when every call returned k_ra8_ok, else 0.

MC/DC:: Decision (st0_err == ok) && (st1_err == ok) && (status_err == ok) (3 conditions). N+1 = 4 vectors host-tested: all-ok -> 1; each error in turn -> 0 (proves each condition independently flips the outcome).

Precondition: All three arguments are ra8_err_t-domain values.

Postcondition: Returns a 0/1 verdict (no side effects).

Since: 0.1.0

Definition at line 224 of file main.c.

References k_ra8_ok.

Referenced by internal_dotf_demo_sample().

◆ main()

void main ( void )

The application entry point Reset_Handler hands control to.

Returns void, not int. This is a freestanding image: there is no hosted C environment, no process and nothing to report an exit status to. ISO C fixes main at int only for a hosted implementation; for a freestanding one (C23 5.1.2.1) the startup function's name and type are implementation-defined, and this is that definition. Reset_Handler discards no value because there is none to discard, and if main ever does return, startup halts the CPU rather than resuming anything.

The firmware lane is compiled -ffreestanding (see cmake/ra8_add_app.cmake) and the flag and this signature travel together: without it both GCC and clang reject a non-int main (-Wmain / -Wmain-return-type). Do not remove one without the other.

That coupling is why the declaration sits behind __STDC_HOSTED__ == 0, which -ffreestanding sets and a hosted build does not. The guard is not defensive dressing: this header is reachable from host builds (the unit tests compile ra8_core natively), and an unguarded void main(void); makes every hosted translation unit that includes it fail with conflicting types for 'main' against its own ISO int main. The declaration therefore exists exactly where its contract does.

Hosted first-party code – everything under tests/ and tools/ – uses the ISO int main(...) contract instead, because it genuinely does run under an OS that reads the exit status. scripts/checks/check_entry_points.py holds each domain to its own contract (#707).

Declared here, once, for the same reason SystemInit is: every vector_table.c used to restate it as a local extern int32_t main(void);, sixteen copies that no compiler ever compared against the definition – and roughly thirty of them had silently drifted out of agreement with the main they called.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has configured the clock tree and VTOR.

Postcondition: Control does not return; the image runs until reset or halt.; Any value the application wanted to report has been logged, not returned.

Note: Not thread-safe; single-threaded startup context only.

Warning: Only valid while the translation unit is compiled -ffreestanding. A hosted build rejects this signature.

See also: SystemInit()

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + BSP audio then plays blocks.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the playback loop forever.; On any HAL init failure the function halts in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + GPT triple, runs sweep.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the sweep loop forever.; On any HAL init failure the function halts in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up clocks + UART + RMII pins, then ThreadX.

Precondition: Reset_Handler has copied .data and zeroed .bss.

Postcondition: On clean entry the kernel runs the worker thread once.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up clocks + UART, then enters ThreadX.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the kernel runs the worker thread forever.; On any HAL init failure the function halts in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up LED, console, SDHI pins, then ThreadX.

Precondition: Reset_Handler has copied .data + zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: CPUCLK0 is raised to the PLL1 target before the kernel starts.; On clean entry the SD card thread runs forever.; On any HAL init failure the function halts in __WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + USB-FS + UAC1, then enters the iso-IN feed loop forever.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the iso-IN feed loop forever.; On any HAL init failure the function halts in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: SystemInit set VTOR / FPU / priority grouping.

The application entry point Reset_Handler hands control to.

See file header.

Precondition: Boot init has completed.; The secure-boot library's BLXNS into NS image either failed or was skipped (the call site in ra8_trustzone_init is a no-op on host builds).

Postcondition: Diagnostic counter latched, CPU parked in a halt loop.; Function never returns.

Note: Single-threaded entry.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: On success g_eoh_chapters / g_eoh_crc hold the parsed results, the banner is emitted, and g_eoh_heartbeat advances once per frame.; On any failure g_eoh_err is non-zero and the CPU parks (no heartbeat).

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The chapters/ch0-CRC banner is emitted; the CPU then loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: On success the g_etoc_* result globals hold the parsed TOC values, the banner is emitted, and g_etoc_heartbeat advances once per frame.; On any failure g_etoc_err is non-zero and the CPU parks (no heartbeat).

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss; SystemInit set VTOR/FPU.

Postcondition: The shelf scans on the panel; taps open books, browse, and read.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The slab/arena/tile/vmem banner is emitted; the CPU then loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: On success the cache globals are latched and g_pc_heartbeat advances.; On any failure g_pc_err is non-zero and the CPU parks (no heartbeat).

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Profiles power modes once a second.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the profile + blink loop.; On any HAL hard error LED2 latches ON.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler has copied .data and zeroed .bss.; The shared board boot files installed the vector table.

Postcondition: The demo has run once and its verdict banner is streaming steadily.; The CPU idles re-emitting the banner (or halts after a fatal init error).

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up the clocks, console, SPI, and SD card, then runs the shared ra8_io VFS round-trip over the SD-over-SPI block device. On success it prints the exact PASS banner the HIL runner and ra8_emulator smoke gate scrape for; on any failure it prints FAIL and parks the core.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On a clean run the CPU loops forever after the PASS banner.; On any failure the function prints FAIL and halts in WFI.

Note: Not thread-safe; this is the single-threaded app entry.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Initialises logging and the console, brings up the OSPI NOR volume, runs the erase-before-write round-trip, and prints a single PASS/FAIL verdict line over SCI8 before parking in an infinite loop.

Precondition: SystemInit configured VTOR / FPU / priority grouping.; The OSPI NOR array is present (modelled in ra8_emulator, real on silicon).

Postcondition: Exactly one PASS or FAIL verdict line has been queued on SCI8.; Control parks in an infinite loop; the function never returns.

Note: Single-threaded; runs to the park loop on the main stack.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The page-count + render-hash banner is emitted; the CPU loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The cal=OK / cal=SKIP result and the finger-free touchcal: ready sentinel are emitted; the CPU then loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The open=OK touch banner is emitted; the CPU then loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Both USB controllers' clocks and pins come up before the kernel so the workers only deal with stack bring-up.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR, FPU, priority grouping.

Postcondition: On clean entry the CPU stays in tx_kernel_enter forever.; On any HAL init failure the function halts in WFI.

Note: Single entry point; not re-entrant.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging and the clock tree, releases the Cortex-M33 (which then blinks LED1 via ra8_pcntr_set_output()), and idles. See the file header.

Precondition: SystemInit has completed core bring-up.; The M33 is held in reset by hardware until released here.

Postcondition: The M33 has been released and is blinking LED1.; This function never returns to its caller.

Note: Single-threaded; no RTOS on the M85 in this template.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: The application links ra8_c6link and ESP-hosted generated codecs.; No hardware validation is inferred from this function.

Postcondition: No c6link operation is attempted.; No network or storage state is modified.

Note: Single-threaded compile fixture.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, the clock tree, and the VCOM console, runs the cacheable-SRAM round-trip with the D-cache that SystemInit() enabled through ra8_cache_dcache_enable(), emits the matching PASS / FAIL banner over the console and ra8_log, then parks in WFI. Every byte the self-test touches runs with the L1 caches + MPU enabled by the shared boot (RA8_BOOT_ENABLE_CACHE_MPU + RA8_BOOT_CACHE_VIA_HAL).

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit enabled the MPU + I-cache + D-cache via the ra8_cache HAL.

Postcondition: Exactly one banner (PASS or FAIL) has been emitted.; The core is parked in WFI.

Note: Single-threaded; no RTOS and no IRQ sources in this template.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Publishes the mailbox, releases the Cortex-M33 into the emitter, yields until it signals done, validates the blob the M33 built, then logs the PASS/FAIL verdict and the chapter count read back from the blob. See the file header for the offload narrative.

Precondition: SystemInit has completed core bring-up.; The M33 is held inactive by hardware until released here.

Postcondition: The M33 has built a RABOOK1 blob and the M85 has validated it.; This function never returns to its caller.

Note: Single-threaded; no RTOS on the M85 in this example.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: On success the CPU heartbeats after epaper: PASS.; On any HAL error the console prints epaper: FAIL and the red LED latches on.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The chapters/toc/cover banner is emitted; CPU loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The reader loop runs forever, redrawing on each tap.; A page-1 banner is emitted once after the first render.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The cover-size / framebuffer-CRC banner is emitted; CPU loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The panel shows the reader screen and the input loop runs forever.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Publishes the mailbox, arms the IPC0 wake and configures the LPM block, releases the Cortex-M33 into the reader, waits for the first held page, logs the page-0 verdict, then runs the #150 mode-switch cycle – parking in low-power WFI and waking on the M33's page-turn pokes – before logging the handoff verdict and parking for good. See the file header for the narrative.

Precondition: SystemInit has completed core bring-up.; The M33 is held inactive by hardware until released here.

Postcondition: The M33 has rendered + re-rendered the held page and the M85 is parked.; This function never returns to its caller.

Note: Single-threaded; no RTOS on the M85 in this example.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The boot banner is emitted; the reader loop services taps forever.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up the timebase then measures forever.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the measure + blink loop forever.; On any HAL init failure the function halts in WFI.

Note: Never returns.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Arms the RIIC1 target and polls the dispatcher.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: The CPU stays in the dispatch poll loop forever.; On any fatal init error the CPU parks in riic_target_panic_halt.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On a clean run the PASS banner is printed and the CPU loops in WFI.; On any failure the function prints a FAIL line and halts.

Note: Not thread-safe; single-threaded app entry.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the read + print loop forever.; On any HAL hard error LED2 latches ON and the loop exits.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up the LIN commander then drives frames.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the LIN-frame + blink loop forever.; On any HAL init failure the function halts in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, "renders" page 0 into the shared mailbox, releases the Cortex-M33 into its hold loop, and parks the M85 in low-power WFI sleep. See the file header for the power-saving narrative.

Precondition: SystemInit has completed core bring-up.; The M33 is held inactive by hardware until released here.

Postcondition: The M33 owns the held page and the M85 is parked.; This function never returns to its caller.

Note: Single-threaded; no RTOS on the M85 in this example.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

The USB clock, pins, console, and the SD card all come up before the kernel so the worker only deals with USB stack bring-up.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR, FPU, priority grouping.

Postcondition: On clean entry the CPU stays in tx_kernel_enter forever.; On any HAL init failure the function halts in WFI.

Note: Single entry point; not re-entrant.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit configured VTOR / FPU.

Postcondition: On clean bring-up the CPU stays in the poll loop.; On any HAL init failure the function halts in WFI.

Note: Single entry point; not re-entrant.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler initialized static storage.; SystemInit configured VTOR, FPU, and priority grouping.

Postcondition: The startup banner is printed once.; Control enters ThreadX and never returns normally.

Note: The #707 freestanding contract is declared by ra8_boot_entry.h.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On a clean run the PASS banner is printed and the CPU heartbeats forever.; On any failure LED2 latches ON and the CPU parks.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, the clock tree, and the VCOM console, runs the three-step self-test (MPU enabled, canonical boot map, Device MMIO), emits the matching PASS / FAIL banner over the console and ra8_log, then parks in WFI.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit installed the boot map via ra8_mpu_apply_boot_map().

Postcondition: Exactly one banner (PASS or a step-specific FAIL) has been emitted.; The core is parked in WFI.

Note: Single-threaded; no RTOS and no IRQ sources in this template.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler initialised the C runtime; SystemInit ran.; The EK-RA8D2 J-Link OB VCOM console is attached for the banner.

Postcondition: The commit + rollback attempts have executed against extra-MRAM.; The verdict banner is emitted once per report cycle.

Note: Single entry point; not re-entrant.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Initialises logging + console, brings up the MRAM volume, runs the wear-levelling + power-cycle-survival flow, and prints a single PASS/FAIL verdict.

Precondition: SystemInit configured VTOR / FPU / priority grouping.; The extra-MRAM region is present (modelled in ra8_emulator, real on silicon).

Postcondition: Exactly one PASS or FAIL verdict line has been queued on SCI8.; Control parks in an infinite loop; the function never returns.

Note: Single-threaded; runs to the park loop on the main stack.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Initialises logging + console, brings up the MRAM volume, runs the program/erase round-trip, and prints a single PASS/FAIL verdict.

Precondition: SystemInit configured VTOR / FPU / priority grouping.; The extra-MRAM region is present (modelled in ra8_emulator, real on silicon).

Postcondition: Exactly one PASS or FAIL verdict line has been queued on SCI8.; Control parks in an infinite loop; the function never returns.

Note: Single-threaded; runs to the park loop on the main stack.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up the clocks, console, and SDHI bus pins, runs the native SD card identification, fills the payload, then runs the full ra8_io VFS round-trip over the native-SDHI block device. On success it prints the exact PASS banner the HIL runner and ra8_emulator smoke gate scrape for; on any failure it prints FAIL and parks the core.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On a clean run the CPU loops forever after the PASS banner.; On any failure the function prints FAIL and halts in WFI.

Note: Not thread-safe; this is the single-threaded app entry.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up the console and both stdio sinks, retargets the engine's stdio to the in-RAM capture sink, runs the two-backend swap, replays the RAM capture out of the UART, and prints a single PASS/FAIL verdict per abstraction before parking in an infinite loop.

Precondition: SystemInit configured VTOR / FPU / priority grouping.; The OSPI NOR array is present (modelled in ra8_emulator, real on silicon).

Postcondition: A PASS or FAIL verdict line has been queued on SCI8 for each abstraction.; Control parks in an infinite loop; the function never returns.

Note: Single-threaded; runs to the park loop on the main stack.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up the clocks, console, and SDHI bus pins, runs the native SD card identification, fills the payload, then writes + reads + compares one raw 512-byte block straight against ra8_sdcard. On success it prints the exact PASS banner; on any failure it prints FAIL and parks the core.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On a clean run the CPU loops forever after the PASS banner.; On any failure the function prints FAIL and halts in WFI.

Note: Not thread-safe; this is the single-threaded app entry.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The whoami PASS banner is emitted; the CPU then loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up clocks + UART + RMII + RSIP, then ThreadX.

Precondition: Reset_Handler has copied .data and zeroed .bss.

Postcondition: On clean entry the kernel runs the worker thread once.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, the FPU and the priority grouping.

Postcondition: The banner was printed exactly once.; Control passed to ThreadX and never came back.

Note: Everything after tx_kernel_enter happens on ThreadX; the panic-halt below is reached only if the kernel refuses to start.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, the FPU and the priority grouping.

Postcondition: The banner and the resolved pin map were printed exactly once.; Control passed to ThreadX and never came back.

Note: Everything after tx_kernel_enter happens on ThreadX; the panic-halt below is reached only if the kernel refuses to start.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, the FPU and priority grouping.

Postcondition: The probe ran exactly once and printed its verdict.; The CPU stays in a slow heartbeat loop afterwards.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, the FPU and the priority grouping.

Postcondition: The banner was printed exactly once.; Control passed to ThreadX and never came back.

Note: Everything after tx_kernel_enter runs on ThreadX; the panic-halt below is reached only if the kernel refuses to start.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Initializes and arms ADC_B, formats each successful channel sample without variadic I/O, emits the verdict, toggles LED1, and delays.

Precondition: Reset startup and SystemInit completed successfully.; The selected ADC channel matches the board analog connection.

Postcondition: Every PASS verdict follows a successful channel read.; Any read or LED failure leads to the terminal panic helper.

Note: Does not return during normal operation.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: On success the PASS banner is emitted; otherwise a FAIL line is.; The CPU parks in WFI (observable on ra8_emulator until its budget).

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, releases the Cortex-M33 (which then blinks LED1), and idles. See the file header for the teaching narrative.

Precondition: SystemInit has completed core bring-up.; The M33 is held in reset by hardware until released here.

Postcondition: The M33 has been released and is blinking LED1.; This function never returns to its caller.

Note: Single-threaded; no RTOS on the M85 in this template.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The IDCODE/checks PASS banner is emitted; the CPU then loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

See the file header for the full behaviour summary.

Precondition: SystemInit has enabled the caches + MPU (this build defines RA8_BOOT_ENABLE_CACHE_MPU).; The M33 is held in reset by hardware until released here.

Postcondition: The M33 has been released and the round-trip loop is running.; This function never returns to its caller.

Note: Single-threaded; no RTOS on the M85 in this template.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, the clock tree, and the VCOM console, runs the three-step self-test (cacheable SRAM, RO MRAM const, Device MMIO), emits the matching PASS / FAIL banner over the console and ra8_log, then parks in WFI. Every byte the self-test touches runs with the L1 caches and MPU enabled by the shared boot (RA8_BOOT_ENABLE_CACHE_MPU).

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit enabled the MPU + I-cache + D-cache (cache+MPU build).

Postcondition: Exactly one banner (PASS or a step-specific FAIL) has been emitted.; The core is parked in WFI.

Note: Single-threaded; no RTOS and no IRQ sources in this template.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR, FPU and priority grouping.

Postcondition: The verdict banner is on SCI8 and the CPU parks.; The result globals hold the outcome for SWD probing.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Lights HOCO + PLL, then runs a 1 Hz blink.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the toggle loop forever.; On any HAL init failure the function halts in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

See file header for behaviour summary.

Precondition: Boot init has completed.; CPU1 is held in reset.

Postcondition: CPU1 released and the ping-pong loop running.; Function never returns.

Note: Single-threaded entry.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR, FPU, priority grouping.

Postcondition: Control passes to the active app, or to the ThreadX-hosted DFU device.; On any HAL init failure the function halts in WFI.

Note: Single entry point; not re-entrant.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss; SystemInit ran.; The embedded image's first two words are a valid MSP + Thumb reset vector.

Postcondition: On success, control is at the image's reset vector in the SRAM run window.; On a failed run-target check, control parks in internal_dcr_panic_halt.

Note: Single entry point; not re-entrant.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR, FPU, priority grouping.

Postcondition: On clean entry the CPU stays in tx_kernel_enter forever.; On any HAL init failure the function halts in WFI.

Note: Single entry point; not re-entrant.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit enabled the MPU + caches via RA8_BOOT_ENABLE_CACHE_MPU.

Postcondition: Exactly one PASS/FAIL banner is emitted, then the core parks.; The core ends in WFI so ra8_emulator's idle-stop terminates the run.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Initializes the demo, executes one comparison per period, increments the exported match or mismatch counter, and toggles the matching LED.

Precondition: Reset startup and SystemInit completed successfully.; DOC and the status LEDs are not owned by another context.

Postcondition: Every iteration increments exactly one HIL result counter.; LED1 represents matches and LED2 represents failures or mismatches.

Note: Does not return during normal operation.

Since: 0.1.0

Definition at line 275 of file main.c.

References g_dotf_heartbeat, g_dotf_init_err, g_dotf_ok, internal_dotf_demo_panic_halt(), internal_dotf_demo_sample(), internal_dotf_demo_setup_or_halt(), k_dotf_demo_period_ms, k_ra8_board_led1, k_ra8_board_led2, k_ra8_ok, ra8_board_led_toggle(), ra8_board_uart_console_write(), ra8_delay_ms(), ra8_dotf_init(), ra8_isr_globals_enable(), s_dotf_demo_bad_msg, and s_dotf_demo_ok_msg.

Variable Documentation

◆ g_dotf_heartbeat

volatile uint32_t g_dotf_heartbeat = 0U

Bumps once per main-loop pass – liveness for headless probes.

Note: Read externally only.

Since: 0.1.0

Definition at line 136 of file main.c.

Referenced by main().

◆ g_dotf_init_err

volatile uint32_t g_dotf_init_err = (uint32_t)k_dotf_demo_err_unset

ra8_err_t from ra8_dotf_init (0 == k_ra8_ok).

Note: Read externally only.

Since: 0.1.0

Definition at line 104 of file main.c.

Referenced by main().

◆ g_dotf_ok

volatile uint32_t g_dotf_ok = 0U

1 when both channels' self-test + status calls returned k_ra8_ok.

Note: Read externally only (HIL / board emulator).

Since: 0.1.0

Definition at line 96 of file main.c.

Referenced by main().

◆ g_dotf_reg00

volatile uint32_t g_dotf_reg00 = 0U

Last REG00 snapshot from ra8_dotf_get_status(ch0).

Note: Read externally only.

Since: 0.1.0

Definition at line 112 of file main.c.

Referenced by internal_dotf_demo_sample().

◆ g_dotf_st0_snap

volatile uint32_t g_dotf_st0_snap = 0U

Channel-0 self-test REG00 snapshot (opaque on host / off-target).

Note: Read externally only. Meaningful on silicon (real AES BIST).

Since: 0.1.0

Definition at line 120 of file main.c.

Referenced by internal_dotf_demo_sample().

◆ g_dotf_st1_snap

volatile uint32_t g_dotf_st1_snap = 0U

Channel-1 self-test REG00 snapshot (opaque on host / off-target).

Note: Read externally only. Meaningful on silicon (real AES BIST).

Since: 0.1.0

Definition at line 128 of file main.c.

Referenced by internal_dotf_demo_sample().

◆ s_dotf_demo_bad_msg

const uint8_t s_dotf_demo_bad_msg[] = "dotf: selftest=FAIL ok=N\r\n"

static

Definition at line 88 of file main.c.

Referenced by main().

◆ s_dotf_demo_ok_msg

const uint8_t s_dotf_demo_ok_msg[] = "dotf: ch0/1 init=ok selftest=run ok=Y\r\n"

static

Output line tags.

Definition at line 87 of file main.c.

Referenced by main().

◆ s_tag

const char* s_tag = "dotf_demo"

static

Diagnostic / log tag.

Definition at line 67 of file main.c.

Enumerations

Functions

Variables

Detailed Description

Enumeration Type Documentation

◆ dotf_demo_chan_t

◆ dotf_demo_config_t

◆ dotf_demo_sentinel_t

Function Documentation

◆ internal_dotf_demo_panic_halt()

◆ internal_dotf_demo_sample()

◆ internal_dotf_demo_setup_or_halt()

◆ internal_dotf_demo_verdict()

◆ main()

Variable Documentation

◆ g_dotf_heartbeat

◆ g_dotf_init_err

◆ g_dotf_ok

◆ g_dotf_reg00

◆ g_dotf_st0_snap

◆ g_dotf_st1_snap

◆ s_dotf_demo_bad_msg

◆ s_dotf_demo_ok_msg

◆ s_tag