ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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main.c
Go to the documentation of this file.
1
46
47#include <stddef.h>
48#include <stdint.h>
49
50#include "ra8_board_ek_ra8d2.h"
51#include "ra8_boot_entry.h"
52#include "ra8_cgc.h"
53#include "ra8_err.h"
54#include "ra8_log.h"
55#include "ra8_mpu.h"
56#include "ra8_system_regs.h"
57
66typedef enum : uint32_t {
67 k_mpu_boot_baud = 115200U,
69 k_mpu_boot_shram_base = 0x22100000U,
70 k_mpu_boot_shram_size = 0x000A0000U,
72
78typedef enum : uint8_t {
81
95
104static const uint8_t k_mpu_boot_pass_banner[] = "mpu_boot_map_hal: mpu-via-hal PASS\r\n";
105
112static const uint8_t k_mpu_boot_fail_setup[] = "mpu_boot_map_hal: setup FAIL\r\n";
113
120static const uint8_t k_mpu_boot_fail_mpu[] = "mpu_boot_map_hal: mpu-disabled FAIL\r\n";
121
128static const uint8_t k_mpu_boot_fail_map[] = "mpu_boot_map_hal: boot-map FAIL\r\n";
129
136static const uint8_t k_mpu_boot_fail_mmio[] = "mpu_boot_map_hal: device-MMIO FAIL\r\n";
137
155[[noreturn]] static void mpu_boot_wfi_forever(void)
156{
157 while (1) {
158 __asm volatile("wfi");
159 }
160}
161
181static bool mpu_boot_test_enabled(void)
182{
183 return ra8_mpu_is_enabled();
184}
185
206static bool mpu_boot_test_map(void)
207{
208 uint8_t count = 0U;
209 const ra8_mpu_region_t* map = ra8_mpu_boot_map(&count);
210 if (map == nullptr) {
211 return false;
212 }
213 if (count != (uint8_t)k_ra8_mpu_boot_region_count) {
214 return false;
215 }
216 const ra8_mpu_region_t* shram = &map[k_mpu_boot_idx_shram];
217 if (shram->base != (uintptr_t)k_mpu_boot_shram_base) {
218 return false;
219 }
220 if (shram->size != (uint32_t)k_mpu_boot_shram_size) {
221 return false;
222 }
223 if (shram->attr_idx != k_ra8_mpu_attr_idx_1) {
224 return false;
225 }
226 return true;
227}
228
250{
251 /* HUM Ch 9.2.2 "SCKDIVCR : System Clock Division Control Register" p 326 */
252 const uint32_t sckdivcr = *ra8_sys_sckdivcr();
253 if (sckdivcr == 0U) {
254 return false;
255 }
256 if (sckdivcr != (uint32_t)k_mpu_boot_sckdivcr_exp) {
257 return false;
258 }
259 return true;
260}
261
283{
284 if (!mpu_boot_test_enabled()) {
286 }
287 if (!mpu_boot_test_map()) {
289 }
292 }
294}
295
315static bool mpu_boot_setup(void)
316{
317 if (ra8_cgc_init() != k_ra8_ok) {
318 return false;
319 }
321 return false;
322 }
323 return true;
324}
325
346static void mpu_boot_emit(const uint8_t* line, size_t len)
347{
348 if (line == nullptr) {
349 return;
350 }
351 if (len == 0U) {
352 return;
353 }
354 (void)ra8_board_uart_console_write(line, len);
356}
357
373void main(void)
374{
375 ra8_log_init();
376 ra8_log_info("MPU_BOOT", "==== mpu_boot_map_hal: MPU boot map via ra8_mpu HAL ====");
377
378 if (!mpu_boot_setup()) {
379 ra8_log_info("MPU_BOOT", "setup FAILED (CGC / console) -- halting");
382 }
383
385
386 switch (result) {
388 ra8_log_info("MPU_BOOT", "mpu-via-hal PASS (enabled + canonical map + Device MMIO)");
390 break;
392 ra8_log_info("MPU_BOOT", "MPU-enabled step FAILED (apply_boot_map did not enable)");
394 break;
396 ra8_log_info("MPU_BOOT", "boot-map step FAILED (region table mismatch)");
398 break;
400 default:
401 ra8_log_info("MPU_BOOT", "device-MMIO step FAILED");
403 break;
404 }
405
407}
void main(void)
Secure fallback main entry point.
Definition main.c:37
static void mpu_boot_wfi_forever(void)
Park the Cortex-M85 forever in a WFI idle loop.
Definition main.c:155
static void mpu_boot_emit(const uint8_t *line, size_t len)
Emit one banner line over the VCOM console and flush it.
Definition main.c:346
static bool mpu_boot_test_device_mmio(void)
Step 3 – prove Device-nGnRE peripheral MMIO is accessible (region 3).
Definition main.c:249
static bool mpu_boot_test_enabled(void)
Step 1 – prove the MPU was enabled by the HAL boot path.
Definition main.c:181
static bool mpu_boot_setup(void)
Bring up the clock tree and the VCOM console for the banner.
Definition main.c:315
static const uint8_t k_mpu_boot_fail_mmio[]
Failure banner: the Device-nGnRE MMIO (region 3) readback mismatched.
Definition main.c:136
static const uint8_t k_mpu_boot_fail_setup[]
Failure banner: clock / console bring-up failed before the self-test.
Definition main.c:112
static const uint8_t k_mpu_boot_pass_banner[]
Deterministic one-shot HIL success banner (uart_scrape gate).
Definition main.c:104
mpu_boot_result_t
Verdict of the self-test, naming which step failed (if any).
Definition main.c:89
@ k_mpu_boot_result_fail_mmio
Device-MMIO (region 3) step failed.
Definition main.c:93
@ k_mpu_boot_result_fail_map
Boot map region table was wrong.
Definition main.c:92
@ k_mpu_boot_result_pass
All three steps passed.
Definition main.c:90
@ k_mpu_boot_result_fail_mpu
MPU was not enabled by the HAL.
Definition main.c:91
static bool mpu_boot_test_map(void)
Step 2 – prove the canonical boot map (incl.
Definition main.c:206
mpu_boot_region_idx_t
Named indices into the canonical boot map region table.
Definition main.c:78
@ k_mpu_boot_idx_shram
Shared M85<->M33 SRAM region.
Definition main.c:79
static const uint8_t k_mpu_boot_fail_mpu[]
Failure banner: ra8_mpu_is_enabled() reported the MPU is off.
Definition main.c:120
static const uint8_t k_mpu_boot_fail_map[]
Failure banner: the boot map region table was not the canonical map.
Definition main.c:128
static mpu_boot_result_t mpu_boot_run_selftest(void)
Run all three self-test steps in order, naming the first failure.
Definition main.c:282
mpu_boot_config_t
Compile-time scalar parameters for the MPU-via-HAL self-test.
Definition main.c:66
@ k_mpu_boot_shram_size
Region 4 size (640 KiB, not a power of 2).
Definition main.c:70
@ k_mpu_boot_sckdivcr_exp
SCKDIVCR readback after ra8_cgc_init().
Definition main.c:68
@ k_mpu_boot_baud
VCOM console line rate (8N1).
Definition main.c:67
@ k_mpu_boot_shram_base
Region 4 base (shared M85<->M33 SRAM).
Definition main.c:69
Board-support layer for the Renesas EK-RA8D2 v1 evaluation kit.
ra8_err_t ra8_board_uart_console_write(const uint8_t *data, size_t len)
Polled blocking write to the J-Link OB VCOM console.
ra8_err_t ra8_board_uart_console_init(uint32_t baud)
Configure SCI8 + PD02/PD03 as the debug-console UART.
ra8_err_t ra8_board_uart_console_flush(void)
Block until every byte queued on the J-Link OB VCOM console has finished clocking out on the wire.
Boot entry points shared between a vector table and its startup code.
High-level Clock Generation Circuit driver.
ra8_err_t ra8_cgc_init(void)
Configure the clock tree to a safe default.
Definition ra8_cgc.c:727
Error Code Definitions for ra8-firmware.
@ k_ra8_ok
Success – operation completed with all postconditions satisfied.
Definition ra8_err.h:119
Lightweight Logging Interface for ra8-firmware.
void ra8_log_init(void)
Initialise the logging backend.
Definition ra8_log.c:379
#define ra8_log_info(tag, message)
RA8 log info.
Definition ra8_log.h:364
Cortex-M85 Memory Protection Unit (MPU) configuration helper.
const ra8_mpu_region_t * ra8_mpu_boot_map(uint8_t *out_count)
Return the canonical boot memory-attribute map region table.
Definition ra8_mpu.c:408
@ k_ra8_mpu_boot_region_count
Regions in the canonical boot map.
Definition ra8_mpu.h:96
@ k_ra8_mpu_attr_idx_1
MAIR0 byte 1.
Definition ra8_mpu.h:67
bool ra8_mpu_is_enabled(void)
Report whether the core MPU is currently enabled.
Definition ra8_mpu.c:450
System Control (SYSC) register layout for the Renesas RA8D2.
static volatile uint32_t * ra8_sys_sckdivcr(void)
Get pointer to the 32-bit SCKDIVCR register.
Static descriptor for one Armv8-M MPU region.
Definition ra8_mpu.h:130
uintptr_t base
Region base address.
Definition ra8_mpu.h:131
uint32_t size
Region size in bytes (power of two).
Definition ra8_mpu.h:132
ra8_mpu_attr_idx_t attr_idx
MAIR slot index.
Definition ra8_mpu.h:137