66typedef enum : uint32_t {
78typedef enum : uint8_t {
89typedef enum : uint8_t {
158 __asm
volatile(
"wfi");
210 if (map ==
nullptr) {
253 if (sckdivcr == 0U) {
348 if (line ==
nullptr) {
376 ra8_log_info(
"MPU_BOOT",
"==== mpu_boot_map_hal: MPU boot map via ra8_mpu HAL ====");
379 ra8_log_info(
"MPU_BOOT",
"setup FAILED (CGC / console) -- halting");
388 ra8_log_info(
"MPU_BOOT",
"mpu-via-hal PASS (enabled + canonical map + Device MMIO)");
392 ra8_log_info(
"MPU_BOOT",
"MPU-enabled step FAILED (apply_boot_map did not enable)");
396 ra8_log_info(
"MPU_BOOT",
"boot-map step FAILED (region table mismatch)");
void main(void)
Secure fallback main entry point.
static void mpu_boot_wfi_forever(void)
Park the Cortex-M85 forever in a WFI idle loop.
static void mpu_boot_emit(const uint8_t *line, size_t len)
Emit one banner line over the VCOM console and flush it.
static bool mpu_boot_test_device_mmio(void)
Step 3 – prove Device-nGnRE peripheral MMIO is accessible (region 3).
static bool mpu_boot_test_enabled(void)
Step 1 – prove the MPU was enabled by the HAL boot path.
static bool mpu_boot_setup(void)
Bring up the clock tree and the VCOM console for the banner.
static const uint8_t k_mpu_boot_fail_mmio[]
Failure banner: the Device-nGnRE MMIO (region 3) readback mismatched.
static const uint8_t k_mpu_boot_fail_setup[]
Failure banner: clock / console bring-up failed before the self-test.
static const uint8_t k_mpu_boot_pass_banner[]
Deterministic one-shot HIL success banner (uart_scrape gate).
mpu_boot_result_t
Verdict of the self-test, naming which step failed (if any).
@ k_mpu_boot_result_fail_mmio
Device-MMIO (region 3) step failed.
@ k_mpu_boot_result_fail_map
Boot map region table was wrong.
@ k_mpu_boot_result_pass
All three steps passed.
@ k_mpu_boot_result_fail_mpu
MPU was not enabled by the HAL.
static bool mpu_boot_test_map(void)
Step 2 – prove the canonical boot map (incl.
mpu_boot_region_idx_t
Named indices into the canonical boot map region table.
@ k_mpu_boot_idx_shram
Shared M85<->M33 SRAM region.
static const uint8_t k_mpu_boot_fail_mpu[]
Failure banner: ra8_mpu_is_enabled() reported the MPU is off.
static const uint8_t k_mpu_boot_fail_map[]
Failure banner: the boot map region table was not the canonical map.
static mpu_boot_result_t mpu_boot_run_selftest(void)
Run all three self-test steps in order, naming the first failure.
mpu_boot_config_t
Compile-time scalar parameters for the MPU-via-HAL self-test.
@ k_mpu_boot_shram_size
Region 4 size (640 KiB, not a power of 2).
@ k_mpu_boot_sckdivcr_exp
SCKDIVCR readback after ra8_cgc_init().
@ k_mpu_boot_baud
VCOM console line rate (8N1).
@ k_mpu_boot_shram_base
Region 4 base (shared M85<->M33 SRAM).
Board-support layer for the Renesas EK-RA8D2 v1 evaluation kit.
ra8_err_t ra8_board_uart_console_write(const uint8_t *data, size_t len)
Polled blocking write to the J-Link OB VCOM console.
ra8_err_t ra8_board_uart_console_init(uint32_t baud)
Configure SCI8 + PD02/PD03 as the debug-console UART.
ra8_err_t ra8_board_uart_console_flush(void)
Block until every byte queued on the J-Link OB VCOM console has finished clocking out on the wire.
Boot entry points shared between a vector table and its startup code.
High-level Clock Generation Circuit driver.
ra8_err_t ra8_cgc_init(void)
Configure the clock tree to a safe default.
Error Code Definitions for ra8-firmware.
@ k_ra8_ok
Success – operation completed with all postconditions satisfied.
Lightweight Logging Interface for ra8-firmware.
void ra8_log_init(void)
Initialise the logging backend.
#define ra8_log_info(tag, message)
RA8 log info.
Cortex-M85 Memory Protection Unit (MPU) configuration helper.
const ra8_mpu_region_t * ra8_mpu_boot_map(uint8_t *out_count)
Return the canonical boot memory-attribute map region table.
@ k_ra8_mpu_boot_region_count
Regions in the canonical boot map.
@ k_ra8_mpu_attr_idx_1
MAIR0 byte 1.
bool ra8_mpu_is_enabled(void)
Report whether the core MPU is currently enabled.
System Control (SYSC) register layout for the Renesas RA8D2.
static volatile uint32_t * ra8_sys_sckdivcr(void)
Get pointer to the 32-bit SCKDIVCR register.
Static descriptor for one Armv8-M MPU region.
uintptr_t base
Region base address.
uint32_t size
Region size in bytes (power of two).
ra8_mpu_attr_idx_t attr_idx
MAIR slot index.