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ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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"MPU boot map brought up through the ra8_mpu HAL" self-test (#576) More...
#include <stddef.h>#include <stdint.h>#include "ra8_board_ek_ra8d2.h"#include "ra8_boot_entry.h"#include "ra8_cgc.h"#include "ra8_err.h"#include "ra8_log.h"#include "ra8_mpu.h"#include "ra8_system_regs.h"Go to the source code of this file.
Enumerations | |
| enum | mpu_boot_config_t : uint32_t { k_mpu_boot_baud = 115200U , k_mpu_boot_sckdivcr_exp = 0x32233432U , k_mpu_boot_shram_base = 0x22100000U , k_mpu_boot_shram_size = 0x000A0000U } |
| Compile-time scalar parameters for the MPU-via-HAL self-test. More... | |
| enum | mpu_boot_region_idx_t : uint8_t { k_mpu_boot_idx_shram = 4U } |
| Named indices into the canonical boot map region table. More... | |
| enum | mpu_boot_result_t : uint8_t { k_mpu_boot_result_pass = 0U , k_mpu_boot_result_fail_mpu = 1U , k_mpu_boot_result_fail_map = 2U , k_mpu_boot_result_fail_mmio = 3U } |
| Verdict of the self-test, naming which step failed (if any). More... | |
Functions | |
| static void | mpu_boot_wfi_forever (void) |
| Park the Cortex-M85 forever in a WFI idle loop. | |
| static bool | mpu_boot_test_enabled (void) |
| Step 1 – prove the MPU was enabled by the HAL boot path. | |
| static bool | mpu_boot_test_map (void) |
| Step 2 – prove the canonical boot map (incl. | |
| static bool | mpu_boot_test_device_mmio (void) |
| Step 3 – prove Device-nGnRE peripheral MMIO is accessible (region 3). | |
| static mpu_boot_result_t | mpu_boot_run_selftest (void) |
| Run all three self-test steps in order, naming the first failure. | |
| static bool | mpu_boot_setup (void) |
| Bring up the clock tree and the VCOM console for the banner. | |
| static void | mpu_boot_emit (const uint8_t *line, size_t len) |
| Emit one banner line over the VCOM console and flush it. | |
| void | main (void) |
| Application entry: prove the MPU boot map came up via the HAL. | |
Variables | |
| static const uint8_t | k_mpu_boot_pass_banner [] = "mpu_boot_map_hal: mpu-via-hal PASS\r\n" |
| Deterministic one-shot HIL success banner (uart_scrape gate). | |
| static const uint8_t | k_mpu_boot_fail_setup [] = "mpu_boot_map_hal: setup FAIL\r\n" |
| Failure banner: clock / console bring-up failed before the self-test. | |
| static const uint8_t | k_mpu_boot_fail_mpu [] = "mpu_boot_map_hal: mpu-disabled FAIL\r\n" |
| Failure banner: ra8_mpu_is_enabled() reported the MPU is off. | |
| static const uint8_t | k_mpu_boot_fail_map [] = "mpu_boot_map_hal: boot-map FAIL\r\n" |
| Failure banner: the boot map region table was not the canonical map. | |
| static const uint8_t | k_mpu_boot_fail_mmio [] = "mpu_boot_map_hal: device-MMIO FAIL\r\n" |
| Failure banner: the Device-nGnRE MMIO (region 3) readback mismatched. | |
"MPU boot map brought up through the ra8_mpu HAL" self-test (#576)
Single-core (Cortex-M85) demonstrator for issue #576. The app's build defines RA8_BOOT_ENABLE_CACHE_MPU (see CMakeLists.txt) and ships a per-app system_init.c whose SystemInit() installs the boot MPU memory-attribute map through the ra8_mpu HAL (ra8_mpu_apply_boot_map()) instead of the raw MAIR/RBAR/RLAR/CTRL pokes the shared board boot uses. It is the HAL-path twin of cache_mpu_hil (raw-poke path); the two boot files diff cleanly and can be compared on HIL.
Self-test (each step independent; runs once, then the core parks in WFI):
On success the app emits "mpu_boot_map_hal: mpu-via-hal PASS\r\n" over the J-Link OB VCOM console (SCI8, PD02/PD03 @ 115200 8N1) and mirrors the verdict over ra8_log. On any mismatch it emits a distinct ... FAIL line (never containing "PASS") and parks in WFI so ra8_emulator's idle detector stops the run after the one-shot banner is scraped.
Definition in file main.c.
| enum mpu_boot_config_t : uint32_t |
Compile-time scalar parameters for the MPU-via-HAL self-test.
Groups the console baud and the golden constants the self-test checks: the expected boot-map region count, the shared-SRAM region geometry, and the SYSTEM SCKDIVCR readback.
| Enumerator | |
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| k_mpu_boot_baud | VCOM console line rate (8N1). |
| k_mpu_boot_sckdivcr_exp | SCKDIVCR readback after ra8_cgc_init(). |
| k_mpu_boot_shram_base | Region 4 base (shared M85<->M33 SRAM). |
| k_mpu_boot_shram_size | Region 4 size (640 KiB, not a power of 2). |
| enum mpu_boot_region_idx_t : uint8_t |
| enum mpu_boot_result_t : uint8_t |
Verdict of the self-test, naming which step failed (if any).
Drives the banner main() emits; k_mpu_boot_result_pass is the only value that produces the PASS line.
| void main | ( | void | ) |
Application entry: prove the MPU boot map came up via the HAL.
The application entry point Reset_Handler hands control to.
Brings up logging, the clock tree, and the VCOM console, runs the three-step self-test (MPU enabled, canonical boot map, Device MMIO), emits the matching PASS / FAIL banner over the console and ra8_log, then parks in WFI.
Definition at line 373 of file main.c.
References k_mpu_boot_fail_map, k_mpu_boot_fail_mmio, k_mpu_boot_fail_mpu, k_mpu_boot_fail_setup, k_mpu_boot_pass_banner, k_mpu_boot_result_fail_map, k_mpu_boot_result_fail_mmio, k_mpu_boot_result_fail_mpu, k_mpu_boot_result_pass, mpu_boot_emit(), mpu_boot_run_selftest(), mpu_boot_setup(), mpu_boot_wfi_forever(), ra8_log_info, and ra8_log_init().
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Emit one banner line over the VCOM console and flush it.
Writes line then drains the SCI8 TX so the bytes clock out before the core parks. A no-op if line is NULL or empty.
| [in] | line | Pointer to the ASCII banner bytes (no NUL sent). Must be non-NULL for output. |
| [in] | len | Number of bytes to send; 0 sends nothing. |
line points to at least len readable bytes when len > 0. Definition at line 346 of file main.c.
References ra8_board_uart_console_flush(), and ra8_board_uart_console_write().
Referenced by main().
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Run all three self-test steps in order, naming the first failure.
Steps are independent and short-circuit: the first failing step determines the verdict so main() can emit a step-specific FAIL banner.
| k_mpu_boot_result_pass | All three steps passed. |
| k_mpu_boot_result_fail_mpu | The MPU-enabled step failed. |
| k_mpu_boot_result_fail_map | The boot-map step failed. |
| k_mpu_boot_result_fail_mmio | The Device-MMIO step failed. |
Definition at line 282 of file main.c.
References k_mpu_boot_result_fail_map, k_mpu_boot_result_fail_mmio, k_mpu_boot_result_fail_mpu, k_mpu_boot_result_pass, mpu_boot_test_device_mmio(), mpu_boot_test_enabled(), and mpu_boot_test_map().
Referenced by main().
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Bring up the clock tree and the VCOM console for the banner.
ra8_cgc_init() programmes the clock tree (and thereby the SCKDIVCR the Device-MMIO step checks); the EK-RA8D2 debug console (SCI8 on PD02/PD03 @ k_mpu_boot_baud) then comes up over the J-Link OB VCOM bridge.
| true | CGC and SCI8 console are up. |
| false | A bring-up step failed. |
Definition at line 315 of file main.c.
References k_mpu_boot_baud, k_ra8_ok, ra8_board_uart_console_init(), and ra8_cgc_init().
Referenced by main().
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Step 3 – prove Device-nGnRE peripheral MMIO is accessible (region 3).
Reads the live SYSTEM SCKDIVCR register (peripheral window @ 0x40000000, mapped Device-nGnRE by boot-map region 3) and checks it equals the divider word ra8_cgc_init() programmed. A correct readback proves the HAL-programmed peripheral region is reachable and uncached.
| true | SCKDIVCR read back 0x32233432. |
| false | The read returned 0 (dead bus) or a value other than expected. |
Definition at line 249 of file main.c.
References k_mpu_boot_sckdivcr_exp, and ra8_sys_sckdivcr().
Referenced by mpu_boot_run_selftest().
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Step 1 – prove the MPU was enabled by the HAL boot path.
Queries ra8_mpu_is_enabled(). A true result means the per-app SystemInit() called ra8_mpu_apply_boot_map() and the MPU is live – all without this app touching the MPU register block directly.
| true | ra8_mpu_is_enabled() reported the MPU on. |
| false | The MPU is off (apply_boot_map did not run or failed). |
Definition at line 181 of file main.c.
References ra8_mpu_is_enabled().
Referenced by mpu_boot_run_selftest().
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Step 2 – prove the canonical boot map (incl.
the non-pow2 region 4).
Reads the driver-owned boot map via ra8_mpu_boot_map() and checks it has k_ra8_mpu_boot_region_count regions and that region 4 is the 640 KiB Normal-non-cacheable shared M85<->M33 SRAM bank at 0x22100000 – the region a size-checked setter cannot express, which is why the boot map needs its own HAL entry point.
| true | The map has 5 regions and region 4 is the expected shared bank. |
| false | The count or region-4 descriptor did not match. |
Definition at line 206 of file main.c.
References ra8_mpu_region_t::attr_idx, ra8_mpu_region_t::base, k_mpu_boot_idx_shram, k_mpu_boot_shram_base, k_mpu_boot_shram_size, k_ra8_mpu_attr_idx_1, k_ra8_mpu_boot_region_count, ra8_mpu_boot_map(), and ra8_mpu_region_t::size.
Referenced by mpu_boot_run_selftest().
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Park the Cortex-M85 forever in a WFI idle loop.
Reached after the one-shot banner has been emitted (pass or fail). The WFI lets ra8_emulator's idle detector stop the run cleanly and models the low-power posture on silicon.
Definition at line 155 of file main.c.
Referenced by main().
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Failure banner: ra8_mpu_is_enabled() reported the MPU is off.
Distinct from the PASS banner and free of "PASS".
Definition at line 120 of file main.c.
Referenced by main().
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