60typedef enum : uint32_t {
87 __asm
volatile(
"dsb" :::
"memory");
89 __asm
volatile(
"dsb" :::
"memory");
116 __asm
volatile(
"wfi");
142 __asm
volatile(
"nop");
164 ra8_log_info(
"M85",
"==== RA8D2 low-power hold-page demo ====");
166 ra8_log_info(
"M85",
"mailbox in shared SRAM at 0x22100000");
170 ra8_log_info(
"M85",
"rendered page 0; handing the held page to the M33");
172 ra8_log_info(
"M85",
"releasing Cortex-M33 secondary core ...");
180 ra8_log_info(
"M85",
"low-power: page handed to M33; M85 parking (clock-gated posture)");
void main(void)
Secure fallback main entry point.
uint32_t g_ra8_ls_cpu1_mram_start
static void park_forever(void)
Park the M85 forever after an unrecoverable startup failure.
static void park_low_power(void)
Park the M85 in low-power WFI after the M33 owns the page.
m85_lowpower_const_t
Pacing for the parked-M85 narration.
@ k_m85_park_log_every
Log the M33 heartbeat every Nth WFI wake.
static void render_page0(volatile lowpower_mailbox_t *mb)
"Render" page 0 and publish it to the M33 via the shared mailbox.
uint32_t g_ra8_ls_cpu1_stack_top
Shared-SRAM contract for the low-power "hold the page" dual-core demo.
static volatile lowpower_mailbox_t * lowpower_mailbox(void)
Typed pointer to the fixed-address shared mailbox.
@ k_lowpower_magic
"HOLD" – M85 stamps it when ready.
@ k_lowpower_core_m33
active_core: the M33 holds the page.
Boot entry points shared between a vector table and its startup code.
Dual-core (CPU0 / CPU1) lifecycle helper – public API.
ra8_err_t ra8_cpu1_release(void *entry, void *sp)
Release CPU1 (Cortex-M33) from reset and start it executing.
Error Code Definitions for ra8-firmware.
@ k_ra8_ok
Success – operation completed with all postconditions satisfied.
ra8_err_codes_t ra8_err_t
Canonical error-return type used by every ra8-firmware API.
Lightweight Logging Interface for ra8-firmware.
void ra8_log_init(void)
Initialise the logging backend.
#define ra8_log_info_val(tag, message, value)
RA8 log info val.
#define ra8_log_info(tag, message)
RA8 log info.
Cross-core handoff block backed by a fixed shared-SRAM address.
volatile uint32_t page_num
Held page; M85 sets 0, M33 bumps on turn.
volatile uint32_t active_core
Which core owns the page (lowpower_const_t).
volatile uint32_t magic
M85 stamps k_lowpower_magic when ready.
volatile uint32_t m33_heartbeat
M33 increments each hold-loop iteration.
volatile uint32_t sw1_events
M33 counts SW1 (page-turn) press edges.