ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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lowpower_holdpage.h
Go to the documentation of this file.
1
42
43#pragma once
44
45#include <stdint.h>
46
48
49#ifdef __cplusplus
50extern "C" {
51#endif
52
71
84typedef enum : uint32_t {
85 k_lowpower_magic = 0x484F4C44U,
89
116typedef struct {
117 volatile uint32_t magic;
118 volatile uint32_t page_num;
119 volatile uint32_t active_core;
120 volatile uint32_t m33_heartbeat;
121 volatile uint32_t sw1_events;
123
142static inline volatile lowpower_mailbox_t* lowpower_mailbox(void)
143{
144 return (volatile lowpower_mailbox_t*)(uintptr_t)k_lowpower_mailbox_addr;
145}
146
147#ifdef __cplusplus
148}
149#endif
static volatile lowpower_mailbox_t * lowpower_mailbox(void)
Typed pointer to the fixed-address shared mailbox.
lowpower_const_t
Signature + active-core enumerators shared by both core images.
@ k_lowpower_magic
"HOLD" – M85 stamps it when ready.
@ k_lowpower_core_m85
active_core: the M85 owns the page.
@ k_lowpower_core_m33
active_core: the M33 holds the page.
lowpower_mailbox_addr_t
Fixed shared-SRAM base address of the mailbox.
@ k_lowpower_mailbox_addr
Mailbox base = window base.
Where the EK-RA8D2's Cortex-M85 and Cortex-M33 meet, stated once.
@ k_ra8_board_shared_ram_base
Start of SRAM2: the CPU0 <-> CPU1 meeting window.
Cross-core handoff block backed by a fixed shared-SRAM address.
volatile uint32_t page_num
Held page; M85 sets 0, M33 bumps on turn.
volatile uint32_t active_core
Which core owns the page (lowpower_const_t).
volatile uint32_t magic
M85 stamps k_lowpower_magic when ready.
volatile uint32_t m33_heartbeat
M33 increments each hold-loop iteration.
volatile uint32_t sw1_events
M33 counts SW1 (page-turn) press edges.