CPU0 (Cortex-M85) launcher for the HAL-based M33 blink. More...

#include <stdint.h>
#include "ra8_boot_entry.h"
#include "ra8_cgc.h"
#include "ra8_dual_core.h"
#include "ra8_err.h"
#include "ra8_log.h"

Include dependency graph for main.c:

Functions
static void	park_forever (void)
	Park the M85 forever after an unrecoverable startup failure.
static void	idle_forever (void)
	Idle the M85 forever once the M33 owns the work (low-power posture).
void	main (void)
	CPU0 (Cortex-M85) application entry.

Variables
uint32_t	g_ra8_ls_cpu1_mram_start
	Base of the embedded M33 image / its vector table (MRAM_CPU1).
uint32_t	g_ra8_ls_cpu1_stack_top
	Initial stack pointer handed to the M33 at release.

Detailed Description

CPU0 (Cortex-M85) launcher for the HAL-based M33 blink.

Tag: [Ring 1 / app] {World: S}

The primary-core launcher for blink_m33_hal, the HAL-based twin of the raw blink_m33 template. The M85 does the minimum – bring up logging and the clock tree, release the secondary Cortex-M33 with ra8_cpu1_release (HUM Ch 2.9.1 "CPU control registers"), then idle in WFI – and the M33 owns the work. Here that work is blinking LED1 through the CPU1-safe HAL primitive ra8_pcntr_set_output() (issue #580) rather than a raw PCNTR poke.

This is hw_pending: the raw blink_m33 is the HIL-validated reference; this HAL variant is behaviourally identical (same LED1 blink, same PCNTR1 effect) but this exact ELF has not had its own bench run, so it is not promoted.

Note: ra8_log_info compiles to a no-op unless the build sets a log level of INFO or finer (a Debug build). just apps::emulator::run blink_m33_hal builds Debug so the [itm] lines appear.

Copyright: Copyright (c) 2026 Brighton Sikarskie SPDX-License-Identifier: MIT

Since: 0.1.0

Definition in file main.c.

Function Documentation

◆ idle_forever()

void idle_forever ( void )

static

Idle the M85 forever once the M33 owns the work (low-power posture).

After releasing the M33 the M85 has nothing to do, so it sleeps in a WFI loop – the heavy core asleep while the lean M33 runs is the low-power co-processor posture this template demonstrates.

Returns: This function never returns.

Note: The core stays asleep between interrupts.

Precondition: The M33 has been released successfully.; No further M85-side work is pending.

Postcondition: The M85 consumes minimal power between wake events.; The M33 continues blinking independently.

Note: WFI wakes on any pending interrupt; this template enables none, so the M85 simply stays asleep.

Since: 0.1.0

Definition at line 86 of file main.c.

Referenced by main().

◆ main()

void main ( void )

CPU0 (Cortex-M85) application entry.

The application entry point Reset_Handler hands control to.

Brings up logging and the clock tree, releases the Cortex-M33 (which then blinks LED1 via ra8_pcntr_set_output()), and idles. See the file header.

Precondition: SystemInit has completed core bring-up.; The M33 is held in reset by hardware until released here.

Postcondition: The M33 has been released and is blinking LED1.; This function never returns to its caller.

Note: Single-threaded; no RTOS on the M85 in this template.

Since: 0.1.0

Definition at line 107 of file main.c.

References g_ra8_ls_cpu1_mram_start, g_ra8_ls_cpu1_stack_top, idle_forever(), k_ra8_ok, park_forever(), ra8_cgc_init(), ra8_cpu1_release(), ra8_log_info, ra8_log_info_val, and ra8_log_init().

◆ park_forever()

void park_forever ( void )

static

Park the M85 forever after an unrecoverable startup failure.

Reached only if ra8_cpu1_release fails, so the M33 never started. The core spins with the failure already logged.

Returns: This function never returns.

Note: The core spins in place.

Precondition: A fatal error (CPU1 release failure) has occurred.; The failure has already been logged.

Postcondition: The M85 makes no further forward progress.; The M33 stays held in reset.

Note: Mirrors the M33's fault handler for symmetry.

Since: 0.1.0

Definition at line 60 of file main.c.

Referenced by main().

Variable Documentation

◆ g_ra8_ls_cpu1_mram_start

uint32_t g_ra8_ls_cpu1_mram_start

extern

Base of the embedded M33 image / its vector table (MRAM_CPU1).

◆ g_ra8_ls_cpu1_stack_top

uint32_t g_ra8_ls_cpu1_stack_top