L3 Ethernet switch / frame-forwarding config demo (ra8_eth_mfwd + ra8_layer3_switch). More...

#include <stddef.h>
#include <stdint.h>
#include "ra8_board_ek_ra8d2.h"
#include "ra8_boot_entry.h"
#include "ra8_cgc.h"
#include "ra8_err.h"
#include "ra8_eth_mfwd.h"
#include "ra8_isr.h"
#include "ra8_layer3_switch.h"
#include "ra8_mstp.h"
#include "ra8_time.h"

Include dependency graph for main.c:

Enumerations
enum	l3_const_t : uint32_t { k_l3_baud = 115200U , k_l3_period_ms = 1000U , k_l3_route_ip = 0xC0A80100U , k_l3_route_mask = 0xFFFFFF00U }
	Demo tunables (illustrative route). More...
enum	l3_mtu_t : uint16_t { k_l3_mtu_bytes = 1500U }
	L3-switch facade MTU. More...
enum	l3_fmt_t : uint8_t { k_l3_radix = 10U , k_l3_dec_u32_max = 10U , k_l3_mask_entries = 3U , k_l3_fwd_mask_all = 0x7FU , k_l3_src_port = 0U , k_l3_rx_queue = 0U , k_l3_egress_port = 1U , k_l3_port_count = 2U , k_l3_promisc_off = 0U }
	Formatting, indices, and small fields. More...

Functions
static void	l3_panic_halt (void)
	Park forever after a fatal init error.
static void	l3_write (const uint8_t *data, uint32_t len)
	Write a byte span to the SCI8 console, discarding the status.
static uint32_t	l3_u32_to_dec (uint8_t *buf, uint32_t val)
	Serialise an unsigned 32-bit value into decimal ASCII.
static void	l3_write_u32 (uint32_t val)
	Log one unsigned 32-bit value as decimal ASCII.
static bool	l3_program_forwarding (void)
	Program the real MFWD forwarding path and read its status.
static bool	l3_run_facade (void)
	Exercise the FSP-shaped L3-switch facade lifecycle.
static bool	l3_run_cycle (void)
	Run one cycle: MFWD forwarding config + L3-switch facade lifecycle.
static void	l3_setup_or_halt (void)
	Core bring-up: CGC -> MSTP -> TIME -> console + LED.
static ra8_err_t	l3_arm (void)
	Bring up the MFWD forwarding engine.
void	main (void)
	The application entry point Reset_Handler hands control to.

Variables
static const uint8_t	k_l3_fwd_prefix [] = "l3sw: fwd_sts=0x"
static const uint8_t	k_l3_open_prefix [] = "l3sw: l3_open="
static const uint8_t	k_l3_promisc_sep [] = " promisc="
static const uint8_t	k_l3_route_prefix [] = "l3sw: route_add="
static const uint8_t	k_l3_route_sfx [] = " (placeholder)\r\n"
static const uint8_t	k_l3_crlf [] = "\r\n"
static const uint8_t	k_l3_verdict_pass [] = "l3sw: forward PASS\r\n"
static const uint8_t	k_l3_verdict_fail [] = "l3sw: forward FAIL\r\n"

Detailed Description

L3 Ethernet switch / frame-forwarding config demo (ra8_eth_mfwd + ra8_layer3_switch).

Tag: [Ring 6 / APP] {World: S}

Configures the RA8D2 Ethernet frame-forwarding path that no other example referenced (recon gap #135). Two drivers, honestly separated:

ra8_eth_mfwd – the real Message Forwarding engine that sits between the GMAC ports and the CPU Agent (GWCA) making per-frame port-to-port / port-to-host decisions (HUM Ch 31-32 "Ethernet"). This app programs the per-port forwarding-destination masks (ra8_eth_mfwd_set_forwarding_masks, permissive 0x7F on every port), routes port-0 ingress into a GWCA RX queue (ra8_eth_mfwd_route_queue), and reads the MFWD status (ra8_eth_mfwd_get_status).
ra8_layer3_switch – the FSP-shaped L3-switch facade. The RA8D2 silicon carries no L3 switch block (the driver header says so), so the facade's route-table ops are documented placeholders that return k_ra8_err_not_supported. The app exercises the working lifecycle (open / status_get / close) and calls route_add once to log – honestly – that the L3 route table is a not-supported placeholder on this part. The real forwarding config is the MFWD path above.

The fixed verdict "l3sw: forward PASS" prints only when every real operation (MFWD program + status, L3 open / status / close) returned k_ra8_ok. The route_add placeholder code is logged but never fails the verdict.

hw_pending: tools/ra8_emulator has no Ethernet / MFWD peripheral model, and the EK-RA8D2 Ethernet wire is marginal (#21), so this is compile-gated and bench-only – matching the driver-gap example wave (#182-188). Proving a frame is actually forwarded to the right egress port needs a multi-port topology (two links + a traffic source, bench wiring #89).

Copyright: Copyright (c) 2026 Brighton Sikarskie SPDX-License-Identifier: MIT

Since: 0.1.0

Definition in file main.c.

Enumeration Type Documentation

◆ l3_const_t

enum l3_const_t : uint32_t

Demo tunables (illustrative route).

Enumerator
k_l3_baud	SCI8 console baud.
k_l3_period_ms	Delay between cycles.
k_l3_route_ip	192.168.1.0 (network order).
k_l3_route_mask	/24 subnet mask.

Definition at line 58 of file main.c.

◆ l3_fmt_t

enum l3_fmt_t : uint8_t

Formatting, indices, and small fields.

Enumerator
k_l3_radix	Decimal serialiser radix.
k_l3_dec_u32_max	Max decimal digits for a uint32_t.
k_l3_mask_entries	Forwarding-mask array size (p0/p1/host).
k_l3_fwd_mask_all	7-bit "all destinations" forward mask.
k_l3_src_port	GMAC ingress port routed to a queue.
k_l3_rx_queue	GWCA RX queue index for port-to-host.
k_l3_egress_port	Illustrative route egress port.
k_l3_port_count	Physical port count for the facade.
k_l3_promisc_off	Facade promiscuous mode off.

Definition at line 71 of file main.c.

◆ l3_mtu_t

enum l3_mtu_t : uint16_t

L3-switch facade MTU.

Enumerator
k_l3_mtu_bytes	Per-port MTU handed to the facade.

Definition at line 66 of file main.c.

Function Documentation

◆ l3_arm()

ra8_err_t l3_arm ( void )

staticnodiscard

Bring up the MFWD forwarding engine.

ra8_eth_mfwd_init ungates the shared Ethernet switch MSTP gate and resets the MFWD registers so the per-port forwarding masks and queue routing can be programmed by the run cycle.

Returns: ra8_err_t error code from ra8_eth_mfwd_init.

Return values

k_ra8_ok	MFWD engine is up.
Other	Forwarded from ra8_eth_mfwd_init.

Precondition: l3_setup_or_halt has ungated MSTP.; IRQs are masked or this is single-threaded init.

Postcondition: On k_ra8_ok the MFWD forwarding registers are writable.; On failure no partial MFWD state is relied upon by the caller.

Since: 0.1.0

Definition at line 347 of file main.c.

References ra8_eth_mfwd_init().

Referenced by main().

◆ l3_panic_halt()

void l3_panic_halt ( void )

static

Park forever after a fatal init error.

Precondition: Called only after an unrecoverable bring-up failure.

Postcondition: CPU is parked; only a debugger or reset wakes it.

Since: 0.1.0

Definition at line 101 of file main.c.

Referenced by l3_setup_or_halt(), and main().

◆ l3_program_forwarding()

bool l3_program_forwarding ( void )

static

Program the real MFWD forwarding path and read its status.

Sets the permissive per-port forwarding masks (0x7F -> all destinations on ports 0, 1 and the host/GWCA port), routes GMAC port-0 ingress into GWCA RX queue 0, and logs the MFWD status word.

Returns: True iff the mask, route, and status calls returned k_ra8_ok.

Precondition: ra8_eth_mfwd_init has succeeded.; The console has been initialised.

Postcondition: One l3sw: fwd_sts=0x line has been queued.; FWPBFC0/1/2 masks and the port-0 queue route are programmed.

Since: 0.1.0

Definition at line 191 of file main.c.

References k_l3_crlf, k_l3_fwd_mask_all, k_l3_fwd_prefix, k_l3_mask_entries, k_l3_rx_queue, k_l3_src_port, k_ra8_ok, l3_write(), l3_write_u32(), ra8_eth_mfwd_get_status(), ra8_eth_mfwd_route_queue(), and ra8_eth_mfwd_set_forwarding_masks().

Referenced by l3_run_cycle().

◆ l3_run_cycle()

bool l3_run_cycle ( void )

static

Run one cycle: MFWD forwarding config + L3-switch facade lifecycle.

Returns: True iff every real operation in the cycle returned k_ra8_ok.

Precondition: l3_arm initialised the MFWD engine.; The console has been initialised.

Postcondition: One log block (MFWD status + facade open + route placeholder) queued.; The forwarding masks + queue route are (re)programmed.

Since: 0.1.0

Definition at line 285 of file main.c.

References l3_program_forwarding(), and l3_run_facade().

Referenced by main().

◆ l3_run_facade()

bool l3_run_facade ( void )

static

Exercise the FSP-shaped L3-switch facade lifecycle.

Opens the facade (2 ports, 1500-byte MTU, non-promiscuous), reads back the open / promiscuous flags, and closes it. Between open and close it calls ra8_layer3_switch_route_add once and logs the returned code: on this silicon the L3 route table is a documented placeholder that returns k_ra8_err_not_supported, so that code is logged (never failing the verdict) to make the placeholder explicit.

Returns: True iff open, status_get and close returned k_ra8_ok.

Precondition: The console has been initialised.; No prior facade open is still outstanding.

Postcondition: The facade has been opened, queried, and closed exactly once.; One l3_open= line and one route_add= placeholder line queued.

Since: 0.1.0

Definition at line 235 of file main.c.

References k_l3_crlf, k_l3_egress_port, k_l3_mtu_bytes, k_l3_open_prefix, k_l3_port_count, k_l3_promisc_off, k_l3_promisc_sep, k_l3_route_ip, k_l3_route_mask, k_l3_route_prefix, k_l3_route_sfx, k_ra8_ok, l3_write(), l3_write_u32(), ra8_layer3_switch_close(), ra8_layer3_switch_open(), ra8_layer3_switch_route_add(), and ra8_layer3_switch_status_get().

Referenced by l3_run_cycle().

◆ l3_setup_or_halt()

void l3_setup_or_halt ( void )

static

Core bring-up: CGC -> MSTP -> TIME -> console + LED.

Precondition: Reset defaults are in force (single-threaded boot context).; No peripheral has been claimed yet.

Postcondition: On return every core clock + console + LED is live.; Any failure parks the CPU via l3_panic_halt.

Since: 0.1.0

Definition at line 306 of file main.c.

References k_l3_baud, k_ra8_board_led1, k_ra8_clock_id_cpuclk0, k_ra8_ok, l3_panic_halt(), ra8_board_led_init(), ra8_board_uart_console_init(), ra8_cgc_get_clock_hz(), ra8_cgc_init(), ra8_mstp_init(), and ra8_time_init().

Referenced by main().

◆ l3_u32_to_dec()

uint32_t l3_u32_to_dec	(	uint8_t *	buf,
		uint32_t	val )

static

Serialise an unsigned 32-bit value into decimal ASCII.

Parameters

[out]	buf	Destination, at least k_l3_dec_u32_max bytes.
[in]	val	Value to serialise.

Returns: Number of digits written (1..10).

Precondition: buf is non-NULL and sized for the widest uint32_t.; No trailing NUL is required by the caller.

Postcondition: buf holds the most-significant digit first.; The return value is in [1, k_l3_dec_u32_max].

Since: 0.1.0

Definition at line 138 of file main.c.

References k_l3_dec_u32_max, and k_l3_radix.

Referenced by l3_write_u32().

◆ l3_write()

void l3_write	(	const uint8_t *	data,
		uint32_t	len )

static

Write a byte span to the SCI8 console, discarding the status.

Parameters

[in]	data	Non-NULL byte span to transmit.
[in]	len	Byte count (0 is a no-op).

Precondition: ra8_board_uart_console_init has succeeded.; data points at len readable bytes.

Postcondition: len bytes have been queued to the console UART.

Since: 0.1.0

Definition at line 119 of file main.c.

References ra8_board_uart_console_write().

Referenced by l3_program_forwarding(), l3_run_facade(), l3_write_u32(), and main().

◆ l3_write_u32()

void l3_write_u32 ( uint32_t val )

static

Log one unsigned 32-bit value as decimal ASCII.

Parameters

[in] val Value to print.

Precondition: The console has been initialised.; val fits in a uint32_t (always true).

Postcondition: The decimal digits of val have been queued to the console.

Since: 0.1.0

Definition at line 168 of file main.c.

References k_l3_dec_u32_max, l3_u32_to_dec(), and l3_write().

Referenced by l3_program_forwarding(), and l3_run_facade().

◆ main()

void main ( void )

The application entry point Reset_Handler hands control to.

Returns void, not int. This is a freestanding image: there is no hosted C environment, no process and nothing to report an exit status to. ISO C fixes main at int only for a hosted implementation; for a freestanding one (C23 5.1.2.1) the startup function's name and type are implementation-defined, and this is that definition. Reset_Handler discards no value because there is none to discard, and if main ever does return, startup halts the CPU rather than resuming anything.

The firmware lane is compiled -ffreestanding (see cmake/ra8_add_app.cmake) and the flag and this signature travel together: without it both GCC and clang reject a non-int main (-Wmain / -Wmain-return-type). Do not remove one without the other.

That coupling is why the declaration sits behind __STDC_HOSTED__ == 0, which -ffreestanding sets and a hosted build does not. The guard is not defensive dressing: this header is reachable from host builds (the unit tests compile ra8_core natively), and an unguarded void main(void); makes every hosted translation unit that includes it fail with conflicting types for 'main' against its own ISO int main. The declaration therefore exists exactly where its contract does.

Hosted first-party code – everything under tests/ and tools/ – uses the ISO int main(...) contract instead, because it genuinely does run under an OS that reads the exit status. scripts/checks/check_entry_points.py holds each domain to its own contract (#707).

Declared here, once, for the same reason SystemInit is: every vector_table.c used to restate it as a local extern int32_t main(void);, sixteen copies that no compiler ever compared against the definition – and roughly thirty of them had silently drifted out of agreement with the main they called.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has configured the clock tree and VTOR.

Postcondition: Control does not return; the image runs until reset or halt.; Any value the application wanted to report has been logged, not returned.

Note: Not thread-safe; single-threaded startup context only.

Warning: Only valid while the translation unit is compiled -ffreestanding. A hosted build rejects this signature.

See also: SystemInit()

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + BSP audio then plays blocks.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the playback loop forever.; On any HAL init failure the function halts in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + GPT triple, runs sweep.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the sweep loop forever.; On any HAL init failure the function halts in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up clocks + UART + RMII pins, then ThreadX.

Precondition: Reset_Handler has copied .data and zeroed .bss.

Postcondition: On clean entry the kernel runs the worker thread once.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up clocks + UART, then enters ThreadX.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the kernel runs the worker thread forever.; On any HAL init failure the function halts in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up LED, console, SDHI pins, then ThreadX.

Precondition: Reset_Handler has copied .data + zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: CPUCLK0 is raised to the PLL1 target before the kernel starts.; On clean entry the SD card thread runs forever.; On any HAL init failure the function halts in __WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up CGC + USB-FS + UAC1, then enters the iso-IN feed loop forever.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the iso-IN feed loop forever.; On any HAL init failure the function halts in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: SystemInit set VTOR / FPU / priority grouping.

The application entry point Reset_Handler hands control to.

See file header.

Precondition: Boot init has completed.; The secure-boot library's BLXNS into NS image either failed or was skipped (the call site in ra8_trustzone_init is a no-op on host builds).

Postcondition: Diagnostic counter latched, CPU parked in a halt loop.; Function never returns.

Note: Single-threaded entry.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: On success g_eoh_chapters / g_eoh_crc hold the parsed results, the banner is emitted, and g_eoh_heartbeat advances once per frame.; On any failure g_eoh_err is non-zero and the CPU parks (no heartbeat).

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The chapters/ch0-CRC banner is emitted; the CPU then loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: On success the g_etoc_* result globals hold the parsed TOC values, the banner is emitted, and g_etoc_heartbeat advances once per frame.; On any failure g_etoc_err is non-zero and the CPU parks (no heartbeat).

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss; SystemInit set VTOR/FPU.

Postcondition: The shelf scans on the panel; taps open books, browse, and read.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The slab/arena/tile/vmem banner is emitted; the CPU then loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: On success the cache globals are latched and g_pc_heartbeat advances.; On any failure g_pc_err is non-zero and the CPU parks (no heartbeat).

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Profiles power modes once a second.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On clean entry the CPU stays in the profile + blink loop.; On any HAL hard error LED2 latches ON.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler has copied .data and zeroed .bss.; The shared board boot files installed the vector table.

Postcondition: The demo has run once and its verdict banner is streaming steadily.; The CPU idles re-emitting the banner (or halts after a fatal init error).

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up the clocks, console, SPI, and SD card, then runs the shared ra8_io VFS round-trip over the SD-over-SPI block device. On success it prints the exact PASS banner the HIL runner and ra8_emulator smoke gate scrape for; on any failure it prints FAIL and parks the core.

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit has set VTOR, FPU, and priority grouping.

Postcondition: On a clean run the CPU loops forever after the PASS banner.; On any failure the function prints FAIL and halts in WFI.

Note: Not thread-safe; this is the single-threaded app entry.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Initialises logging and the console, brings up the OSPI NOR volume, runs the erase-before-write round-trip, and prints a single PASS/FAIL verdict line over SCI8 before parking in an infinite loop.

Precondition: SystemInit configured VTOR / FPU / priority grouping.; The OSPI NOR array is present (modelled in ra8_emulator, real on silicon).

Postcondition: Exactly one PASS or FAIL verdict line has been queued on SCI8.; Control parks in an infinite loop; the function never returns.

Note: Single-threaded; runs to the park loop on the main stack.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The page-count + render-hash banner is emitted; the CPU loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The cal=OK / cal=SKIP result and the finger-free touchcal: ready sentinel are emitted; the CPU then loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The open=OK touch banner is emitted; the CPU then loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Both USB controllers' clocks and pins come up before the kernel so the workers only deal with stack bring-up.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR, FPU, priority grouping.

Postcondition: On clean entry the CPU stays in tx_kernel_enter forever.; On any HAL init failure the function halts in WFI.

Note: Single entry point; not re-entrant.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging and the clock tree, releases the Cortex-M33 (which then blinks LED1 via ra8_pcntr_set_output()), and idles. See the file header.

Precondition: SystemInit has completed core bring-up.; The M33 is held in reset by hardware until released here.

Postcondition: The M33 has been released and is blinking LED1.; This function never returns to its caller.

Note: Single-threaded; no RTOS on the M85 in this template.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: The application links ra8_c6link and ESP-hosted generated codecs.; No hardware validation is inferred from this function.

Postcondition: No c6link operation is attempted.; No network or storage state is modified.

Note: Single-threaded compile fixture.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Brings up logging, the clock tree, and the VCOM console, runs the cacheable-SRAM round-trip with the D-cache that SystemInit() enabled through ra8_cache_dcache_enable(), emits the matching PASS / FAIL banner over the console and ra8_log, then parks in WFI. Every byte the self-test touches runs with the L1 caches + MPU enabled by the shared boot (RA8_BOOT_ENABLE_CACHE_MPU + RA8_BOOT_CACHE_VIA_HAL).

Precondition: Reset_Handler has copied .data and zeroed .bss.; SystemInit enabled the MPU + I-cache + D-cache via the ra8_cache HAL.

Postcondition: Exactly one banner (PASS or FAIL) has been emitted.; The core is parked in WFI.

Note: Single-threaded; no RTOS and no IRQ sources in this template.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Publishes the mailbox, releases the Cortex-M33 into the emitter, yields until it signals done, validates the blob the M33 built, then logs the PASS/FAIL verdict and the chapter count read back from the blob. See the file header for the offload narrative.

Precondition: SystemInit has completed core bring-up.; The M33 is held inactive by hardware until released here.

Postcondition: The M33 has built a RABOOK1 blob and the M85 has validated it.; This function never returns to its caller.

Note: Single-threaded; no RTOS on the M85 in this example.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: On success the CPU heartbeats after epaper: PASS.; On any HAL error the console prints epaper: FAIL and the red LED latches on.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The chapters/toc/cover banner is emitted; CPU loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The reader loop runs forever, redrawing on each tap.; A page-1 banner is emitted once after the first render.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The cover-size / framebuffer-CRC banner is emitted; CPU loops in WFI.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The panel shows the reader screen and the input loop runs forever.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Publishes the mailbox, arms the IPC0 wake and configures the LPM block, releases the Cortex-M33 into the reader, waits for the first held page, logs the page-0 verdict, then runs the #150 mode-switch cycle – parking in low-power WFI and waking on the M33's page-turn pokes – before logging the handoff verdict and parking for good. See the file header for the narrative.

Precondition: SystemInit has completed core bring-up.; The M33 is held inactive by hardware until released here.

Postcondition: The M33 has rendered + re-rendered the held page and the M85 is parked.; This function never returns to its caller.

Note: Single-threaded; no RTOS on the M85 in this example.

Since: 0.1.0

The application entry point Reset_Handler hands control to.

Precondition: Reset_Handler copied .data and zeroed .bss.; SystemInit set VTOR / FPU / priority grouping.

Postcondition: The boot banner is emitted; the reader loop services taps forever.

Since: 0.1.0

Definition at line 352 of file main.c.

References k_l3_period_ms, k_l3_verdict_fail, k_l3_verdict_pass, k_ra8_board_led1, k_ra8_ok, l3_arm(), l3_panic_halt(), l3_run_cycle(), l3_setup_or_halt(), l3_write(), ra8_board_led_toggle(), ra8_delay_ms(), and ra8_isr_globals_enable().

Variable Documentation

◆ k_l3_crlf

const uint8_t k_l3_crlf[] = "\r\n"

static

Definition at line 90 of file main.c.

Referenced by l3_program_forwarding(), and l3_run_facade().

◆ k_l3_fwd_prefix

const uint8_t k_l3_fwd_prefix[] = "l3sw: fwd_sts=0x"

static

Definition at line 85 of file main.c.

Referenced by l3_program_forwarding().

◆ k_l3_open_prefix

const uint8_t k_l3_open_prefix[] = "l3sw: l3_open="

static

Definition at line 86 of file main.c.

Referenced by l3_run_facade().

◆ k_l3_promisc_sep

const uint8_t k_l3_promisc_sep[] = " promisc="

static

Definition at line 87 of file main.c.

Referenced by l3_run_facade().

◆ k_l3_route_prefix

const uint8_t k_l3_route_prefix[] = "l3sw: route_add="

static

Definition at line 88 of file main.c.

Referenced by l3_run_facade().

◆ k_l3_route_sfx

const uint8_t k_l3_route_sfx[] = " (placeholder)\r\n"

static

Definition at line 89 of file main.c.

Referenced by l3_run_facade().

◆ k_l3_verdict_fail

const uint8_t k_l3_verdict_fail[] = "l3sw: forward FAIL\r\n"

static

Definition at line 92 of file main.c.

Referenced by main().

◆ k_l3_verdict_pass

const uint8_t k_l3_verdict_pass[] = "l3sw: forward PASS\r\n"

static

Definition at line 91 of file main.c.

Referenced by main().

Enumerations

Functions

Variables

Detailed Description

Enumeration Type Documentation

◆ l3_const_t

◆ l3_fmt_t

◆ l3_mtu_t

Function Documentation

◆ l3_arm()

◆ l3_panic_halt()

◆ l3_program_forwarding()

◆ l3_run_cycle()

◆ l3_run_facade()

◆ l3_setup_or_halt()

◆ l3_u32_to_dec()

◆ l3_write()

◆ l3_write_u32()

◆ main()

Variable Documentation

◆ k_l3_crlf

◆ k_l3_fwd_prefix

◆ k_l3_open_prefix

◆ k_l3_promisc_sep

◆ k_l3_route_prefix

◆ k_l3_route_sfx

◆ k_l3_verdict_fail

◆ k_l3_verdict_pass