GPT + AGT timer peripheral-block model for the board emulator. More...

#include <stdint.h>
#include <stdio.h>
#include "board_periph_block.h"
#include "emu_host_io_internal.h"

Include dependency graph for board_periph_timer.c:

Data Structures
struct	agt_state_t
	One AGT channel: a 16-bit reloading down-counter + status. More...
struct	gpt_state_t
	One GPT channel: a 32-bit saw up-counter + status. More...

Enumerations
enum	agt_map_t : uint64_t { k_agt_base = 0x40221000UL , k_agt_stride = 0x100UL , k_agt_count = 10UL , k_agt_span = 0x100UL * 10UL , k_agt_off_agt = 0x00UL , k_agt_off_cma = 0x02UL , k_agt_off_cmb = 0x04UL , k_agt_off_cr = 0x08UL , k_agt_off_mr1 = 0x09UL }
	AGT block geometry (ra8_agt_regs.h, 16-bit view). More...
enum	gpt_map_t : uint64_t { k_gpt_base = 0x40322000UL , k_gpt_stride = 0x100UL , k_gpt_count = 14UL , k_gpt_span = 0x100UL * 14UL , k_gpt_off_gtstr = 0x04UL , k_gpt_off_gtstp = 0x08UL , k_gpt_off_gtclr = 0x0CUL , k_gpt_off_gtcr = 0x2CUL , k_gpt_off_gtst = 0x3CUL , k_gpt_off_gtcnt = 0x48UL , k_gpt_off_gtpr = 0x64UL }
	GPT block geometry (ra8_gpt_regs.h, 32-bit channels). More...
enum	timer_field_t : uint32_t { k_u16_max = 0xFFFFU }
	16-bit counter wrap value (also the GPT default period). More...
enum	agtcr_bit_t : uint32_t { k_agtcr_tstart = 0x01U , k_agtcr_tcstf = 0x02U , k_agtcr_tundf = 0x20U , k_agtcr_tcmaf = 0x40U , k_agtcr_tcmbf = 0x80U }
	AGTCR (control/status) bits – ra8_agt_agtcr_bits_t. More...
enum	gpt_bit_t : uint32_t { k_gtcr_cst = 0x00000001U , k_gtst_tcfa = 0x00000001U , k_gtst_tcfpo = 0x00000040U , k_gtst_tcfpu = 0x00000080U }
	GPT GTCR / GTST bits – ra8_gpt register notes. More...
enum	elc_event_t : uint16_t { k_event_gpt0_ovf = 0x0C1U , k_event_agt0_int = 0x0DFU }
	Canonical ELC event numbers the timer models emit (FSP ra8d2 bsp_elc). More...
enum	timer_tune_t : uint32_t { k_agt_step_per_chunk = 0x0800U , k_gpt_step_per_chunk = 0x00004001U }
	Per-chunk advance for the modelled counters (one chunk == 1 tick). More...

Functions
static RA8_INTERNAL uint64_t	internal_agt_reg_read (uint32_t ch, uint64_t off)
	Dispatch an AGT register read for channel `ch` at byte offset `off`.
static RA8_INTERNAL void	internal_agt_reg_write (uint32_t ch, uint64_t off, uint32_t value)
	Dispatch an AGT register write; AGTCR.TSTART arms / status is RW1C.
static RA8_INTERNAL void	internal_agt_tick_channel (uc_engine *uc, uint32_t ch)
	Advance one running AGT channel by one chunk; raise events on wrap.
static RA8_INTERNAL uint64_t	internal_agt_read (uc_engine *uc, uint64_t addr, unsigned size)
	MMIO read inside the AGT window: route to the addressed channel.
static RA8_INTERNAL void	internal_agt_write (uc_engine *uc, uint64_t addr, unsigned size, uint64_t value)
	MMIO write inside the AGT window: route to the addressed channel.
static RA8_INTERNAL uint64_t	internal_gpt_reg_read (uint32_t ch, uint64_t off)
	Dispatch a GPT register read for channel `ch` at byte offset `off`.
static RA8_INTERNAL void	internal_gpt_reg_write (uint32_t ch, uint64_t off, uint32_t value)
	Dispatch a GPT register write; GTSTR/GTSTP gate the counter.
static RA8_INTERNAL void	internal_gpt_tick_channel (uc_engine *uc, uint32_t ch)
	Advance one running GPT channel by one chunk; raise overflow events.
static RA8_INTERNAL uint64_t	internal_gpt_read (uc_engine *uc, uint64_t addr, unsigned size)
	MMIO read inside the GPT window: route to the addressed channel.
static RA8_INTERNAL void	internal_gpt_write (uc_engine *uc, uint64_t addr, unsigned size, uint64_t value)
	MMIO write inside the GPT window: route to the addressed channel.
static RA8_INTERNAL void	internal_timer_tick (uc_engine *uc)
	Advance every running AGT channel, then every running GPT channel.
static RA8_INTERNAL void	internal_timer_reset (void)
	Clear all AGT + GPT channel state.
static RA8_INTERNAL void	internal_timer_report (void)
	Print one line per AGT / GPT channel that raised any event.
static RA8_INTERNAL void	internal_board_periph_timer_register (void)
	Self-register both timer windows before main runs (decentralized).

Variables
static agt_state_t	s_agt [k_agt_count]
static gpt_state_t	s_gpt [k_gpt_count]
static const board_periph_block_t	s_k_agt_block
	AGT register window + the combined timer tick / reset / report.
static const board_periph_block_t	s_k_gpt_block
	GPT register window (tick / reset / report handled by the AGT block).

Detailed Description

GPT + AGT timer peripheral-block model for the board emulator.

Models the two RA8D2 general-purpose timer families with real, advancing counters (ra8_gpt.c / ra8_agt.c semantics):

GPT (ra8_gpt_regs.h): 14 channels of 32-bit saw up-counter. GTSTR / GTSTP / GTCR.CST gate the count, GTPR sets the period, and a wrap past the period sets GTST.TCFPO; GPT0 overflow raises the GPT0 ELC event.
AGT (ra8_agt_regs.h): 10 channels of 16-bit reloading down-counter. AGTCR.TSTART arms the count and an underflow reloads and sets AGTCR.TUNDF; AGT0 raises the AGT0 combined ELC event.

The two families live in separate register windows, so this file registers a descriptor for each with the board_periph core; the per-chunk advance and the end-of-run report are attached to the AGT descriptor and cover BOTH families (AGT channels then GPT channels) so the historical tick / report order is preserved. Counter events are pended through the core's ICU -> NVIC path via board_periph_icu_raise_event.

Copyright: Copyright (c) 2026 Brighton Sikarskie SPDX-License-Identifier: MIT

Since: 0.1.0

Definition in file board_periph_timer.c.

Enumeration Type Documentation

◆ agt_map_t

enum agt_map_t : uint64_t

AGT block geometry (ra8_agt_regs.h, 16-bit view).

Enumerator
k_agt_base	AGT0 base.
k_agt_stride	Bytes per AGT channel.
k_agt_count	AGT0..AGT9.
k_agt_span	AGT span.
k_agt_off_agt	AGT counter (16-bit down).
k_agt_off_cma	AGTCMA compare-match A.
k_agt_off_cmb	AGTCMB compare-match B.
k_agt_off_cr	AGTCR control/status (8-bit).
k_agt_off_mr1	AGTMR1 mode 1 (8-bit).

Definition at line 35 of file board_periph_timer.c.

◆ agtcr_bit_t

enum agtcr_bit_t : uint32_t

AGTCR (control/status) bits – ra8_agt_agtcr_bits_t.

Enumerator
k_agtcr_tstart	TSTART start request.
k_agtcr_tcstf	TCSTF count-status flag (RO).
k_agtcr_tundf	TUNDF underflow flag (RW1C).
k_agtcr_tcmaf	TCMAF compare-match A flag (RW1C).
k_agtcr_tcmbf	TCMBF compare-match B flag (RW1C).

Definition at line 68 of file board_periph_timer.c.

◆ elc_event_t

enum elc_event_t : uint16_t

Canonical ELC event numbers the timer models emit (FSP ra8d2 bsp_elc).

RA8D2 ELC event signal table (HUM Ch 19): GPT0 overflow is 0x0C1 and AGT0 combined interrupt (underflow / compare-match) is 0x0DF. A firmware that routes one of these through ra8_isr_register writes the same number into an IELSR slot, so the ICU model can match the raised event to that slot.

Enumerator
k_event_gpt0_ovf	GPT0 GTCIV counter-overflow event.
k_event_agt0_int	AGT0 AGTI combined interrupt event.

Definition at line 93 of file board_periph_timer.c.

◆ gpt_bit_t

enum gpt_bit_t : uint32_t

GPT GTCR / GTST bits – ra8_gpt register notes.

Enumerator
k_gtcr_cst	GTCR.CST count-start.
k_gtst_tcfa	GTST.TCFA compare-match A.
k_gtst_tcfpo	GTST.TCFPO overflow.
k_gtst_tcfpu	GTST.TCFPU underflow.

Definition at line 77 of file board_periph_timer.c.

◆ gpt_map_t

enum gpt_map_t : uint64_t

GPT block geometry (ra8_gpt_regs.h, 32-bit channels).

Enumerator
k_gpt_base	GPT0 base.
k_gpt_stride	Bytes per GPT channel.
k_gpt_count	GPT0..GPT13.
k_gpt_span	GPT span.
k_gpt_off_gtstr	GTSTR software start.
k_gpt_off_gtstp	GTSTP software stop.
k_gpt_off_gtclr	GTCLR software clear.
k_gpt_off_gtcr	GTCR control (CST bit0).
k_gpt_off_gtst	GTST status.
k_gpt_off_gtcnt	GTCNT counter (32-bit up).
k_gpt_off_gtpr	GTPR period.

Definition at line 48 of file board_periph_timer.c.

◆ timer_field_t

enum timer_field_t : uint32_t

16-bit counter wrap value (also the GPT default period).

Enumerator
k_u16_max	16-bit counter wrap value.

Definition at line 63 of file board_periph_timer.c.

◆ timer_tune_t

enum timer_tune_t : uint32_t

Per-chunk advance for the modelled counters (one chunk == 1 tick).

The ra8_emulator run loop advances the timer counters and SysTick in lockstep – one GPT/AGT step and one SysTick tick per emulation chunk. On silicon these clocks are asynchronous: the GPT counts off PCLKD (megahertz) while a firmware poll loop samples on the 1 kHz SysTick, so GTCNT never lands on the same value at two consecutive samples. The model must preserve that "it is really counting" observability.

The GPT advance is therefore chosen ODD, i.e. coprime to the 2^N saw-PWM periods the drivers use (GTPR = 0xFFFF -> 2^16 counts, GTPR = 0xFFFFFFFF -> 2^32 counts). A power-of-two advance (the former 0x4000) evenly divides a 2^16 period, so GTCNT visited only four distinct values and aliased to a CONSTANT at any power-of-two sample interval – e.g. gpt_pwm_demo samples GTCNT every ra8_delay_ms(20) == 20 chunks, and 20 * 0x4000 == 5 * 0x10000 is an exact whole number of periods, so every sample read back the identical count and the demo latched a false "timer wedged" mismatch. An odd advance is coprime to 2^16 and 2^32, so n*step mod (period+1) has full period and no fixed millisecond sample cadence can alias GTCNT to a constant. 0x4001 also keeps the overflow cadence (~one wrap every four chunks) that the overflow- driven demos (gpt_irq_demo, gpt_one_shot_demo) rely on.

Enumerator

k_agt_step_per_chunk

AGT down-count per chunk.

k_gpt_step_per_chunk

GPT up-count per chunk; odd (.

).

Definition at line 122 of file board_periph_timer.c.

Function Documentation

◆ internal_agt_read()

RA8_INTERNAL uint64_t internal_agt_read	(	uc_engine *	uc,
		uint64_t	addr,
		unsigned	size )

static

MMIO read inside the AGT window: route to the addressed channel.

MMIO read inside the agt window: route to the addressed channel; this step is contained within the board periph timer model and uses bounded caller or module-owned storage.

Parameters

[in,out]	uc	Unicorn engine whose emulated state is read or updated.
[in]	addr	Guest address involved in the operation.
[in]	size	Size of the requested region or access in bytes.

Returns: The agt read result produced by the board periph timer model.

Return values

value The operation-specific agt read value.

Precondition: Arguments satisfy the ranges documented for agt read.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph timer model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 266 of file board_periph_timer.c.

References internal_agt_reg_read(), k_agt_base, k_agt_stride, and RA8_INTERNAL.

◆ internal_agt_reg_read()

RA8_INTERNAL uint64_t internal_agt_reg_read	(	uint32_t	ch,
		uint64_t	off )

static

Dispatch an AGT register read for channel ch at byte offset off.

Dispatch an agt register read for channel ch at byte offset off; this step is contained within the board periph timer model and uses bounded caller or module-owned storage.

Parameters

[in]	ch	Selected channel identifier.
[in]	off	Register or byte offset addressed by the operation.

Returns: The agt reg read result produced by the board periph timer model.

Return values

value The operation-specific agt reg read value.

Precondition: Arguments satisfy the ranges documented for agt reg read.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph timer model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 167 of file board_periph_timer.c.

References agt_state_t::cmpa, agt_state_t::cmpb, agt_state_t::counter, agt_state_t::cr, k_agt_off_agt, k_agt_off_cma, k_agt_off_cmb, k_agt_off_cr, k_agt_off_mr1, agt_state_t::mr1, RA8_INTERNAL, and s_agt.

Referenced by internal_agt_read().

◆ internal_agt_reg_write()

RA8_INTERNAL void internal_agt_reg_write	(	uint32_t	ch,
		uint64_t	off,
		uint32_t	value )

static

Dispatch an AGT register write; AGTCR.TSTART arms / status is RW1C.

Dispatch an agt register write; agtcr.tstart arms / status is rw1c; this step is contained within the board periph timer model and uses bounded caller or module-owned storage.

Parameters

[in]	ch	Selected channel identifier.
[in]	off	Register or byte offset addressed by the operation.
[in]	value	Register or payload value involved in the operation.

Precondition: Arguments satisfy the ranges documented for agt reg write.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph timer model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 199 of file board_periph_timer.c.

References agt_state_t::cmpa, agt_state_t::cmpb, agt_state_t::counter, agt_state_t::cr, k_agt_off_agt, k_agt_off_cma, k_agt_off_cmb, k_agt_off_cr, k_agt_off_mr1, k_agtcr_tcmaf, k_agtcr_tcmbf, k_agtcr_tcstf, k_agtcr_tstart, k_agtcr_tundf, agt_state_t::mr1, RA8_INTERNAL, agt_state_t::reload, and s_agt.

Referenced by internal_agt_write().

◆ internal_agt_tick_channel()

RA8_INTERNAL void internal_agt_tick_channel	(	uc_engine *	uc,
		uint32_t	ch )

static

Advance one running AGT channel by one chunk; raise events on wrap.

Advance one running agt channel by one chunk; raise events on wrap; this step is contained within the board periph timer model and uses bounded caller or module-owned storage.

Parameters

[in,out]	uc	Unicorn engine whose emulated state is read or updated.
[in]	ch	Selected channel identifier.

Precondition: Arguments satisfy the ranges documented for agt tick channel.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph timer model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 231 of file board_periph_timer.c.

References board_periph_icu_raise_event(), agt_state_t::counter, agt_state_t::cr, k_agt_step_per_chunk, k_agtcr_tstart, k_agtcr_tundf, k_event_agt0_int, RA8_INTERNAL, agt_state_t::reload, s_agt, and agt_state_t::underflows.

Referenced by internal_timer_tick().

◆ internal_agt_write()

RA8_INTERNAL void internal_agt_write	(	uc_engine *	uc,
		uint64_t	addr,
		unsigned	size,
		uint64_t	value )

static

MMIO write inside the AGT window: route to the addressed channel.

MMIO write inside the agt window: route to the addressed channel; this step is contained within the board periph timer model and uses bounded caller or module-owned storage.

Parameters

[in,out]	uc	Unicorn engine whose emulated state is read or updated.
[in]	addr	Guest address involved in the operation.
[in]	size	Size of the requested region or access in bytes.
[in]	value	Register or payload value involved in the operation.

Precondition: Arguments satisfy the ranges documented for agt write.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph timer model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 287 of file board_periph_timer.c.

References internal_agt_reg_write(), k_agt_base, and k_agt_stride.

◆ internal_board_periph_timer_register()

RA8_INTERNAL void internal_board_periph_timer_register ( void )

static

Self-register both timer windows before main runs (decentralized).

Definition at line 550 of file board_periph_timer.c.

References board_periph_register_block(), RA8_INTERNAL, s_k_agt_block, and s_k_gpt_block.

◆ internal_gpt_read()

RA8_INTERNAL uint64_t internal_gpt_read	(	uc_engine *	uc,
		uint64_t	addr,
		unsigned	size )

static

MMIO read inside the GPT window: route to the addressed channel.

MMIO read inside the gpt window: route to the addressed channel; this step is contained within the board periph timer model and uses bounded caller or module-owned storage.

Parameters

[in,out]	uc	Unicorn engine whose emulated state is read or updated.
[in]	addr	Guest address involved in the operation.
[in]	size	Size of the requested region or access in bytes.

Returns: The GPT read result produced by the board periph timer model.

Return values

value The operation-specific GPT read value.

Precondition: Arguments satisfy the ranges documented for GPT read.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph timer model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 415 of file board_periph_timer.c.

References internal_gpt_reg_read(), k_gpt_base, k_gpt_stride, and RA8_INTERNAL.

◆ internal_gpt_reg_read()

RA8_INTERNAL uint64_t internal_gpt_reg_read	(	uint32_t	ch,
		uint64_t	off )

static

Dispatch a GPT register read for channel ch at byte offset off.

Dispatch a gpt register read for channel ch at byte offset off; this step is contained within the board periph timer model and uses bounded caller or module-owned storage.

Parameters

[in]	ch	Selected channel identifier.
[in]	off	Register or byte offset addressed by the operation.

Returns: The GPT reg read result produced by the board periph timer model.

Return values

value The operation-specific GPT reg read value.

Precondition: Arguments satisfy the ranges documented for GPT reg read.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph timer model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 314 of file board_periph_timer.c.

References gpt_state_t::cnt, gpt_state_t::cr, k_gpt_off_gtcnt, k_gpt_off_gtcr, k_gpt_off_gtpr, k_gpt_off_gtst, gpt_state_t::period, RA8_INTERNAL, s_gpt, and gpt_state_t::st.

Referenced by internal_gpt_read().

◆ internal_gpt_reg_write()

RA8_INTERNAL void internal_gpt_reg_write	(	uint32_t	ch,
		uint64_t	off,
		uint32_t	value )

static

Dispatch a GPT register write; GTSTR/GTSTP gate the counter.

Dispatch a gpt register write; gtstr/gtstp gate the counter; this step is contained within the board periph timer model and uses bounded caller or module-owned storage.

Parameters

[in]	ch	Selected channel identifier.
[in]	off	Register or byte offset addressed by the operation.
[in]	value	Register or payload value involved in the operation.

Precondition: Arguments satisfy the ranges documented for GPT reg write.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph timer model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 343 of file board_periph_timer.c.

References gpt_state_t::cnt, gpt_state_t::cr, k_gpt_off_gtclr, k_gpt_off_gtcnt, k_gpt_off_gtcr, k_gpt_off_gtpr, k_gpt_off_gtst, k_gpt_off_gtstp, k_gpt_off_gtstr, k_gtcr_cst, gpt_state_t::period, RA8_INTERNAL, s_gpt, and gpt_state_t::st.

Referenced by internal_gpt_write().

◆ internal_gpt_tick_channel()

RA8_INTERNAL void internal_gpt_tick_channel	(	uc_engine *	uc,
		uint32_t	ch )

static

Advance one running GPT channel by one chunk; raise overflow events.

Advance one running gpt channel by one chunk; raise overflow events; this step is contained within the board periph timer model and uses bounded caller or module-owned storage.

Parameters

[in,out]	uc	Unicorn engine whose emulated state is read or updated.
[in]	ch	Selected channel identifier.

Precondition: Arguments satisfy the ranges documented for GPT tick channel.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph timer model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 381 of file board_periph_timer.c.

References board_periph_icu_raise_event(), gpt_state_t::cnt, gpt_state_t::cr, k_event_gpt0_ovf, k_gpt_step_per_chunk, k_gtcr_cst, k_gtst_tcfpo, k_u16_max, gpt_state_t::overflows, gpt_state_t::period, RA8_INTERNAL, s_gpt, and gpt_state_t::st.

Referenced by internal_timer_tick().

◆ internal_gpt_write()

RA8_INTERNAL void internal_gpt_write	(	uc_engine *	uc,
		uint64_t	addr,
		unsigned	size,
		uint64_t	value )

static

MMIO write inside the GPT window: route to the addressed channel.

MMIO write inside the gpt window: route to the addressed channel; this step is contained within the board periph timer model and uses bounded caller or module-owned storage.

Parameters

[in,out]	uc	Unicorn engine whose emulated state is read or updated.
[in]	addr	Guest address involved in the operation.
[in]	size	Size of the requested region or access in bytes.
[in]	value	Register or payload value involved in the operation.

Precondition: Arguments satisfy the ranges documented for GPT write.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph timer model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 436 of file board_periph_timer.c.

References internal_gpt_reg_write(), k_gpt_base, and k_gpt_stride.

◆ internal_timer_report()

RA8_INTERNAL void internal_timer_report ( void )

static

Print one line per AGT / GPT channel that raised any event.

Print one line per agt / gpt channel that raised any event; this step is contained within the board periph timer model and uses bounded caller or module-owned storage.

Precondition: Arguments satisfy the ranges documented for timer report.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph timer model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 496 of file board_periph_timer.c.

References k_agt_count, k_agtcr_tstart, k_gpt_count, priv_emu_io_errf(), RA8_INTERNAL, s_agt, and s_gpt.

◆ internal_timer_reset()

RA8_INTERNAL void internal_timer_reset ( void )

static

Clear all AGT + GPT channel state.

Clear all agt + gpt channel state; this step is contained within the board periph timer model and uses bounded caller or module-owned storage.

Precondition: Arguments satisfy the ranges documented for timer reset.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph timer model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 478 of file board_periph_timer.c.

References k_agt_count, k_gpt_count, RA8_INTERNAL, s_agt, and s_gpt.

◆ internal_timer_tick()

RA8_INTERNAL void internal_timer_tick ( uc_engine * uc )

static

Advance every running AGT channel, then every running GPT channel.

Advance every running agt channel, then every running gpt channel; this step is contained within the board periph timer model and uses bounded caller or module-owned storage.

Parameters

[in,out] uc Unicorn engine whose emulated state is read or updated.

Precondition: Arguments satisfy the ranges documented for timer tick.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph timer model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 460 of file board_periph_timer.c.

References internal_agt_tick_channel(), internal_gpt_tick_channel(), k_agt_count, k_gpt_count, and RA8_INTERNAL.

Variable Documentation

◆ s_agt

agt_state_t s_agt[k_agt_count]

static

Definition at line 147 of file board_periph_timer.c.

Referenced by internal_agt_reg_read(), internal_agt_reg_write(), internal_agt_tick_channel(), internal_timer_report(), and internal_timer_reset().

◆ s_gpt

gpt_state_t s_gpt[k_gpt_count]

static

Definition at line 148 of file board_periph_timer.c.

Referenced by internal_gpt_reg_read(), internal_gpt_reg_write(), internal_gpt_tick_channel(), internal_timer_report(), and internal_timer_reset().

◆ s_k_agt_block

const board_periph_block_t s_k_agt_block

static

Initial value:

                                                = {
  .base   = (uint64_t)k_agt_base,
  .span   = (uint64_t)k_agt_span,
  .order  = (uint32_t)k_block_order_timer,
  .read   = internal_agt_read,
  .write  = internal_agt_write,
  .tick   = internal_timer_tick,
  .reset  = internal_timer_reset,
  .report = internal_timer_report,
  .name   = "AGT",
}

AGT register window + the combined timer tick / reset / report.

Definition at line 524 of file board_periph_timer.c.

Referenced by internal_board_periph_timer_register().

◆ s_k_gpt_block

const board_periph_block_t s_k_gpt_block

static

Initial value:

                                                = {
  .base   = (uint64_t)k_gpt_base,
  .span   = (uint64_t)k_gpt_span,
  .order  = (uint32_t)k_block_order_timer,
  .read   = internal_gpt_read,
  .write  = internal_gpt_write,
  .tick   = nullptr,
  .reset  = nullptr,
  .report = nullptr,
  .name   = "GPT",
}

GPT register window (tick / reset / report handled by the AGT block).

Definition at line 537 of file board_periph_timer.c.

Referenced by internal_board_periph_timer_register().

Data Structures

Enumerations

Functions

Variables

Detailed Description

Enumeration Type Documentation

◆ agt_map_t

◆ agtcr_bit_t

◆ elc_event_t

◆ gpt_bit_t

◆ gpt_map_t

◆ timer_field_t

◆ timer_tune_t

Function Documentation

◆ internal_agt_read()

◆ internal_agt_reg_read()

◆ internal_agt_reg_write()

◆ internal_agt_tick_channel()

◆ internal_agt_write()

◆ internal_board_periph_timer_register()

◆ internal_gpt_read()

◆ internal_gpt_reg_read()

◆ internal_gpt_reg_write()

◆ internal_gpt_tick_channel()

◆ internal_gpt_write()

◆ internal_timer_report()

◆ internal_timer_reset()

◆ internal_timer_tick()

Variable Documentation

◆ s_agt

◆ s_gpt

◆ s_k_agt_block

◆ s_k_gpt_block