ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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ra8_lvd_channel_map_t Struct Reference

Per-channel register-offset bundle. More...

#include <ra8_lvd_internal.h>

Data Fields

ra8_lvd_off_t cmpcr
 PVDxCMPCR offset.
ra8_lvd_off_t cr0
 PVDxCR0 offset.
ra8_lvd_off_t cr1
 PVDxCR1 (m only; n: same as cr0 stub).
ra8_lvd_off_t sr
 PVDxSR (m only; n: same as cr0 stub).
ra8_lvd_off_t fcr
 PVDxFCR (RHSEL).
bool has_irq
 true for monitor m channels (1, 2).

Detailed Description

Per-channel register-offset bundle.

Channels 1 and 2 use the m-series offsets and have valid CR1 / SR registers. Channels 4 and 5 use the n-series offsets and have no CR1 / SR (the has_irq flag flips them off). FCR is exposed for all four channels (HUM 8.2.8 m and 8.2.9 n).

Definition at line 48 of file ra8_lvd_internal.h.

Field Documentation

◆ cmpcr

ra8_lvd_off_t ra8_lvd_channel_map_t::cmpcr

◆ cr0

◆ cr1

ra8_lvd_off_t ra8_lvd_channel_map_t::cr1

PVDxCR1 (m only; n: same as cr0 stub).

Definition at line 51 of file ra8_lvd_internal.h.

Referenced by internal_program_cr1(), ra8_lvd_channel_deinit(), ra8_lvd_set_irq_edge(), and ra8_lvd_set_irq_kind().

◆ fcr

ra8_lvd_off_t ra8_lvd_channel_map_t::fcr

◆ has_irq

◆ sr

ra8_lvd_off_t ra8_lvd_channel_map_t::sr

The documentation for this struct was generated from the following file: