ra8_lvd_runtime.c

Go to the documentation of this file.

 
#include <stdint.h>
 
#include "ra8_check.h"
#include "ra8_err.h"
#include "ra8_lvd.h"
#include "ra8_lvd_internal.h"
#include "ra8_lvd_regs.h"

static const char* s_tag = "LVD";
 
/* =============================================================================
 * IRQ / reset / CMPE single-bit toggles
 * =============================================================================
 */

ra8_err_t ra8_lvd_enable_irq(ra8_lvd_channel_t channel)
{
  uint8_t         idx     = 0U;
  const ra8_err_t map_err = priv_ra8_lvd_internal_channel_to_idx(channel, &idx);
  RA8_RETURN_ON_ERROR(map_err, s_tag, "lvd_enable_irq: bad channel");
 
  const ra8_lvd_channel_map_t map = g_lvd_map[idx];
  if (!map.has_irq) {
    return k_ra8_err_not_supported;
  }
  /* set RIE. */
  /* HUM Ch 8.2.4 "PVDmCR0 : Voltage Monitor m Circuit Control Register 0" p 305 */
  priv_ra8_lvd_internal_cr0_rmw(&map, 0U, k_ra8_lvd_cr0_mask_rie);
  return k_ra8_ok;
}

ra8_err_t ra8_lvd_disable_irq(ra8_lvd_channel_t channel)
{
  uint8_t         idx     = 0U;
  const ra8_err_t map_err = priv_ra8_lvd_internal_channel_to_idx(channel, &idx);
  RA8_RETURN_ON_ERROR(map_err, s_tag, "lvd_disable_irq: bad channel");
 
  const ra8_lvd_channel_map_t map = g_lvd_map[idx];
  if (!map.has_irq) {
    return k_ra8_err_not_supported;
  }
  /* HUM Ch 8.2.4 "PVDmCR0" p 305 */
  priv_ra8_lvd_internal_cr0_rmw(&map, k_ra8_lvd_cr0_mask_rie, 0U);
  return k_ra8_ok;
}

ra8_err_t ra8_lvd_enable_reset(ra8_lvd_channel_t channel)
{
  uint8_t         idx     = 0U;
  const ra8_err_t map_err = priv_ra8_lvd_internal_channel_to_idx(channel, &idx);
  /* GCOVR_EXCL_BR_START -- channel_to_idx() error edge; enable_reset pre-validates the channel */
  RA8_RETURN_ON_ERROR(map_err, s_tag, "lvd_enable_reset: bad channel");
  /* GCOVR_EXCL_BR_STOP */
 
  const ra8_lvd_channel_map_t map = g_lvd_map[idx];
  if (map.has_irq) {
    /* m channel: set RI then RIE. */
    /* HUM Ch 8.2.4 "PVDmCR0" p 305 */
    priv_ra8_lvd_internal_cr0_rmw(&map,
                                  0U,
                                  (uint8_t)(k_ra8_lvd_cr0_mask_ri | k_ra8_lvd_cr0_mask_rie));
  } else {
    /* n channel: set RE only -- it is the only response option. */
    /* HUM Ch 8.2.5 "PVDnCR0" p 306 */
    priv_ra8_lvd_internal_cr0_rmw(&map, 0U, k_ra8_lvd_cr0_mask_re);
  }
  return k_ra8_ok;
}

ra8_err_t ra8_lvd_disable_reset(ra8_lvd_channel_t channel)
{
  uint8_t         idx     = 0U;
  const ra8_err_t map_err = priv_ra8_lvd_internal_channel_to_idx(channel, &idx);
  /* GCOVR_EXCL_BR_START -- channel_to_idx() error edge; disable_reset pre-validates the channel */
  RA8_RETURN_ON_ERROR(map_err, s_tag, "lvd_disable_reset: bad channel");
  /* GCOVR_EXCL_BR_STOP */
 
  const ra8_lvd_channel_map_t map = g_lvd_map[idx];
  /* HUM Ch 8.2.4 "PVDmCR0" p 305 */
  uint8_t enable_bit = k_ra8_lvd_cr0_mask_re;
  if (map.has_irq) {
    enable_bit = k_ra8_lvd_cr0_mask_rie;
  }
  priv_ra8_lvd_internal_cr0_rmw(&map, enable_bit, 0U);
  return k_ra8_ok;
}

ra8_err_t ra8_lvd_enable_cmpe(ra8_lvd_channel_t channel)
{
  uint8_t         idx     = 0U;
  const ra8_err_t map_err = priv_ra8_lvd_internal_channel_to_idx(channel, &idx);
  RA8_RETURN_ON_ERROR(map_err, s_tag, "lvd_enable_cmpe: bad channel");
 
  const ra8_lvd_channel_map_t map = g_lvd_map[idx];
  /* HUM Ch 8.2.4 "PVDmCR0" p 305 */
  priv_ra8_lvd_internal_cr0_rmw(&map, 0U, k_ra8_lvd_cr0_mask_cmpe);
  return k_ra8_ok;
}

ra8_err_t ra8_lvd_disable_cmpe(ra8_lvd_channel_t channel)
{
  uint8_t         idx     = 0U;
  const ra8_err_t map_err = priv_ra8_lvd_internal_channel_to_idx(channel, &idx);
  RA8_RETURN_ON_ERROR(map_err, s_tag, "lvd_disable_cmpe: bad channel");
 
  const ra8_lvd_channel_map_t map = g_lvd_map[idx];
  /* HUM Ch 8.2.4 "PVDmCR0" p 305 */
  priv_ra8_lvd_internal_cr0_rmw(&map, k_ra8_lvd_cr0_mask_cmpe, 0U);
  return k_ra8_ok;
}
 
/* =============================================================================
 * Filter + RHSEL + RN runtime updates
 * =============================================================================
 */

ra8_err_t
ra8_lvd_set_filter(ra8_lvd_channel_t channel, ra8_lvd_loco_div_t filter_div, bool filter_en)
{
  uint8_t         idx     = 0U;
  const ra8_err_t map_err = priv_ra8_lvd_internal_channel_to_idx(channel, &idx);
  RA8_RETURN_ON_ERROR(map_err, s_tag, "lvd_set_filter: bad channel");
 
  const ra8_err_t div_err = priv_ra8_lvd_internal_validate_div(filter_div);
  RA8_RETURN_ON_ERROR(div_err, s_tag, "lvd_set_filter: bad div");
 
  const ra8_lvd_channel_map_t map = g_lvd_map[idx];
 
  /* HUM Ch 8.2.4 "PVDmCR0" p 305 / HUM Ch 8.2.5 "PVDnCR0" p 306
   * -- FSAMP can only be modified while DFDIS = 1. */
  priv_ra8_lvd_internal_cr0_rmw(&map, 0U, k_ra8_lvd_cr0_mask_dfdis);
 
  const uint8_t fsamp_bits =
    (uint8_t)(((uint8_t)filter_div << k_ra8_lvd_cr0_shift_fsamp) & k_ra8_lvd_cr0_mask_fsamp);
  priv_ra8_lvd_internal_cr0_rmw(&map, k_ra8_lvd_cr0_mask_fsamp, fsamp_bits);
 
  if (filter_en) {
    /* Drop DFDIS only after FSAMP has landed. */
    priv_ra8_lvd_internal_cr0_rmw(&map, k_ra8_lvd_cr0_mask_dfdis, 0U);
  }
  return k_ra8_ok;
}

ra8_err_t ra8_lvd_set_hysteresis_mode(ra8_lvd_channel_t channel, ra8_lvd_hysteresis_t hyst)
{
  uint8_t         idx     = 0U;
  const ra8_err_t map_err = priv_ra8_lvd_internal_channel_to_idx(channel, &idx);
  RA8_RETURN_ON_ERROR(map_err, s_tag, "lvd_set_hysteresis_mode: bad channel");
 
  if ((uint8_t)hyst > k_ra8_lvd_hysteresis_hvd) {
    return k_ra8_err_invalid_arg;
  }
 
  const ra8_lvd_channel_map_t map = g_lvd_map[idx];
 
  /* HUM Ch 8.2.8 "PVDmFCR" p 308 last bullet -- "RHSEL must not be set
   * to 1 when PVDmCR0.RI = 0." Enforce only on m channels (n channels
   * have no RI bit; their RHSEL is always legal). */
  if (map.has_irq && (hyst == k_ra8_lvd_hysteresis_hvd)) {
    if (priv_ra8_lvd_internal_read_ri(&map) == 0U) {
      return k_ra8_err_invalid_state;
    }
  }
 
  /* HUM Ch 8.2.8 / 8.2.9 -- RHSEL can only be modified when every
   * PVDE is 0; preserve and restore this channel's PVDE. */
  const uint8_t prev_cmpcr = *ra8_lvd_reg8(map.cmpcr);
  const uint8_t pvde_was   = (uint8_t)(prev_cmpcr & k_ra8_lvd_cmpcr_mask_pvde);
  *ra8_lvd_reg8(map.cmpcr) = (uint8_t)(prev_cmpcr & (uint8_t)~k_ra8_lvd_cmpcr_mask_pvde);
 
  /* HUM Ch 8.2.8 "PVDmFCR" p 308 */
  *ra8_lvd_reg8(map.fcr) = (uint8_t)((uint8_t)hyst & k_ra8_lvd_fcr_mask_rhsel);
 
  /* Restore PVDE if it had been set. */
  *ra8_lvd_reg8(map.cmpcr) = (uint8_t)(*ra8_lvd_reg8(map.cmpcr) | pvde_was);
  return k_ra8_ok;
}

ra8_err_t ra8_lvd_set_negate_mode(ra8_lvd_channel_t channel, ra8_lvd_negate_t negate)
{
  uint8_t         idx     = 0U;
  const ra8_err_t map_err = priv_ra8_lvd_internal_channel_to_idx(channel, &idx);
  /* GCOVR_EXCL_BR_START -- channel_to_idx() error edge; set_negate_mode pre-validates it */
  RA8_RETURN_ON_ERROR(map_err, s_tag, "lvd_set_negate_mode: bad channel");
  /* GCOVR_EXCL_BR_STOP */
 
  const ra8_lvd_channel_map_t map = g_lvd_map[idx];
  if (!map.has_irq) {
    return k_ra8_err_not_supported;
  }
  if ((uint8_t)negate > k_ra8_lvd_negate_after_assert) {
    return k_ra8_err_invalid_arg;
  }
 
  /* HUM Ch 8.2.4 "PVDmCR0" p 306 */
  /* HUM Ch 8.2.8 "PVDmFCR" p 308 */
  if (negate == k_ra8_lvd_negate_after_assert) {
    const uint8_t fcr = *ra8_lvd_reg8(map.fcr);
    if ((fcr & k_ra8_lvd_fcr_mask_rhsel) != 0U) {
      return k_ra8_err_invalid_state;
    }
  }
 
  /* HUM Ch 8.2.4 "PVDmCR0" p 305 */
  priv_ra8_lvd_internal_cr0_rmw(&map,
                                k_ra8_lvd_cr0_mask_rn,
                                (negate == k_ra8_lvd_negate_after_assert) ? k_ra8_lvd_cr0_mask_rn
                                                                          : 0U);
  return k_ra8_ok;
}
 
/* =============================================================================
 * Status read / clear
 * =============================================================================
 */

ra8_err_t ra8_lvd_get_status(ra8_lvd_channel_t channel, ra8_lvd_status_t* out)
{
  RA8_CHECK_NULL_PTR(out, s_tag, "out must not be nullptr");
 
  uint8_t         idx     = 0U;
  const ra8_err_t map_err = priv_ra8_lvd_internal_channel_to_idx(channel, &idx);
  RA8_RETURN_ON_ERROR(map_err, s_tag, "lvd_get_status: bad channel");
 
  const ra8_lvd_channel_map_t map = g_lvd_map[idx];
  if (!map.has_irq) {
    return k_ra8_err_not_supported;
  }
 
  /* HUM Ch 8.2.7 "PVDmSR : Voltage Monitor m Circuit Status Register" p 307 */
  const uint8_t sr = *ra8_lvd_reg8(map.sr);
  out->crossed     = ((sr & k_ra8_lvd_sr_mask_det) != 0U);
  out->above       = ((sr & k_ra8_lvd_sr_mask_mon) != 0U);
  return k_ra8_ok;
}

ra8_err_t ra8_lvd_clear_status(ra8_lvd_channel_t channel)
{
  uint8_t         idx     = 0U;
  const ra8_err_t map_err = priv_ra8_lvd_internal_channel_to_idx(channel, &idx);
  RA8_RETURN_ON_ERROR(map_err, s_tag, "lvd_clear_status: bad channel");
 
  const ra8_lvd_channel_map_t map = g_lvd_map[idx];
  if (!map.has_irq) {
    return k_ra8_err_not_supported;
  }
 
  /* HUM Ch 8.2.7 "PVDmSR : Voltage Monitor m Circuit Status Register" p 307
   * Note 1 -- only 0 can be written to DET. MON is preserved by
   * clearing only the DET bit. */
  const uint8_t sr      = *ra8_lvd_reg8(map.sr);
  const uint8_t next    = (uint8_t)(sr & (uint8_t)~k_ra8_lvd_sr_mask_det);
  *ra8_lvd_reg8(map.sr) = next;
  return k_ra8_ok;
}