ra8_lvd_events.c

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#include <stdint.h>
 
#include "ra8_check.h"
#include "ra8_err.h"
#include "ra8_lvd.h"
#include "ra8_lvd_internal.h"
#include "ra8_lvd_regs.h"

static const char* s_tag = "LVD";
 
/* =============================================================================
 * Callback storage
 * =============================================================================
 */

static ra8_lvd_event_fn_t s_lvd_fn;

static void* s_lvd_ctx;

static ra8_lvd_event_fn_t s_lvd_chan_fn[k_ra8_lvd_map_idx_count];

static void* s_lvd_chan_ctx[k_ra8_lvd_map_idx_count];
 
/* =============================================================================
 * Security attribution + n-channel lock
 * =============================================================================
 */

ra8_err_t ra8_lvd_set_security(uint32_t mask)
{
  /* HUM Ch 8.2.1 "PVDSAR : Programmable Voltage Detection Security
   * Attribution Register" p 302 */
  if ((mask & ~k_ra8_lvd_pvdsar_mask_all) != 0U) {
    return k_ra8_err_invalid_arg;
  }
  *ra8_lvd_reg32(k_ra8_lvd_pvdsar_off) = mask;
  return k_ra8_ok;
}

ra8_err_t ra8_lvd_unlock_n_channels(void)
{
  /* HUM Ch 8.2.10 "PVDLR : Voltage Monitor Lock Register" p 309 */
  *ra8_lvd_reg8(k_ra8_lvd_pvdlr_off) = k_ra8_lvd_pvdlr_value_unlock;
  return k_ra8_ok;
}

ra8_err_t ra8_lvd_relock_n_channels(void)
{
  /* HUM Ch 8.2.10 "PVDLR : Voltage Monitor Lock Register" p 309 --
   * "if you write an arbitrary value to the LOCK, the LOCK bit is
   * fixed to 1." */
  *ra8_lvd_reg8(k_ra8_lvd_pvdlr_off) = k_ra8_lvd_pvdlr_value_relock;
  return k_ra8_ok;
}
 
/* =============================================================================
 * ELC + standby helpers
 * =============================================================================
 */

ra8_err_t ra8_lvd_enable_elc_event(ra8_lvd_channel_t channel)
{
  uint8_t         idx     = 0U;
  const ra8_err_t map_err = priv_ra8_lvd_internal_channel_to_idx(channel, &idx);
  /* GCOVR_EXCL_BR_START -- channel_to_idx() error edge; enable_elc_event pre-validates it */
  RA8_RETURN_ON_ERROR(map_err, s_tag, "lvd_enable_elc_event: bad channel");
  /* GCOVR_EXCL_BR_STOP */
 
  const ra8_lvd_channel_map_t map = g_lvd_map[idx];
  if (!map.has_irq) {
    return k_ra8_err_not_supported;
  }
 
  /* HUM Ch 8.7 "Event Link Controller (ELC) Output" p 315 -- the event
   * line tracks the comparator output enable: clear DET first, then
   * raise CMPE. */
  /* HUM Ch 8.2.7 "PVDmSR : Voltage Monitor m Circuit Status Register" p 307 */
  const uint8_t sr      = *ra8_lvd_reg8(map.sr);
  *ra8_lvd_reg8(map.sr) = (uint8_t)(sr & (uint8_t)~k_ra8_lvd_sr_mask_det);
  /* HUM Ch 8.2.4 "PVDmCR0" p 305 */
  priv_ra8_lvd_internal_cr0_rmw(&map, 0U, k_ra8_lvd_cr0_mask_cmpe);
  return k_ra8_ok;
}

ra8_err_t ra8_lvd_disable_elc_event(ra8_lvd_channel_t channel)
{
  uint8_t         idx     = 0U;
  const ra8_err_t map_err = priv_ra8_lvd_internal_channel_to_idx(channel, &idx);
  RA8_RETURN_ON_ERROR(map_err, s_tag, "lvd_disable_elc_event: bad channel");
 
  const ra8_lvd_channel_map_t map = g_lvd_map[idx];
  if (!map.has_irq) {
    return k_ra8_err_not_supported;
  }
  /* HUM Ch 8.2.4 "PVDmCR0" p 305 -- clear CMPE so the ELC line goes
   * inactive (HUM 8.7 p 315). */
  priv_ra8_lvd_internal_cr0_rmw(&map, k_ra8_lvd_cr0_mask_cmpe, 0U);
  return k_ra8_ok;
}

ra8_err_t ra8_lvd_configure_for_standby(ra8_lvd_channel_t channel)
{
  uint8_t         idx     = 0U;
  const ra8_err_t map_err = priv_ra8_lvd_internal_channel_to_idx(channel, &idx);
  RA8_RETURN_ON_ERROR(map_err, s_tag, "lvd_configure_for_standby: bad channel");
 
  const ra8_lvd_channel_map_t map = g_lvd_map[idx];
 
  /* HUM Ch 8.5(1) "Setting in Software Standby mode" p 311 +
   * HUM Ch 8.5(2) "Settings in Deep Software Standby mode" p 312 --
   * disable the digital filter and (for m channels) clear RI + RN. */
  uint8_t set_bits = k_ra8_lvd_cr0_mask_dfdis;
  uint8_t clr_bits = 0U;
  if (map.has_irq) {
    clr_bits |= k_ra8_lvd_cr0_mask_ri;
    clr_bits |= k_ra8_lvd_cr0_mask_rn;
  }
  /* HUM Ch 8.2.4 "PVDmCR0" p 305 */
  priv_ra8_lvd_internal_cr0_rmw(&map, clr_bits, set_bits);
  return k_ra8_ok;
}

ra8_err_t ra8_lvd_cancel_deep_standby_path(void)
{
  /* HUM Ch 8.2.4 "PVDmCR0" p 305 */
  for (uint8_t i = 0U; i < k_ra8_lvd_nmi_channel_count; ++i) {
    priv_ra8_lvd_internal_cr0_rmw(&g_lvd_map[i], k_ra8_lvd_cr0_mask_ri, 0U);
  }
  return k_ra8_ok;
}
 
/* =============================================================================
 * Filter timing helper (pure)
 * =============================================================================
 */

uint32_t ra8_lvd_filter_delay_us(ra8_lvd_loco_div_t div, uint32_t loco_hz)
{
  /* HUM Table 8.4 step 8 (p 312) / Table 8.6 step 8 (p 315): wait for
   * "2s + 3 cycles of the LOCO" where s = 2^(div+1). */
  uint8_t safe_div = (uint8_t)div;
  if (safe_div > k_ra8_lvd_loco_div_max) {
    safe_div = k_ra8_lvd_loco_div_max;
  }
  const uint32_t local_factor = (uint32_t)1U << (safe_div + 1U);
  const uint32_t loco_cycles  = (k_ra8_lvd_filter_factor * local_factor) + k_ra8_lvd_filter_extra;
  const uint32_t hz           = (loco_hz != 0U) ? loco_hz : k_ra8_lvd_loco_hz_default;
  /* +1 us round-up matches FSP's r_lvd_filter_delay computation. */
  return ((loco_cycles * k_ra8_lvd_us_per_sec) / hz) + 1U;
}
 
/* =============================================================================
 * Callback registration + ISR demux
 * =============================================================================
 */

ra8_err_t ra8_lvd_attach_handler(ra8_lvd_event_fn_t fn, void* ctx)
{
  s_lvd_fn  = fn;
  s_lvd_ctx = ctx;
  return k_ra8_ok;
}

ra8_err_t
ra8_lvd_attach_channel_handler(ra8_lvd_channel_t channel, ra8_lvd_event_fn_t fn, void* ctx)
{
  uint8_t         idx     = 0U;
  const ra8_err_t map_err = priv_ra8_lvd_internal_channel_to_idx(channel, &idx);
  RA8_RETURN_ON_ERROR(map_err, s_tag, "lvd_attach_channel_handler: bad channel");
 
  const ra8_lvd_channel_map_t map = g_lvd_map[idx];
  if (!map.has_irq) {
    return k_ra8_err_not_supported;
  }
  s_lvd_chan_fn[idx]  = fn;
  s_lvd_chan_ctx[idx] = ctx;
  return k_ra8_ok;
}

void ra8_lvd_dispatch(ra8_lvd_channel_t channel)
{
  uint8_t         idx     = 0U;
  const ra8_err_t map_err = priv_ra8_lvd_internal_channel_to_idx(channel, &idx);
  if (map_err != k_ra8_ok) {
    return;
  }
  const ra8_lvd_channel_map_t map = g_lvd_map[idx];
 
  /* Only m channels have a status register / IRQ path. */
  if (!map.has_irq) {
    return;
  }
 
  /* HUM Ch 8.2.7 "PVDmSR : Voltage Monitor m Circuit Status Register" p 307
   * -- only fire the callback if a crossing was actually latched. */
  const uint8_t sr = *ra8_lvd_reg8(map.sr);
  if ((sr & k_ra8_lvd_sr_mask_det) == 0U) {
    return;
  }
 
  /* Per-channel callback wins; otherwise fall back to the shared one. */
  const ra8_lvd_event_fn_t chan_fn  = s_lvd_chan_fn[idx];
  void* const              chan_ctx = s_lvd_chan_ctx[idx];
  const ra8_lvd_event_fn_t fn       = (chan_fn != nullptr) ? chan_fn : s_lvd_fn;
  void* const              ctx      = (chan_fn != nullptr) ? chan_ctx : s_lvd_ctx;
  if (fn != nullptr) {
    fn(ctx, channel);
  }
 
  /* Write 0 to DET so the next crossing can latch (HUM 8.2.7 Note 1 p 307). */
  const uint8_t cleared = (uint8_t)(*ra8_lvd_reg8(map.sr) & (uint8_t)~k_ra8_lvd_sr_mask_det);
  *ra8_lvd_reg8(map.sr) = cleared;
}