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ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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PDG block register window mapped at k_ra8_pdg_base_addr. More...
#include <ra8_pdg_regs.h>
Data Fields | |
| volatile uint16_t | GTDLYCR |
| +0x000 HUM 23.2.1 p 1154 | |
| volatile uint16_t | GTDLYCR2 |
| +0x002 HUM 23.2.2 p 1155 | |
| volatile uint8_t | reserved_004 [k_ra8_pdg_off_gtdlyr0 - k_ra8_pdg_off_after_cr2] |
| +0x004..0x017 reserved. | |
| r_pdg_dly_pair_t | GTDLYR [k_ra8_pdg_channel_count] |
| +0x018..0x027 rise. | |
| r_pdg_dly_pair_t | GTDLYF [k_ra8_pdg_channel_count] |
| +0x028..0x037 fall. | |
PDG block register window mapped at k_ra8_pdg_base_addr.
Field offsets verified against HUM Ch 23.2 (p 1154-1158):
The reserved gap is modelled as a fixed-size byte filler so the subsequent arrays land at exactly the HUM-specified offset.
Definition at line 278 of file ra8_pdg_regs.h.
| volatile uint16_t r_pdg_regs_t::GTDLYCR |
+0x000 HUM 23.2.1 p 1154
Definition at line 279 of file ra8_pdg_regs.h.
Referenced by internal_pdg_is_initialized(), internal_program_dll(), ra8_pdg_clear_status(), ra8_pdg_deinit(), ra8_pdg_get_status(), ra8_pdg_get_status_full(), and ra8_pdg_set_frange().
| volatile uint16_t r_pdg_regs_t::GTDLYCR2 |
+0x002 HUM 23.2.2 p 1155
Definition at line 280 of file ra8_pdg_regs.h.
Referenced by internal_program_dll(), ra8_pdg_channel_bypass_set(), ra8_pdg_deinit(), ra8_pdg_enter_stop(), ra8_pdg_exit_stop(), ra8_pdg_get_status_full(), and ra8_pdg_set_frange().
| r_pdg_dly_pair_t r_pdg_regs_t::GTDLYF[k_ra8_pdg_channel_count] |
+0x028..0x037 fall.
Definition at line 284 of file ra8_pdg_regs.h.
Referenced by internal_dly_cell(), and ra8_pdg_deinit().
| r_pdg_dly_pair_t r_pdg_regs_t::GTDLYR[k_ra8_pdg_channel_count] |
+0x018..0x027 rise.
Definition at line 283 of file ra8_pdg_regs.h.
Referenced by internal_dly_cell(), and ra8_pdg_deinit().
| volatile uint8_t r_pdg_regs_t::reserved_004[k_ra8_pdg_off_gtdlyr0 - k_ra8_pdg_off_after_cr2] |
+0x004..0x017 reserved.
Definition at line 282 of file ra8_pdg_regs.h.