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ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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One GPTP timer unit's register block (HUM Ch 35.3.2 / 35.3.3). More...
#include <ra8_ether_regs.h>
Data Fields | |
| volatile uint32_t | PTPTIVC |
| +0x00 Timer Increment Value Cfg. | |
| volatile uint32_t | reserved04 [3] |
| +0x04..0x0C Reserved. | |
| volatile uint32_t | PTPTOVCL |
| +0x10 Timer Offset Value Cfg L. | |
| volatile uint32_t | PTPTOVCM |
| +0x14 Timer Offset Value Cfg M. | |
| volatile uint32_t | PTPTOVCU |
| +0x18 Timer Offset Value Cfg U. | |
| volatile uint32_t | reserved1c |
| +0x1C Reserved. | |
| volatile uint32_t | PTPAVTPTML |
| +0x20 AVTP Timer Monitoring L. | |
| volatile uint32_t | PTPAVTPTMU |
| +0x24 AVTP Timer Monitoring U. | |
| volatile uint32_t | reserved28 [2] |
| +0x28..0x2C Reserved. | |
| volatile uint32_t | PTPGPTPTML |
| +0x30 GPTP Timer Monitoring L. | |
| volatile uint32_t | PTPGPTPTMM |
| +0x34 GPTP Timer Monitoring M. | |
| volatile uint32_t | PTPGPTPTMU |
| +0x38 GPTP Timer Monitoring U. | |
| volatile uint32_t | reserved3c |
| +0x3C Reserved. | |
One GPTP timer unit's register block (HUM Ch 35.3.2 / 35.3.3).
The block repeats every k_ra8_gptp_timer_stride bytes starting at k_ra8_gptp_off_timer0, matching the + 0x40 x t addressing of HUM Table 35.3 p 1926. Reserved gaps are spelled out so the members always line up with the manual.
The unit holds three views of the same counter: the 78-bit GPTP time ({PTPGPTPTMtU, PTPGPTPTMtM, PTPGPTPTMtL}, seconds in bits [77:30] and nanoseconds in [29:0]), and the 64-/32-bit AVTP nanosecond views derived from it (HUM 35.5.1 p 1951). PTPTIVCt sets the per-clk increment and {PTPTOVCtU, PTPTOVCtM, PTPTOVCtL} the additive offset.
Definition at line 559 of file ra8_ether_regs.h.
| volatile uint32_t r_gptp_timer_regs_t::PTPAVTPTML |
+0x20 AVTP Timer Monitoring L.
Definition at line 566 of file ra8_ether_regs.h.
Referenced by ra8_eth_gptp_get_avtp_ns().
| volatile uint32_t r_gptp_timer_regs_t::PTPAVTPTMU |
+0x24 AVTP Timer Monitoring U.
Definition at line 567 of file ra8_ether_regs.h.
Referenced by ra8_eth_gptp_get_avtp_ns().
| volatile uint32_t r_gptp_timer_regs_t::PTPGPTPTML |
+0x30 GPTP Timer Monitoring L.
Definition at line 569 of file ra8_ether_regs.h.
Referenced by ra8_eth_gptp_get_time().
| volatile uint32_t r_gptp_timer_regs_t::PTPGPTPTMM |
+0x34 GPTP Timer Monitoring M.
Definition at line 570 of file ra8_ether_regs.h.
Referenced by ra8_eth_gptp_get_time().
| volatile uint32_t r_gptp_timer_regs_t::PTPGPTPTMU |
+0x38 GPTP Timer Monitoring U.
Definition at line 571 of file ra8_ether_regs.h.
Referenced by ra8_eth_gptp_get_time().
| volatile uint32_t r_gptp_timer_regs_t::PTPTIVC |
+0x00 Timer Increment Value Cfg.
Definition at line 560 of file ra8_ether_regs.h.
Referenced by ra8_eth_gptp_deinit(), ra8_eth_gptp_get_increment(), ra8_eth_gptp_init(), and ra8_eth_gptp_set_increment().
| volatile uint32_t r_gptp_timer_regs_t::PTPTOVCL |
+0x10 Timer Offset Value Cfg L.
Definition at line 562 of file ra8_ether_regs.h.
Referenced by internal_write_offset().
| volatile uint32_t r_gptp_timer_regs_t::PTPTOVCM |
+0x14 Timer Offset Value Cfg M.
Definition at line 563 of file ra8_ether_regs.h.
Referenced by internal_write_offset().
| volatile uint32_t r_gptp_timer_regs_t::PTPTOVCU |
+0x18 Timer Offset Value Cfg U.
Definition at line 564 of file ra8_ether_regs.h.
Referenced by internal_write_offset().
| volatile uint32_t r_gptp_timer_regs_t::reserved04[3] |
+0x04..0x0C Reserved.
Definition at line 561 of file ra8_ether_regs.h.
| volatile uint32_t r_gptp_timer_regs_t::reserved1c |
+0x1C Reserved.
Definition at line 565 of file ra8_ether_regs.h.
| volatile uint32_t r_gptp_timer_regs_t::reserved28[2] |
+0x28..0x2C Reserved.
Definition at line 568 of file ra8_ether_regs.h.
| volatile uint32_t r_gptp_timer_regs_t::reserved3c |
+0x3C Reserved.
Definition at line 572 of file ra8_ether_regs.h.