r_gptp_regs_t Struct Reference

Ethernet Generic PTP Timer (GPTP) register window, HUM Ch 35. More...

#include <ra8_ether_regs.h>

Collaboration diagram for r_gptp_regs_t:

Data Fields
volatile uint32_t	PTPIPV
	+0x0000 IP Version (read-only).
volatile uint32_t	reserved04 [3]
	+0x0004..0x000C Reserved.
volatile uint32_t	PTPTMEC
	+0x0010 Timer Enable Configuration.
volatile uint32_t	PTPTMDC
	+0x0014 Timer Disable Configuration.
volatile uint32_t	reserved18 [2]
	+0x0018..0x001C Reserved.
volatile r_gptp_timer_regs_t	TIMER [k_ra8_gptp_timer_count]
	+0x0020 + 0x40 x t Per-timer blocks.

Detailed Description

Ethernet Generic PTP Timer (GPTP) register window, HUM Ch 35.

Declares the timer surface of HUM Table 35.3 p 1926 – the only part of the block this HAL addresses. The same window also carries media-clock capture (PTPMCCCm, +0x0200), media-clock recovery (PTPMCRCm, +0x0300), media-clock pin mapping (PTPMCPCm, +0x0400), cyclic compare (PTPCCCc0/1, +0x0500), the media-clock interrupt registers (PTPIS0/IE0/ID0 +0x0700, PTPIS1/IE1/ID1 +0x0710), security configuration (PTPSCR0/1/2, +0x0780) and the pulse-output timer submodule (POTCFGR and friends, +0x1000, HUM Table 35.9 p 1954). Those need the MEDIA_IN / MEDIA_OUT / CYCLIC_COMP pins, which no driver or board file in this tree routes, so they are deliberately not declared here rather than declared and left unused.

This block is a timer, not a protocol engine. HUM Ch 35 defines no Sync / Announce / Follow_Up generator, no PTP domain, no clockIdentity and no BMCA: an IEEE 1588 / 802.1AS stack on this part is software above the HAL, fed by this counter and by the RMAC receive-timestamp capture (MTRC / MPFCt, HUM Ch 33).

Invariant

While PTPTMEC.TEq is 0 the corresponding timer's counters read 0 (HUM 35.3.2.1 p 1927).

Example:

volatile r_gptp_regs_t* g = ra8_gptp();
const uint32_t ipv = g->PTPIPV;

See also

r_gptp_timer_regs_t

Definition at line 609 of file ra8_ether_regs.h.

Field Documentation

PTPIPV

volatile uint32_t r_gptp_regs_t::PTPIPV

+0x0000 IP Version (read-only).

Definition at line 610 of file ra8_ether_regs.h.

Referenced by ra8_eth_gptp_ip_version().

PTPTMDC

volatile uint32_t r_gptp_regs_t::PTPTMDC

+0x0014 Timer Disable Configuration.

Definition at line 613 of file ra8_ether_regs.h.

Referenced by internal_stop().

PTPTMEC

volatile uint32_t r_gptp_regs_t::PTPTMEC

+0x0010 Timer Enable Configuration.

Definition at line 612 of file ra8_ether_regs.h.

Referenced by ra8_eth_gptp_timer_enable(), and ra8_eth_gptp_timer_is_enabled().

reserved04

volatile uint32_t r_gptp_regs_t::reserved04[3]

+0x0004..0x000C Reserved.

Definition at line 611 of file ra8_ether_regs.h.

reserved18

volatile uint32_t r_gptp_regs_t::reserved18[2]

+0x0018..0x001C Reserved.

Definition at line 614 of file ra8_ether_regs.h.

TIMER

volatile r_gptp_timer_regs_t r_gptp_regs_t::TIMER[k_ra8_gptp_timer_count]

+0x0020 + 0x40 x t Per-timer blocks.

Definition at line 616 of file ra8_ether_regs.h.

Referenced by internal_timer().

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The documentation for this struct was generated from the following file:

• libs/ra8_hal/inc/ra8_ether_regs.h