ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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cpu1_main.c
Go to the documentation of this file.
1
34
35#include <stdint.h>
36
37#include "blink_m33_hal.h"
38#include "ra8_port_constants.h"
39
41extern uint32_t g_ra8_ls_cpu1_stack_top;
43extern uint32_t g_ra8_ls_cpu1_data_start;
45extern uint32_t g_ra8_ls_cpu1_data_end;
47extern uint32_t g_ra8_ls_cpu1_data_load;
49extern uint32_t g_ra8_ls_cpu1_bss_start;
51extern uint32_t g_ra8_ls_cpu1_bss_end;
52
53[[noreturn]] void cpu1_reset_handler(void);
54
62typedef enum : uint32_t {
63 k_blink_spins = 3000000U,
65
88[[noreturn]] static void cpu1_main(void)
89{
91
92 while (1) {
93 for (volatile uint32_t d = 0U; d < (uint32_t)k_blink_spins; d++) {
94 __asm volatile("nop");
95 }
96 /* One blink iteration: toggle + drive LED1 via the shared HAL step. The host
97 * app-level test drives this exact function, so it is not a re-implementation. */
98 level = blink_m33_hal_step(level);
99 }
100}
101
120[[noreturn]] void cpu1_reset_handler(void)
121{
122 uint32_t* dst = &g_ra8_ls_cpu1_data_start;
123 uint32_t* src = &g_ra8_ls_cpu1_data_load;
124 while (dst < &g_ra8_ls_cpu1_data_end) {
125 *dst = *src;
126 dst++;
127 src++;
128 }
129
130 uint32_t* bss = &g_ra8_ls_cpu1_bss_start;
131 while (bss < &g_ra8_ls_cpu1_bss_end) {
132 *bss = 0U;
133 bss++;
134 }
135
136 cpu1_main();
137}
138
156[[noreturn]] static void cpu1_fault_handler(void)
157{
158 while (1) {
159 __asm volatile("nop");
160 }
161}
162
173#ifndef RA8_OFF_TARGET
174/* The vector table is only meaningful in the cross-compiled M33 image. The host
175 * unit-test build compile-checks this TU but never links it as an executable, so
176 * dropping the table there costs no coverage. */
177[[gnu::used, gnu::section(".cpu1_vectors")]] const uintptr_t g_cpu1_vector_table[] = {
178 (uintptr_t)&g_ra8_ls_cpu1_stack_top,
179 (uintptr_t)&cpu1_reset_handler,
180 (uintptr_t)&cpu1_fault_handler,
181 (uintptr_t)&cpu1_fault_handler,
182 (uintptr_t)&cpu1_fault_handler,
183 (uintptr_t)&cpu1_fault_handler,
184 (uintptr_t)&cpu1_fault_handler,
185 (uintptr_t)&cpu1_fault_handler,
186};
187#endif
void cpu1_reset_handler(void)
CPU1 reset handler.
Definition cpu1_main.c:266
uint32_t g_ra8_ls_cpu1_data_end
uint32_t g_ra8_ls_cpu1_bss_start
uint32_t g_ra8_ls_cpu1_data_load
uint32_t g_ra8_ls_cpu1_bss_end
const uintptr_t g_cpu1_vector_table[]
Minimal Armv8-M vector table for CPU1.
Definition cpu1_main.c:337
uint32_t g_ra8_ls_cpu1_stack_top
uint32_t g_ra8_ls_cpu1_data_start
Typed Port / Pin Constants for the RA8D2 IOPORT Module.
ra8_level_t
Digital output / input level.
@ k_ra8_level_low
Drive or read 0.