ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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blink_m33_hal.h File Reference

One-iteration LED1 blink step for the HAL-based M33 example. More...

#include "ra8_pcntr.h"
#include "ra8_port_constants.h"
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Go to the source code of this file.

Functions

static ra8_level_t blink_m33_hal_step (ra8_level_t level)
 Advance the blink by one step: toggle the level and drive LED1 to it.

Detailed Description

One-iteration LED1 blink step for the HAL-based M33 example.

The single visible action of blink_m33_hal's CPU1 loop, factored into one bounded, side-effect-scoped inline step so it is exercised by BOTH the freestanding M33 firmware (cpu1_main.c calls it once per pass) and the host app-level test (tests/mocks/src/test_app_blink_m33_hal.c calls it against the ra8_fake_mmap MMIO backing). The tested logic is therefore the SAME code the firmware runs, not a re-implementation that could drift from it.

LED1 (BLUE) is k_ra8_pin_led1 = P600 = PORT6 pin 0; the step drives it through the CPU1-safe HAL primitive ra8_pcntr_set_output() (issue #580) – no raw MMIO, no ra8_hal object linked.

Definition in file blink_m33_hal.h.

Function Documentation

◆ blink_m33_hal_step()

ra8_level_t blink_m33_hal_step ( ra8_level_t level)
inlinestatic

Advance the blink by one step: toggle the level and drive LED1 to it.

Computes the next level (the logical inverse of level) and holds LED1 (k_ra8_pin_led1, P600 = PORT6 pin 0) an output at that level via ra8_pcntr_set_output(), then returns the new level so the caller can carry it into the next pass. Exactly one PCNTR1 read-modify-write happens per call; the port/pin come from k_ra8_pin_led1 so they are compile-time valid and the primitive's [[nodiscard]] result is intentionally discarded.

Parameters
[in]levelThe current LED level (k_ra8_level_low / k_ra8_level_high).
Returns
The new level LED1 was driven to (the inverse of level).
Return values
k_ra8_level_highlevel was k_ra8_level_low; LED1 is now driven high.
k_ra8_level_lowlevel was k_ra8_level_high; LED1 is now driven low.
Precondition
The IOPORT module clock is on (always-on after reset on the RA8D2).
LED1 (P600) powers up routed to PORT (no PFS setup is needed).
Postcondition
PORT6 pin 0 is configured as an output.
PORT6 pin 0's output latch equals the returned level.
Note
Not thread-safe / not ISR-safe: the underlying PCNTR1 read-modify-write is not atomic. Single-threaded blink-loop use only.
Since
0.1.0

Definition at line 55 of file blink_m33_hal.h.

References k_ra8_level_high, k_ra8_level_low, k_ra8_pin_led1, ra8_pcntr_set_output(), RA8_PIN_PIN, and RA8_PIN_PORT.

Referenced by cpu1_main().