ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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main.c File Reference

Eclipse ThreadX + Arm v8-M MPU partition demo for RA8D2. More...

#include <stdint.h>
#include "ra8_attributes.h"
#include "ra8_board_ek_ra8d2.h"
#include "ra8_boot_entry.h"
#include "ra8_cgc.h"
#include "ra8_err.h"
#include "ra8_isr.h"
#include "ra8_mpu.h"
#include "ra8_port_constants.h"
#include "ra8_port_utils.h"
#include "tx_api.h"
Include dependency graph for main.c:

Go to the source code of this file.

Enumerations

enum  mpu_stack_t : uint16_t { k_mpu_thread_stack_bytes = 1024U }
enum  mpu_priority_t : uint8_t { k_mpu_thread_priority = 4U }
enum  mpu_period_t : uint16_t { k_mpu_blink_ticks = 1000U }
enum  mpu_region_base_t : uintptr_t {
  k_mpu_region_mram_base = 0x02000000UL ,
  k_mpu_region_sram_base = 0x22000000UL ,
  k_mpu_region_peri_base = 0x40000000UL
}
 Region base addresses for the MPU partition table. More...
enum  mpu_region_size_t : uint32_t {
  k_mpu_region_mram_size = 0x00100000UL ,
  k_mpu_region_sram_size = 0x00100000UL ,
  k_mpu_region_peri_size = 0x10000000UL
}
 Region sizes (powers of two, bytes). More...
enum  mpu_mair_encoding_t : uint8_t {
  k_mpu_mair_attr0_normal_wb = 0xFFU ,
  k_mpu_mair_attr1_device = 0x04U
}
 MAIR attribute encodings used by the region table below. More...
enum  mpu_mair0_t : uint32_t { k_mpu_mair0_word }
enum  mpu_region_count_t : uint8_t { k_mpu_region_count }

Functions

static void internal_thread_entry (ULONG thread_input)
 Worker thread: blink LED1 to prove MPU did not wedge us.
void tx_application_define (void *first_unused_memory)
void main (void)
 Application entry: program MPU, init GPIO, dispatch ThreadX.

Variables

static const ra8_mpu_region_t s_mpu_regions []
 Static MPU region table installed at boot.
static const ra8_mpu_cfg_t s_mpu_cfg
 Aggregate MPU configuration handed to ra8_mpu_configure().
static uint8_t s_thread_stack [k_mpu_thread_stack_bytes]
static TX_THREAD s_thread
volatile uint32_t g_threadx_mpu_partition_match = 0U
 HIL liveness counter – incremented by the worker thread on every LED-toggle iteration.

Detailed Description

Eclipse ThreadX + Arm v8-M MPU partition demo for RA8D2.

Tag
[Ring 6 / APP] {World: S}

Demonstrates partitioning the system address map into a small static MPU region table at boot, then handing control to a single ThreadX worker that blinks LED1 at 1 Hz to prove the MPU configuration did not break ordinary code execution.

Region layout (programmed via ra8_mpu_configure):

  • Region 0: MRAM (RX, exec) – 1 MiB at 0x02000000
  • Region 1: SRAM (RW, no-exec) – 1 MiB at 0x22000000
  • Region 2: Peripheral block (RW, no-exec) – 256 MiB at 0x40000000

Default-on PRIVDEFENA lets privileged accesses outside the declared regions fall through to the architectural defaults so the kernel can still touch its bookkeeping pages.

Since
0.1.0

Definition in file main.c.

Enumeration Type Documentation

◆ mpu_mair0_t

enum mpu_mair0_t : uint32_t
Enumerator
k_mpu_mair0_word 

MPU mair0 word.

Definition at line 95 of file main.c.

◆ mpu_mair_encoding_t

enum mpu_mair_encoding_t : uint8_t

MAIR attribute encodings used by the region table below.

Attr 0 = Normal memory, inner+outer write-back, RW-allocate, non-transient (encoding 0xFF per Armv8-M Architecture Reference Manual D1.6.7 "Memory attribute encodings"). Required for the MRAM code region: instruction fetches from device-typed memory are UNPREDICTABLE and most cores HardFault. Attr 1 = device-nGnRnE (encoding 0x04) for the peripheral region.

Enumerator
k_mpu_mair_attr0_normal_wb 

MPU mair attr0 normal wb.

k_mpu_mair_attr1_device 

MPU mair attr1 device.

Definition at line 90 of file main.c.

◆ mpu_period_t

enum mpu_period_t : uint16_t
Enumerator
k_mpu_blink_ticks 

MPU blink ticks.

Definition at line 57 of file main.c.

◆ mpu_priority_t

enum mpu_priority_t : uint8_t
Enumerator
k_mpu_thread_priority 

MPU thread priority.

Definition at line 53 of file main.c.

◆ mpu_region_base_t

enum mpu_region_base_t : uintptr_t

Region base addresses for the MPU partition table.

Enumerator
k_mpu_region_mram_base 

MPU region MRAM base.

k_mpu_region_sram_base 

MPU region SRAM base.

k_mpu_region_peri_base 

MPU region peri base.

Definition at line 64 of file main.c.

◆ mpu_region_count_t

enum mpu_region_count_t : uint8_t
Enumerator
k_mpu_region_count 

MPU region count.

Definition at line 134 of file main.c.

◆ mpu_region_size_t

enum mpu_region_size_t : uint32_t

Region sizes (powers of two, bytes).

Enumerator
k_mpu_region_mram_size 

1 MiB.

k_mpu_region_sram_size 

1 MiB.

k_mpu_region_peri_size 

256 MiB.

Definition at line 73 of file main.c.

◆ mpu_stack_t

enum mpu_stack_t : uint16_t
Enumerator
k_mpu_thread_stack_bytes 

MPU thread stack bytes.

Definition at line 49 of file main.c.

Function Documentation

◆ internal_thread_entry()

void internal_thread_entry ( ULONG thread_input)
static

Worker thread: blink LED1 to prove MPU did not wedge us.

Toggles the board LED, advances the externally probed liveness counter, and sleeps for the configured ThreadX interval forever. Continued progress demonstrates that the MPU partition permits the scheduler and board-control paths required by this thread.

Parameters
[in]thread_inputThreadX entry cookie; this demo does not use it.
Returns
None.
Precondition
ThreadX has started the scheduler and dispatched this worker.
LED1 and the static worker stack were initialized successfully.
Postcondition
Each completed iteration toggles LED1 once.
Each completed iteration advances g_threadx_mpu_partition_match.
Note
This is a permanent, single-instance ThreadX worker.
Since
0.1.0

Definition at line 208 of file main.c.

References g_threadx_mpu_partition_match, k_mpu_blink_ticks, k_ra8_board_led1, ra8_board_led_toggle(), RA8_INTERNAL, and tx_thread_sleep.

◆ main()

void main ( void )

Application entry: program MPU, init GPIO, dispatch ThreadX.

The application entry point Reset_Handler hands control to.

Precondition
Reset_Handler completed .data/.bss init.
Postcondition
MPU is enabled with the s_mpu_cfg partition table.
Worker thread is running and blinking LED1.

Definition at line 250 of file main.c.

References k_ra8_board_led1, k_ra8_ok, ra8_board_led_init(), ra8_cgc_init(), ra8_mpu_configure(), and s_mpu_cfg.

◆ tx_application_define()

void tx_application_define ( void * first_unused_memory)

Variable Documentation

◆ g_threadx_mpu_partition_match

volatile uint32_t g_threadx_mpu_partition_match = 0U

HIL liveness counter – incremented by the worker thread on every LED-toggle iteration.

Read externally by scripts/hil/jlink_memprobe.sh via SWD. The probe asserts this counter advances by >= HIL_PROBE_MIN_ADVANCE over the sample window, proving:

  1. ra8_mpu_configure(&s_mpu_cfg) returned k_ra8_ok and the three- region partition table is live without locking the kernel out of its bookkeeping pages.
  2. tx_kernel_enter dispatched the worker thread.
  3. The 1 Hz SysTick / _tx_timer_interrupt path is unblocked by the SRAM and peripheral MPU regions, so tx_thread_sleep wakes the worker normally.

The alive-mode check could only prove the chip didn't HardFault; the counter proves the MPU partition did not silently break the scheduler tick or LED-toggle path.

Note
Read externally by J-Link only; firmware never reads back.
Since
0.1.0

Definition at line 186 of file main.c.

Referenced by internal_thread_entry().

◆ s_mpu_cfg

const ra8_mpu_cfg_t s_mpu_cfg
static
Initial value:
= {
.regions = s_mpu_regions,
.region_count = k_mpu_region_count,
.mair0 = (uint32_t)k_mpu_mair0_word,
.mair1 = 0U,
.privdefena = true,
.hfnmiena = false,
}
@ k_mpu_region_count
MPU region count.
Definition main.c:135
@ k_mpu_mair0_word
MPU mair0 word.
Definition main.c:96
static const ra8_mpu_region_t s_mpu_regions[]
Static MPU region table installed at boot.
Definition main.c:110

Aggregate MPU configuration handed to ra8_mpu_configure().

Definition at line 142 of file main.c.

Referenced by main().

◆ s_mpu_regions

const ra8_mpu_region_t s_mpu_regions[]
static
Initial value:
= {
.unpriv = k_ra8_mpu_perm_ro,
.executable = true,
.shareable = k_ra8_mpu_share_non,
.attr_idx = k_ra8_mpu_attr_idx_0},
.unpriv = k_ra8_mpu_perm_rw,
.executable = false,
.shareable = k_ra8_mpu_share_inner,
.attr_idx = k_ra8_mpu_attr_idx_0},
.executable = false,
.shareable = k_ra8_mpu_share_outer,
.attr_idx = k_ra8_mpu_attr_idx_1},
}
@ k_mpu_region_sram_size
1 MiB.
Definition main.c:75
@ k_mpu_region_mram_size
1 MiB.
Definition main.c:74
@ k_mpu_region_peri_size
256 MiB.
Definition main.c:76
@ k_mpu_region_mram_base
MPU region MRAM base.
Definition main.c:65
@ k_mpu_region_sram_base
MPU region SRAM base.
Definition main.c:66
@ k_mpu_region_peri_base
MPU region peri base.
Definition main.c:67
@ k_ra8_mpu_perm_none
No access at this privilege level.
Definition ra8_mpu.h:42
@ k_ra8_mpu_perm_rw
Read-write at this privilege level.
Definition ra8_mpu.h:44
@ k_ra8_mpu_perm_ro
Read-only at this privilege level.
Definition ra8_mpu.h:43
@ k_ra8_mpu_attr_idx_1
MAIR0 byte 1.
Definition ra8_mpu.h:67
@ k_ra8_mpu_attr_idx_0
MAIR0 byte 0.
Definition ra8_mpu.h:66
@ k_ra8_mpu_share_non
Non-shareable.
Definition ra8_mpu.h:54
@ k_ra8_mpu_share_inner
Inner shareable.
Definition ra8_mpu.h:56
@ k_ra8_mpu_share_outer
Outer shareable.
Definition ra8_mpu.h:55

Static MPU region table installed at boot.

Three coarse regions cover code, data, and the peripheral block. MRAM + SRAM use attr_idx 0 (Normal write-back); the peripheral region uses attr_idx 1 (device-nGnRnE). A real partitioning policy would split secure / non-secure worlds and apply per-thread sub-regions.

Definition at line 110 of file main.c.

◆ s_thread

TX_THREAD s_thread
static

Definition at line 160 of file main.c.

Referenced by tx_application_define().

◆ s_thread_stack

uint8_t s_thread_stack[k_mpu_thread_stack_bytes]
static

Definition at line 159 of file main.c.

Referenced by tx_application_define().