76typedef enum : uint16_t {
88typedef enum : uint16_t {
100typedef enum : uint32_t {
185static void gh_print(
const uint8_t* msg, uint32_t len)
195 __asm__
volatile(
"wfi");
221 buf[n] = (uint8_t)(
'0' + (value % (uint32_t)
k_gh_dec_ten));
225 for (uint32_t i = 0U; i < n; i++) {
246 for (uint16_t x = 0U; x < (uint16_t)
k_gh_fb_w; x++) {
248 const int32_t y_up = ((int32_t)
k_gh_fb_h - 1) - y_down;
250 const int32_t yy_down = y_down + dy;
251 const int32_t yy_up = y_up + dy;
252 if ((yy_down >= 0) && (yy_down < (int32_t)
k_gh_fb_h)) {
255 if ((yy_up >= 0) && (yy_up < (int32_t)
k_gh_fb_h)) {
266 for (uint32_t x = 0U; x < (uint32_t)
k_gh_fb_w; x++) {
270 for (uint32_t y = 0U; y < (uint32_t)
k_gh_fb_h; y++) {
271 const uint32_t row = y * (uint32_t)
k_gh_fb_w;
283#ifndef RA8_OFF_TARGET
284 __asm__
volatile(
"dsb" :::
"memory");
294 for (
size_t i = 0U; i < n; i++) {
344 uint32_t status_mask = 0U;
355 uint32_t cpuclk0_hz = 0U;
395 __asm__
volatile(
"wfi");
411 __asm__
volatile(
"wfi");
void main(void)
Secure fallback main entry point.
static uint16_t s_framebuffer[(size_t) k_panel_height_px *(size_t) k_panel_width_px]
1024x600 RGB565 framebuffer in external SDRAM (GLCDC scans this).
static const uint8_t k_gh_msg_pre[]
static bool gh_glcdc_programmed(void)
Bring the GLCDC layer-1 path up and prove it is programmed.
static uint32_t gh_framebuffer_hash(void)
FNV-1a-32 over the rendered framebuffer bytes.
static void gh_render_pattern(void)
Paint the full deterministic render pattern.
glcdc_hil_console_t
SCI8 J-Link OB console + text-format constants.
@ k_gh_dec_ten
Hex digit / decimal split + buf.
@ k_gh_hex_nibbles
Hex digits in a 32-bit value.
@ k_gh_uart_baud
Console baud.
@ k_gh_fnv_prime
FNV-1a-32 prime.
@ k_gh_nibble_mask
Low-nibble mask.
@ k_gh_nibble_bits
Bits per hex nibble.
@ k_gh_fnv_offset
FNV-1a-32 offset basis.
static void gh_fb_fill(uint16_t color)
Fill the whole framebuffer with color.
static void gh_setup_or_halt(void)
Bring up clocks/MSTP/time + the SCI8 console; halt on failure.
static void gh_print_uint(uint32_t value)
Print a small unsigned integer in decimal.
static void gh_draw_border(uint16_t color)
Draw a 1-px border around the whole framebuffer in color.
glcdc_hil_color_t
RGB565 palette for the deterministic render pattern.
@ k_gh_color_border
White 1-px frame.
@ k_gh_color_x
Yellow diagonal X.
@ k_gh_color_bg
Dark blue field.
static void gh_print_hex(uint32_t value)
Print value as 8 uppercase hex digits.
volatile uint32_t g_glcdc_hil_ok
1 once the GLCDC layer-1 render path is confirmed programmed.
static const uint8_t k_gh_msg_x[]
static const uint8_t k_gh_msg_fail_init[]
static const uint8_t k_gh_msg_pass[]
volatile uint32_t g_glcdc_hil_status
Last GLCDC SYS_STAT snapshot (diagnostic; not part of the CRC).
static const uint8_t k_gh_msg_fail_glcdc[]
volatile uint32_t g_glcdc_hil_crc
FNV-1a-32 of the rendered framebuffer (the on-bench baseline).
glcdc_hil_geom_t
Framebuffer geometry constants.
@ k_gh_fb_w
Framebuffer width, pixels.
@ k_gh_fb_h
Framebuffer height, pixels.
@ k_gh_x_thickness
Diagonal-X half thickness, pixels.
static void gh_panic_halt(void)
Park forever in WFI after a fatal init error.
static void gh_draw_x(uint16_t color)
Draw a thick corner-to-corner X in color.
static void gh_print(const uint8_t *msg, uint32_t len)
Emit a byte run on the SCI8 console.
static const uint8_t k_gh_msg_crc[]
volatile uint32_t g_glcdc_hil_heartbeat
Bumps on every idle-loop pass after a passing render.
static const display_cfg_t k_gh_display_cfg
Display PAL config selecting the GLCDC LCD backend.
static const uint8_t k_gh_msg_boot[]
Board-support layer for the Renesas EK-RA8D2 v1 evaluation kit.
ra8_err_t ra8_board_uart_console_write(const uint8_t *data, size_t len)
Polled blocking write to the J-Link OB VCOM console.
ra8_err_t ra8_board_uart_console_init(uint32_t baud)
Configure SCI8 + PD02/PD03 as the debug-console UART.
Boot entry points shared between a vector table and its startup code.
High-level Clock Generation Circuit driver.
ra8_err_t ra8_cgc_get_clock_hz(ra8_clock_id_t id, uint32_t *out_hz)
Query the current frequency of a clock-tree domain.
@ k_ra8_clock_id_cpuclk0
Cortex-M85 CPUCLK0.
ra8_err_t ra8_cgc_init(void)
Configure the clock tree to a safe default.
Display Platform Abstraction Layer for the RA8D2.
@ k_display_pixfmt_rgb565
16 bpp, 5/6/5 packed.
ra8_err_t display_get_framebuffer(const display_handle_t *d, display_fb_t *out)
Return the framebuffer descriptor the backend is targeting.
struct display_handle display_handle_t
ra8_err_t display_init(const display_cfg_t *cfg, display_handle_t **out_handle)
Initialise the display PAL and bring the selected backend up to a state where display_flush succeeds.
LCD backend (ra8_glcdc) for the display PAL.
const display_backend_iface_t k_display_backend_lcd_ra8_glcdc
LCD backend vtable – pass its address through display_cfg_t.iface to drive the EK-RA8D2 panel.
Error Code Definitions for ra8-firmware.
@ k_ra8_ok
Success – operation completed with all postconditions satisfied.
Graphics LCD Controller driver (two-layer with alpha blending).
ra8_err_t ra8_glcdc_get_status(uint32_t *out_mask)
Read GLCDC status register (VSYNC/HSYNC/underflow).
NVIC + ICU IELSR allocator.
void ra8_isr_globals_enable(void)
Globally enable maskable interrupts (PRIMASK = 0).
Ref-counted Module Stop Control wrapper for the RA8D2.
ra8_err_t ra8_mstp_init(void)
Re-establish the ra8_mstp ref-count table from current hardware state.
Active display-panel descriptor for the EK-RA8D2 (ER-TFT070-6).
@ k_ra8_board_fb_align_bytes
GLCDC AXI burst alignment, in bytes.
EK-RA8D2 panel timing as the HAL's ra8_glcdc_timing_t (ER-TFT070-6).
static const ra8_glcdc_timing_t s_ra8_panel_ek_ra8d2_timing
EK-RA8D2 ER-TFT070-6 RGB timing for ra8_glcdc_init / the LCD backend.
SysTick-based tick counter, delay and timestamp helpers.
ra8_err_t ra8_time_init(uint32_t cpu_hz)
Initialise SysTick for a 1 kHz tick interrupt.
Configuration descriptor passed into display_init.
Framebuffer descriptor returned by display_get_framebuffer.
void * pixels
Base of pixel data (RGB565 unless noted).